Lucent SLC 2000 channel shelf
Abstract: transistor fcs 9013 Lucent SLC 2000 installation sts 9013 DIGRAM FOR TEST IC 324 fcs 9013 fcs 9014 J-D4N SLC 500 ELECTRONIC CIRCUIT DIGRAM transistor fcs 9012
Text: Preliminary Data Sheet, Rev. 1 October 2000 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 Features • Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. STS/STM Pointer Interpreter
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TMXF28155
x28/x21
DS01-014PDH
DS99-197PDH)
Lucent SLC 2000 channel shelf
transistor fcs 9013
Lucent SLC 2000 installation
sts 9013
DIGRAM FOR TEST IC 324
fcs 9013
fcs 9014
J-D4N
SLC 500 ELECTRONIC CIRCUIT DIGRAM
transistor fcs 9012
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lucent m12 timing receiver
Abstract: No abstract text available
Text: Advance Data Sheet August 2000 TRCV0110G 10 Gbits/s Clock Recovery, 1:16 Data Demultiplexer Features • Fully-integrated clock recovery, 1:16 data demultiplexer ■ Supports the standard OC-192/STM-64 data rate of 9.9532 GHz as well as the FEC rate of 10.6642 GHz
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TRCV0110G
OC-192/STM-64
DS00-345HSPL
lucent m12 timing receiver
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the RMII Consortium Specification
Abstract: "LINK STATE"
Text: Advance Data Sheet April 1999 LU3X36FTR HEX-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X36FTR is a six-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and 100Base-FX switches
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LU3X36FTR
10Base-T/100Base-TX/FX
10Base-T,
100Base-TX,
100Base-FX
100Base-FX.
the RMII Consortium Specification
"LINK STATE"
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MR20L
Abstract: ls10 m3
Text: Advance Data Sheet October 1999 LU3X36FTR HEX-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X36FTR is a six-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and 100Base-FX switches
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LU3X36FTR
10Base-T/100Base-TX/FX
10Base-T,
100Base-TX,
100Base-FX
100Base-FX.
MR20L
ls10 m3
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cisco 2911
Abstract: MR4A MR7N "LINK STATE"
Text: Advance Data Sheet May 1999 LU3X38FTR 256-Pin PBGA OCTAL-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X38FTR 256-Pin PBGA is an eight-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and
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LU3X38FTR
256-Pin
10Base-T/100Base-TX/FX
10Base-T,
100Base-TX,
100Base-FX
cisco 2911
MR4A
MR7N
"LINK STATE"
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SMII specification
Abstract: No abstract text available
Text: Advance Data Sheet October 1999 LU3X38FTR 256-Pin PBGA OCTAL-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X38FTR 256-Pin PBGA is an eight-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and
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LU3X38FTR
256-Pin
10Base-T/100Base-TX/FX
10Base-T,
100Base-TX,
100Base-FX
SMII specification
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Untitled
Abstract: No abstract text available
Text: Advance Data Sheet June 1999 LU3X36FTR HEX-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X36FTR is a six-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and 100Base-FX switches
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LU3X36FTR
10Base-T/100Base-TX/FX
10Base-T,
100Base-TX,
100Base-FX
100Base-FX.
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet March 2001 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1+1, unprotected and ring (UPSR) network topologies.
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TMXF28155
x28/x21
GR-253-CORE,
GR-499,
TR-62411,
JT-G704,
JTG706,
JT-G707,
JT-I431-a,
DS01-078PDH
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DSP16xx
Abstract: LUCENT DSP1610 intel 4008 intel 4040 DSP1620 DSP1627 DSP1628 DSP1629 DSP1610 DSP1618 eccp
Text: Advisory May 1999 Clarification to the Serial I/O Control Register Description for the DSP1620/27/28/29 Devices Active Clock Frequency The purpose of this advisory is to clarify the function of the serial I/O control registers in the DSP1620/27/28/29 devices. Specifically, it clarifies the function of the control register field that specifies the active clock frequency.
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DSP1620/27/28/29
DSP1620/27/28/29
DSP1627/28/29
DSP1620
DS97-040WDSP
DSP16xx
LUCENT DSP1610
intel 4008
intel 4040
DSP1627
DSP1628
DSP1629
DSP1610
DSP1618 eccp
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pdr microelectronics 1700 f1
Abstract: V23809-C8-C10
Text: Advance Data Sheet May 1999 LU3X36FTR HEX-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X36FTR is a six-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and 100Base-FX switches
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LU3X36FTR
10Base-T/100Base-TX/FX
10Base-T,
100Base-TX,
100Base-FX
100Base-FX.
pdr microelectronics 1700 f1
V23809-C8-C10
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cisco 2911
Abstract: K19 FET the RMII Consortium Specification W17 fet 3X38FTR LC10 LS10 MR20 MR21 MR30
Text: Preliminary Data Sheet June 2000 3X38FTR 256-Pin PBGA OCTAL-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The 3X38 256-Pin PBGA is an eight-channel, singlechip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and 100BaseFX switches and repeaters. It supports simultaneous
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3X38FTR
256-Pin
10Base-T/100Base-TX/FX
10Base-T,
100Base-TX,
100BaseFX
100Base-FX.
cisco 2911
K19 FET
the RMII Consortium Specification
W17 fet
LC10
LS10
MR20
MR21
MR30
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t8206a
Abstract: No abstract text available
Text: Preliminary Data Sheet June 2000 CelXpres T8206 ATM Interconnect 1 Product Overview 1.1 Features • UTOPIA cell-level handshake interface ATM or PHY layers ■ Multi-PHY (MPHY) operation ■ Programmable ATM layer supports up to 16 PHY ports ■ Egress SDRAM buffer support to extend UTOPIA
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T8206
DS00-220DLC
DS99-063DLC-1)
t8206a
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Untitled
Abstract: No abstract text available
Text: Advance Data Sheet July 1999 LU3X36FTR HEX-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X36FTR is a six-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and 100Base-FX switches
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LU3X36FTR
10Base-T/100Base-TX/FX
10Base-T,
100Base-TX,
100Base-FX
100Base-FX.
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"LINK STATE"
Abstract: No abstract text available
Text: Advance Data Sheet July 1999 LU3X38FTR 256-Pin PBGA OCTAL-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X38FTR 256-Pin PBGA is an eight-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and
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LU3X38FTR
256-Pin
10Base-T/100Base-TX/FX
10Base-T,
100Base-TX,
100Base-FX
"LINK STATE"
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Untitled
Abstract: No abstract text available
Text: Advance Data Sheet August 1999 LU3X312FTR 12-Port FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X312FTR is a twelve-channel, single-chip complete transceiver designed specifically for dualspeed 10Base-T, 100Base-TX, and 100Base-FX
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LU3X312FTR
12-Port
10Base-T/100Base-TX/FX
10Base-T,
100Base-TX,
100Base-FX
100Base-FX.
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet September 1997 microelectronics group Lucent Technologies Bell Labs Innovations New Device Code LU3M38 Eight Ethernet MACs for 10/100 Mbits/s Frame Switching — Receive frame statistics are appended to each frame at the end of the DMA transfer for custom
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LU3M38
DS97-478LAN
DS96-124LAN)
5002b
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet July 1997 m i c r o e l e c t r o n i c s group Lucent Technologies Bell Labs Innovations LUC3M08 Eight Ethernet MACs for 10/100 Mbits/s Frame Switching Features • Eight 10/100 Mbits/s Ethernet MACs integrated together with separate transmit and receive port
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LUC3M08
10Base-T,
100Base-T4,
64-bit,
DS96-124LAN
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet July 1997 m icroelectronics group Lucent Technologies Bell Labs Innovations LUC3M08 Eight Ethernet MACs for 10/100 Mbits/s Frame Switching Features • Eight 10/100 Mbits/s Ethernet MACs integrated together with separate transmit and receive port
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LUC3M08
10Base-T,
100Base-T4,
64-bit,
DS96-124LAN
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lucent m12 timing receiver
Abstract: 5104 dm AC20 AC22 LU3M38
Text: Preliminary Data Sheet September 1997 m icroelectronics group Lucent Technologies Bell Labs Innovations New Device Code LU3M38 Eight Ethernet MACs for 10/100 Mbits/s Frame Switching — Receive frame statistics are appended to each frame at the end of the DMA transfer for custom
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LU3M38
10Base-T,
100Base-T4,
64-bit,
DS97-478LAN
DS96-124LAN)
lucent m12 timing receiver
5104 dm
AC20
AC22
LU3M38
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet September 1997 m i cro e le ctr o n ic s group Lucent Technologies Bell Labs Innovations LUC3M08 Eight Ethernet MACs for 10/100 Mbits/s Frame Switching Features • Eight 10/100 Mbits/s Ethernet MACs integrated together with separate transmit and receive port
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OCR Scan
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LUC3M08
10Base-T,
100Base-T4,
64-bit344
DS97-478LAN
DS96-124LAN)
05002b
002fl0b5
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet September 1997 m i c r o e l e c t r o n i c s group Lucent Technologies Bell Labs Innovations LUC3M08 Eight Ethernet MACs for 10/100 Mbits/s Frame Switching Features • Eight 10/100 Mbits/s Ethernet MACs integrated together with separate transmit and receive port
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OCR Scan
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PDF
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LUC3M08
10Base-T,
100Base-T4,
64-bit,
slave07
DS97-478LAN
S96-124LAN)
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Untitled
Abstract: No abstract text available
Text: Advance Data Sheet October 1999 m icro ele ctro n ic s group Lucent Technologies Bell Labs Innovations ORCA ORT4622 Field-Programmable System Chip FPSC Four-Channel x 622 Mbits/s Backplane Transceiver Introduction Lucent Technologies Microelectronics Group has
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ORT4622
ORT4622
432-Pin
BC432
680-Pin
BM680
0Q407E5
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet February 1997 m icroelectronics group Lucent Technologies Bell Labs Innovations DSP1628 Digital Signal Processor 1 Features 2 Description • Optimized for digital cellular applications with a bit manipulation unit for higher coding efficiency and
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DSP1628
DSP1628x16
DSP1628x08
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CORE F5A
Abstract: No abstract text available
Text: Preliminary Data Sheet August 2000 m i c r o e le c t r o n ic s group Lucent Technologies Bell Labs Innovations ORCA Series 4 Field-Programmable Gate Arrays Programmable Features • High-performance platform design. — 0.13 pm seven-level metal technology.
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DS00-221FPGA
CORE F5A
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