LOW PIN COUNT LPC INTERFACE SPECIFICATION 1.0 Search Results

Low Pin Count LPC Interface Specification

Abstract: f47H 42181 Intel 8237 Direct Memory Access Controller intel LPC interface spec 1.0
Contextual Info: Low Pin Count Interface Specification, Revision 1.0 LOW PIN COUNT LPC INTERFACE SPECIFICATION Revision 1.0 September 29, 1997 Intel may have patents and/or patent applications related to the various Low Pin Count interfaces described in the Low Pin Count (LPC) Interface Specification, Revision 1.0. A reciprocal, royalty-free license to the electrical

Low Pin Count LPC Interface Specification

Abstract: Intel 8080 interface
Contextual Info: LOW PIN COUNT LPC INTERFACE SPECIFICATION AGREEMENT This is a royalty-free, reciprocal patent license for Adopters of the Low Pin Count (“LPC”) Interface Specification who wish to make use of the LPC Interfaces designed by Intel, and described in the LPC Interface Specification, in their LPC-compliant

Contextual Info: 8 Mbit LPC Flash SST49LF080A A Microchip Technology Company Data Sheet The SST49LF080A flash memory device is designed to interface with the LPC bus for PC and Internet Appliance application in compliance with Intel Low Pin Count LPC Interface Specification 1.0. Two interface modes are supported: LPC

Low Pin Count LPC Interface Specification

Contextual Info: 8 Mbit LPC Flash SST49LF080A A Microchip Technology Company Data Sheet The SST49LF080A flash memory device is designed to interface with the LPC bus for PC and Internet Appliance application in compliance with Intel Low Pin Count LPC Interface Specification 1.0. Two interface modes are supported: LPC

WPSA13

Abstract: AT49LL080 E0000 SA10 SA11 SA12 SA13 SA14 SA15
Contextual Info: Features • Conforms to Intel LPC Interface Specification 1.0 • 8M Bits of Flash Memory for Platform Code/Data Storage – Automated Byte-program and Sector-erase Operations • Two Configurable Interfaces • • • • – Low Pin Count LPC Interface for In-System Operation

Contextual Info: Features • Conforms to Intel LPC Interface Specification 1.0 • 4M Bits of Flash Memory for Platform Code/Data Storage – Automated Byte-program and Sector-erase Operations • Two Configurable Interfaces • • • • – Low Pin Count LPC Interface for In-System Operation

Contextual Info: Features • Conforms to Intel LPC Interface Specification 1.0 • 8M Bits of Flash Memory for Platform Code/Data Storage – Automated Byte-program and Sector-erase Operations • Two Configurable Interfaces • • • • – Low Pin Count LPC Interface for In-System Operation

Contextual Info: 16 Mbit LPC Serial Flash SST49LF016C A Microchip Technology Company Data Sheet The SST49LF016C flash memory device is designed to interface with host controllers chipsets that support a low pin-count (LPC) interface for system firmware applications. Complying with LPC Interface Specification 1.1, SST49LF016C supports a Burst-Read data transfer of 15.6 MBytes per second at 33 MHz clock

AT49LL040

Abstract: SA10 TSOP-16 3343a
Contextual Info: Features • Conforms to Intel LPC Interface Specification 1.0 • 4M Bits of Flash Memory for Platform Code/Data Storage – Automated Byte-program and Sector-erase Operations • Two Configurable Interfaces • • • • – Low Pin Count LPC Interface for In-System Operation

Contextual Info: Not recommended for new designs. Contact Microchip Sales for replacement options. 16 Mbit LPC Flash SST49LF160C A Microchip Technology Company Not Recommended for New Designs SST49LF160C flash memory device is designed to interface with host controllers chipsets that support a low pin-count (LPC) interface for system firmware applications. SST49LF160C device complies with the LPC Interface Specification. The

49lf016c

Abstract: SST49LF016C
Contextual Info: 16 Mbit LPC Serial Flash SST49LF016C A Microchip Technology Company Data Sheet The SST49LF016C flash memory device is designed to interface with host controllers chipsets that support a low pin-count (LPC) interface for system firmware applications. Complying with LPC Interface Specification 1.1, SST49LF016C supports a Burst-Read data transfer of 15.6 MBytes per second at 33 MHz clock

SST49LF160C

Abstract: iry2
Contextual Info: Not recommended for new designs. Contact Microchip Sales for replacement options. 16 Mbit LPC Flash SST49LF160C A Microchip Technology Company Not Recommended for New Designs SST49LF160C flash memory device is designed to interface with host controllers chipsets that support a low pin-count (LPC) interface for system firmware applications. SST49LF160C device complies with the LPC Interface Specification. The

AT49LH002

Contextual Info: Features • Complies with Intel Low-Pin Count LPC Interface Specification Revision 1.1 – Supports both Firmware Hub (FWH) and LPC Memory Read and Write Cycles • Auto-detection of FWH and LPC Memory Cycles • • • • • • – Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets

ATMEL 736 8pin IC

Abstract: AT49LH004 atmel 33jc
Contextual Info: Features • Complies with Intel Low-Pin Count LPC Interface Specification Revision 1.1 – Supports both Firmware Hub (FWH) and LPC Memory Read and Write Cycles • Auto-detection of FWH and LPC Memory Cycles • • • • • • • – Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets

ATMEL 736 8pin IC

Abstract: ATMEL BIOS AT49lh00b4
Contextual Info: Features • Complies with Intel Low-Pin Count LPC Interface Specification Revision 1.1 – Supports both Firmware Hub (FWH) and LPC Memory Read and Write Cycles • Auto-detection of FWH and LPC Memory Cycles • • • • • • • – Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets

ATMEL 736 8pin IC

Abstract: atmel 33jc AT49LH004
Contextual Info: Features • Complies with Intel Low-Pin Count LPC Interface Specification Revision 1.1 • • • • • • • • – Supports both Firmware Hub (FWH) and LPC Memory Read and Write Cycles Auto-detection of FWH and LPC Memory Cycles – Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets

ITE 8732

Abstract: SERIRQ 8732 ite SD Card and MMC Reader two factor access control processing authentication ITE 87 Secure Digital IT8228E Index61h SMC SD MMC card reader
Contextual Info: IT8228E Low Pin Count Media Interface LPC Media I/F Preliminary Specification V0.2 INTEGRATED TECHNOLOGY EXPRESS, INC. Specification subject to Change without notice, AS IS and for reference only. For purchasing, please contact sales representatives. Copyright  2003 ITE, Inc.

3377B

Contextual Info: Features • Complies with Intel Low-Pin Count LPC Interface Specification Revision 1.1 – Supports both Firmware Hub (FWH) and LPC Memory Read and Write Cycles • Auto-detection of FWH and LPC Memory Cycles • • • • • • – Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets

ATMEL 736 8pin IC

Abstract: AT49LH004 ATMEL 736 AT49LH004-33JC
Contextual Info: Features • Complies with Intel Low-Pin Count LPC Interface Specification Revision 1.1 – Supports both Firmware Hub (FWH) and LPC Memory Read and Write Cycles • Auto-detection of FWH and LPC Memory Cycles • • • • • • • – Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets

Contextual Info: Features • Complies with Intel Low-Pin Count LPC Interface Specification Revision 1.1 – Supports both Firmware Hub (FWH) and LPC Memory Read and Write Cycles • Auto-detection of FWH and LPC Memory Cycles • • • • • • – Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets

sis950

Abstract: IT8705F SiS950 Rev. 1.0
Contextual Info: LPC I/O SiS950 Rev. 1.0 July 16, 1999 This specification is subject to change without notice. Silicon Integrated Systems Corporation assumes no responsibility for any errors contained herein. Copyright by Silicon Integrated Systems Corp., all rights reserved.

Contextual Info: Features • Conforms to Intel LPC Interface Specification 1.0 • 4M or 2M Bits of Flash Memory for Platform Code/Data Storage • • • • • – Available in 4M Bits AT49LL040 and 2M Bits (AT49LL020) – Automated Byte-program and Sector-erase Operations

ipmi bmc

Abstract: uart 16550 lpc sram lpc interface ARM7 tdmi pin configuration BT 804 RX-2 -G 40Mhz ARM7 ISA lpc interface sram ZirconCP-TDK ARM7 tdmi PROCESSOR
Contextual Info: QLogic Corporation Zircon CP Baseboard Management Controller Data Sheet Features „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ Complies with the Intelligent Platform Management Interface IPMI specification versions 1.0 and 1.5* Complies with PICMG CompactPCI System

bios chip 8 pin

Abstract: south bridge ISA chip set M29F040B TA253 M29F002B M29F400B M50FW002 M50FW040 LPC bus
Contextual Info: TA253 TECHNICAL ARTICLE ST Offers a Complete Portfolio of Solutions for BIOS Storage Sandro D’Angelo, Flash Memory Division, STMicroelectronics, Catania, Italy CPU SDRAM 3D Graphics Screen AGP 2X FSB 66 Three Architectures for PC Motherboards The motherboard is the core of PC systems. It is