JITTER Search Results

Contextual Info: PRELIMINARY Figure 1. Block Diagram TQ2061 High-Frequency Clock Generator Features » Output frequency range: 500 MHz to 600 MHz » One differential PECL output: 600 m V min swing * Common-mode voltage: VDD-1 .2 V (max), VDD-1 .6 V(m in) * Period-to-period output jitter:

scas640

Contextual Info: CDCVF2505 3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER SCAS640 – JULY 2000 D D D D D D D D D D D D Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications Spread Spectrum Clock Compatible Operating Frequency: 24 MHz to 200 MHz Low Jitter Cycle-cycle : <|150 ps| Over the

Contextual Info: LMK00308 www.ti.com SNAS576B – FEBRUARY 2012 – REVISED FEBRUARY 2013 LMK00308 3-GHz 8-Output Differential Clock Buffer/Level Translator Check for Samples: LMK00308 FEATURES DESCRIPTION • The LMK00308 is a 3-GHz, 8-output differential fanout buffer intended for high-frequency, low-jitter

Contextual Info: Oscillators 7 x 5 mm SMD LVDS CXO BF SERIES Features > 3rd overtone solution. > 3.3V and 2.5V operation available. e53 TXC BFA .500 212 > LVDS output, output frequencies 50 MHz to 160 MHz. > Excellent low phase noise and jitter. > Tri-State function available.

Contextual Info: CDCM7005 www.ti.com SCAS793B – JUNE 2005 – REVISED OCTOBER 2005 3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER GND GND GND GND GND GND C VBB GND AVCC AVCC AVCC AVCC AVCC GND STATUS_ REF or PRI_SEC_ CLK STATUS_ D VCXO_IN GND GND GND GND GND

Contextual Info: Quality Semiconductor, I nc. QS5940 SuperSync PCI Controller PLL Clock Driver PRELIMINARY FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • QS5940 is a high-performance, low skew, low jitter phase-locked loop PLL clock driver. Two banks of

GDF576

Contextual Info: EURO QUARTZ GDF576 LVDS VCXO 7 x 5 x 1.8mm SMD VCXO Frequency range 38MHz to 640MHz LVDS Output Supply Voltage 3.3 VDC Phase jitter 0.4ps typical Pull range from ±30ppm to ±150ppm DESCRIPTION GDF576 VCXOs are packaged in a 6 pad 7mm x 5mm SMD package. Typical phase jitter for GDF series VCXOs is 0.4 ps. Output is LVDS.

12KHz

Contextual Info: EURO QUARTZ Frequency range 0.625MHz to 50.0MHz CMOS/TTL Output Supply Voltage 5.0 V or 3.3 VDC Integrated Phase Jitter 1ps typical G42 CMOS VCXO 11.4 x 9.6 x 2.5mm 4 pad SMD DESCRIPTION OUTLINE & DIMENSIONS G42 VCXOs, are packaged in a miniature 11.4mm x 9.6mm x 2.5mm

Contextual Info: EURO QUARTZ Frequency range 50.01MHz to 200MHz 15pF load Frequency range 50.01MHz to 320MHz (10pF load) LVCMOS Output Supply Voltage 3.3 VDC Ultra low jitter less than 1ps GF42 CMOS VCXO 11.4 x 9.6 x 2.5mm 4 pad SMD OUTLINE & DIMENSIONS DESCRIPTION GF42 VCXOs, are packaged in an industry-standard, 4 pad, 11.4mm

Frequency multiplier 1mHz 10MHz

Contextual Info: EURO QUARTZ Frequency range 50.01MHz to 800MHz LVCMOS Output Supply Voltage 3.3 VDC High Q fundamental mode crystal Low jitter multiplier circuit GW64 CMOS VCXO 11.4 x 9.6 x 4.7mm 6 pad SMD OUTLINE & DIMENSIONS DESCRIPTION GW64 VCXOs, are packaged in an industry-standard, 6 pad, 11.4mm

osc 24mhz

Abstract: 12MHz smd TCXO 24MHZ
Contextual Info: EURO QUARTZ EMW576D Series TCXO LVDS 7 x 5 x 2.8mm SMD, 'W' Group Miniature 7 x 5 x 2.8mm ceramic SMD package Frequency range: 12.0MHz to 800.0MHz Supply voltage 3.3 Volts Low cost, low jitter for general applications RoHS compliant EMW576D - OUTLINES AND DIMENSIONS

Contextual Info: EURO QUARTZ LVPECL 5x3.2mm 3.3V VCXO EQVP-PC53 SERIES Freq: 0.75MHz to 1.35GHz Features • · · · · · Extremely low jitter Low cost Express delivery Stability from ±20ppm, -40 to +85°C Absolute pull range ±50ppm Serial ID with comprehensive traceability

SI570

Abstract: Silabs Si571 SI570 PLL Si57x-EVB
Contextual Info: Si 5 7 0 / S i 5 71 10 MH Z TO 1.4 G H Z I 2C P ROGRAMMABLE XO/VCXO Features  Any programmable output  frequencies from 10 to 945 MHz and select frequencies to 1.4 GHz   I2C serial interface  3rd generation DSPLL with superior  jitter performance

dqpsk 40G

Contextual Info: CENTELLAX OA3MHP Preliminary Datasheet 40G DQPSK / 100G DP-QPSK 8 V LiNbO3 Driver Surface Mount Ceramic Package Product Highlights • 8 V Output • 0.9 ps added RMS jitter • 10 ps rise / fall time • 26 dB gain • 2.2 W power dissipation • Ultra-small SMT package

Contextual Info: 74LVC1G14 Single Schmitt-trigger inverter Rev. 12 — 6 August 2012 Product data sheet 1. General description The 74LVC1G14 provides the inverting buffer function with Schmitt-trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free

VIPER06

Abstract: SSO10 VIPER06H viper06l VIPER06HS VIPER06LN viper06x VIPER06LS VIPER06XN VIPER06HN
Contextual Info: VIPER06 Fixed-frequency VIPer plus family Datasheet — production data Features • 800 V avalanche rugged power section ■ PWM operation with frequency jittering for low EMI ■ Operating frequency: – 30 kHz for VIPER06Xx – 60 kHz for VIPER06Lx – 115 kHz for VIPER06Hx

Contextual Info: DS80EP100 DS80EP100 5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables Literature Number: SNLS279B DS80EP100 5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables General Description Features National’s Power-saver equalizer compensates for transmission medium losses and minimizes medium-induced deterministic jitter. Performance is guaranteed over the full range

MARKING V7 6-PIN

Contextual Info: 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 11 — 6 July 2012 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

16.384mhz vcxo

Abstract: oscillator 16.384MHZ
Contextual Info: ASSP VCXO Application Specific Voltage Controlled Crystal Oscillator 7.0 x 5.0mm FRTELE016 3.3V CMOS 16.384MHz Telecom VCXO ASSP VCXO 7.0 x 5.0mm Ceramic SMD for Telecommunications Package: Product Features Recommended Land Pattern: • Very low Pk to Pk jitter - 50ps Max

Contextual Info: SM803xxx Flexible Ultra-Low Jitter Clock Synthesizer ClockworksTM FLEX2 General Description The SM803xxx is a dual PLL clock generator that achieves ultra-low, 75fs RMS phase jitter. With 12 total outputs and dividers on each output, this device can generate 12 different frequencies up to 850MHz. It accepts

Contextual Info: Micro Networks M2004-01 Preliminary Specifications An Integrated Circuit Systems Company M2004-01 Frequency Translator DESCRIPTION The M2004-01 integrates a high performance Phase Locked Loop PLL with a Voltage Controlled SAW Oscillator (VCSO) to provide a low jitter Frequency

Contextual Info: Preliminary 38MHz-320MHz Low Phase Noise VCXO FEATURES 16 SEL0^ XIN 2 15 SEL1^ XOUT 3 14 GNDBUF SEL2^ 4 13 QBAR OE_CTRL 5 12 VDDBUF VCON 6 11 Q GNDANA 7 10 GNDBUF LP 8 9 LM 12 13 SEL2^ 14 OE_CTRL 15 VCON 16 11 10 9 1 2 3 4 GNDBUF PL580-3X LM The PL580-3X is a monolithic low jitter and low

Contextual Info: M650 Series Preliminary Specifications M650 Series Voltage Controlled SA W Oscillators DESCRIPTION The M650 Series of Voltage Controlled SAW Oscillators is a low cost solution for many Telecom applications. An internal SAW filter provides jitter performance of less than 0.5psec rms .

oscillator LC 1khz-10khz

Abstract: oscillator 1khz-10khz 482-L
Contextual Info: SY89482L 3.3V, 622MHz to 694MHz CML Jitter Attenuator with Internal Termination General Description The SY89482L is a 3.3V, fully differential CML jitter attenuator that accepts a noisy clock between 622MHz and 694MHz, and provides an ultra-low jitter of the input