VCC-1500
Abstract: VCC-760 8 way flip-flop ic MC100ES6030 MC100ES6030DW MC100ES6030DWR2 MC100ES6030EG
Text: 3.3V ECL Triple D Flip-Flop w/Set and Reset MC100ES6030 DATA SHEET The MC100ES6030 is a triple master-slave D flip-flop with differential outputs. When the clock input is low, data enters the master latch and transfers to the slave during a positive transition on the clock input.
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MC100ES6030
MC100ES6030
20-lead
751D-07
VCC-1500
VCC-760
8 way flip-flop ic
MC100ES6030DW
MC100ES6030DWR2
MC100ES6030EG
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Untitled
Abstract: No abstract text available
Text: 3.3V ECL Triple D Flip-Flop w/Set and Reset MC100ES6030 DATA SHEET Product Discontinuance Notice – Last Time Buy Expires on 12/7/2013 The MC100ES6030 is a triple master-slave D flip-flop with differential outputs. When the clock input is low, data enters the master latch and transfers to the slave during a positive
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MC100ES6030
MC100ES6030
20-lead
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Untitled
Abstract: No abstract text available
Text: 3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Translator MC100ES60T22 Product Discontinuance Notice – Last Time Buy Expires on 12/12/2013 The MC100ES60T22 is a low skew dual LVTTL/LVCMOS to differential LVPECL translator. The low voltage PECL levels, small package, and dual gate
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MC100ES60T22
MC100ES60T22
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MC100ES6535
Abstract: MC100ES6535DT MC100ES6535DTR2 TSSOP-20
Text: 3.3V LVCMOS-to-LVPECL 1:4 Fanout Buffer MC100ES6535 DATA SHEET The MC100ES6535 is a low skew, high performance 3.3 V 1-to-4 LVCMOS to LVPECL fanout buffer. The ES6535 has two selectable inputs that allow LVCMOS or LVTTL input levels which translate to LVPECL outputs. The clock enable is internally synchronized to eliminate
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MC100ES6535
MC100ES6535
ES6535
20-LEAD
948E-02
MC100ES6535DT
MC100ES6535DTR2
TSSOP-20
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capacitor cross reference
Abstract: Integrated Device Technology CROSS
Text: 2.5V, 3.3V ECL/LVPECL/LVDS Dual Differential 2:1 Multiplexer MC100ES6056 NRND DATASHEET NRND – Not Recommend for New Designs Product Discontinuance Notice – Last Time Buy Expires on 12/23/2013 The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path
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MC100ES6056
capacitor cross reference
Integrated Device Technology CROSS
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capacitor cross reference
Abstract: Integrated Device Technology CROSS
Text: 2.5V, 3.3V ECL/LVPECL/LVDS Dual Differential 2:1 Multiplexer MC100ES6056 NRND DATASHEET NRND – Not Recommend for New Designs The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals.
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MC100ES6056
capacitor cross reference
Integrated Device Technology CROSS
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JESD22-A114
Abstract: JESD22-A115 JESD78 PCA9544A PCA9558 PCA9558PW PCA9558PW-T PCA9588
Text: NXP 6-bit I2C-bus DIP switch with integrated 8-bit GPIO and 2K EEPROM Multi-function I2C-bus device simplifies board configuration Equipped with a multiplexed EEPROM, an I/O expander, and a write-protected serial EEPROM, this highly integrated device makes it easy to implement a variety of functions.
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protectio15
PCA9558
JESD22-A114
JESD22-A115
JESD78
PCA9544A
PCA9558PW
PCA9558PW-T
PCA9588
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JESD78
Abstract: No abstract text available
Text: DG90LV011 Vishay Siliconix 3V High Speed Single LVDS Driver DESCRIPTION The DG90LV011 High Speed driver is optimized for data rate in excess of 400 Mbps 200 MHz . Device works under current mode. It conforms to TIA/EIA standard. It is designed and manufactured for industrial temperature (- 40 °C ~ 85 °C) applications.
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DG90LV011
DG90LV011
TIA/EIA-644-A
JESD78)
08-Apr-05
JESD78
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MAX14566E
Abstract: No abstract text available
Text: MAX14566E RELIABILITY REPORT FOR MAX14566EETA+T PLASTIC ENCAPSULATED DEVICES April 14, 2011 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086 Approved by Richard Aburano Quality Assurance Manager, Reliability Operations Maxim Integrated Products. All rights reserved.
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MAX14566E
MAX14566EETA
Informati-A114
TL9ZCQ001L,
JESD22-C101
TL9ZCQ001J,
250mA
JESD78
MAX14566E
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ES603
Abstract: No abstract text available
Text: 3.3V ECL/PECL/HSTL/LVDS ÷2/4, ÷4/6 Clock Generation Chip MC100ES6039 Product Discontinuance Notice – Last Time Buy Expires on 12/19/2013 The MC100ES6039 is a low skew 2/4, 4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each
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MC100ES6039
ES603
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Untitled
Abstract: No abstract text available
Text: 2.5 V/3.3 V ECL 1:2 Differential Fanout Buffer MC100ES6011 DATASHEET Product Discontinuance Notice – Last Time Buy Expires on 12/19/2013 The MC100ES6011 is a differential 1:2 fanout buffer. The ES6011 is ideal for applications requiring lower voltage.
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MC100ES6011
ES6011
100ES
MC100ES6011
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JESD22-B117
Abstract: Latch up test JESD78 JESD22-B111 DTS04169EN DTS04193EN JEDEC JESD22-B117 dts04193 QLT POWER IEC-68-2-21 JESD78
Text: RF6280 Qualification Report Page 1 of 2 QLT-01087, Revision B Product Description A multi-functional power management unit DC‐DC converter Package Type WLCSP, 2 x 2 x 0.65 mm Process Technology Si Qualification # 06‐QUAL‐752 Date Issued
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RF6280
QLT-01087,
06QUAL752
JESD22A108,
JESD22A101,
JESD22A114
QAL-04-1049
JESD22
JESD22-B117
Latch up test JESD78
JESD22-B111
DTS04169EN
DTS04193EN
JEDEC JESD22-B117
dts04193
QLT POWER
IEC-68-2-21
JESD78
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Untitled
Abstract: No abstract text available
Text: 2.5/3.3V 1:4 PECL Clock Driver with 2:1 Input MUX MC100ES6130 DATASHEET Product Discontinuance Notice – Last Time Buy Expires on 12/7/2013 The MC100ES6130 is a 2.5 GHz differential PECL 1:4 fanout buffer. The ES6130 offers a wide operating range of 2.5 V and 3.3 V and also features a 2:1 input MUX
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MC100ES6130
MC100ES6130
ES6130
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Untitled
Abstract: No abstract text available
Text: Low Voltage 1:5 Differential LVDS Clock Fanout Buffer MC100ES8014 Product Discontinuance Notice – Last Time Buy Expires on 1/31/2014 Product Preview DATASHEET MC100ES8014 The MC100ES8014 is a HSTL differential clock fanout buffer. Designed for the most demanding clock distribution systems, the MC100ES8014 supports
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MC100ES8014
MC100ES8014
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DG2750
Abstract: DG2750DN-T1-E4 HP4192A JESD78
Text: DG2750 Vishay Siliconix Low Voltage Dual SPDT Analog Switch with Negative Swing Audio Capability DESCRIPTION FEATURES The DG2750 is a dual SPDT low on-resistance switch designed to from a single 1.8 V to 5.0 V power supply. It is a bi-directional switch, and is capable of switching negative
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DG2750
DG2750
18-Jul-08
DG2750DN-T1-E4
HP4192A
JESD78
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74ABT821N
Abstract: 74ABT374A 74ABT534A 74ABT821 74ABT821D 74ABT821DB 74ABT821PW JESD78 SO24
Text: 74ABT821 10-bit D-type flip-flop; positive-edge trigger; 3-state Rev. 02 — 12 April 2005 Product data sheet 1. General description The 74ABT821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
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74ABT821
10-bit
74ABT821
74ABT374A
74ABT534A
10-bit,
74ABT821N
74ABT534A
74ABT821D
74ABT821DB
74ABT821PW
JESD78
SO24
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ZY 22 1D6
Abstract: 74LVT162374 74LVT162374DGG 74LVT162374DL JESD78 SSOP48 TSSOP48
Text: 74LVT162374 3.3 V 16-bit edge-triggered D-type flip-flop with 30 Ω termination resistors; 3-state Rev. 03 — 17 January 2005 Product data sheet 1. General description The 74LVT162374 is a high performance BiCMOS product designed for VCC operation at 3.3 V.
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74LVT162374
16-bit
74LVT162374
ZY 22 1D6
74LVT162374DGG
74LVT162374DL
JESD78
SSOP48
TSSOP48
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aircraft logic gates
Abstract: 74LVT574 74LVT574D 74LVT574DB 74LVT574PW 74LVTH574 74LVTH574D 74LVTH574PW JESD78 SO20
Text: 74LVT574; 74LVTH574 3.3 V octal D-type flip-flop; 3-state Rev. 03 — 23 March 2006 Product data sheet 1. General description The 74LVT574; 74LVTH574 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an 8-bit, edge triggered register coupled to eight 3-state output buffers. The
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74LVT574;
74LVTH574
74LVTH574
LVTH574
aircraft logic gates
74LVT574
74LVT574D
74LVT574DB
74LVT574PW
74LVTH574D
74LVTH574PW
JESD78
SO20
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IDT7204L30TDB
Abstract: IDT7204L30DB qml-38535
Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED C Update boilerplate of document. Add devices 06 and 07. Add vendor CAGE 61772 as source of supply for devices 06 and 07. Editorial changes throughout. 93-11-15 M. A. Frye D Changes in accordance with NOR 5962-R187-95
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5962-R187-95
BP70602
IDT7204L30TDB
IDT7204L30DB
qml-38535
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5962-05208
Abstract: QML-38535 5962-0520804VYC AT60142FT-DS17MSV AT60142FT-DS17MMQ AT60142F-DS15MSR 01-03-02 ASTM B 488 AT60142F AT60142FT
Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Editorial corrections, removed designations for class T and N in paragraphs placed inadvertently. ksr 05-03-14 Raymond Monnin B Vendor requested change to Figure 1 case outline X note 3. Lid is not electrically connected to VSS. Add case outline Y. ksr
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T60142HT-DS17MSR
5962R0520804VYC
F7400
AT60142H-DS15MSR
BP70602
5962-05208
QML-38535
5962-0520804VYC
AT60142FT-DS17MSV
AT60142FT-DS17MMQ
AT60142F-DS15MSR
01-03-02
ASTM B 488
AT60142F
AT60142FT
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JESD78 revision E
Abstract: No abstract text available
Text: DG2750 Vishay Siliconix Low Voltage Dual SPDT Analog Switch with Negative Swing Audio Capability DESCRIPTION FEATURES The DG2750 is a dual SPDT low on-resistance switch designed to from a single 1.8 V to 5.0 V power supply. It is a bi-directional switch, and is capable of switching negative
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DG2750
DG2750
2011/65/EU
2002/95/EC.
2002/95/EC
2011/65/EU.
12-Mar-12
JESD78 revision E
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DG2750dn
Abstract: No abstract text available
Text: DG2750 Vishay Siliconix Low Voltage Dual SPDT Analog Switch with Negative Swing Audio Capability DESCRIPTION FEATURES The DG2750 is a dual SPDT low on-resistance switch designed to from a single 1.8 V to 5.0 V power supply. It is a bi-directional switch, and is capable of switching negative
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DG2750
DG2750
2011/65/EU
2002/95/EC.
2002/95/EC
2011/65/EU.
12-Mar-12
DG2750dn
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74ALVT16821
Abstract: 74ALVT16821DGG 74ALVT16821DL JESD78 SSOP56 TSSOP56 diode 1d8
Text: 74ALVT16821 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state Rev. 03 — 13 June 2005 Product data sheet 1. General description The 74ALVT16821 high-performance Bipolar Complementary Metal Oxide Semiconductor BiCMOS device combines low static and dynamic power dissipation with
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74ALVT16821
20-bit
74ALVT16821
10-bit,
74ALVT16821DGG
74ALVT16821DL
JESD78
SSOP56
TSSOP56
diode 1d8
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74ABT823
Abstract: 74ABT823D 74ABT823DB 74ABT823N 74ABT823PW JESD78 SO24 SSOP24 TSSOP24
Text: 74ABT823 9-bit D-type flip-flop with reset and enable; 3-state Rev. 02 — 7 February 2005 Product data sheet 1. General description The 74ABT823 bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data and address paths
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74ABT823
74ABT823
74ABT823D
74ABT823DB
74ABT823N
74ABT823PW
JESD78
SO24
SSOP24
TSSOP24
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