ISLA 8BIT ADC Search Results

delco ic

Abstract: Sorep SA
Contextual Info: VLSI T e c h n o l o g y , i n c . VP18322 T3PM Dual DS3 Framer/Performance Monitor FEATURES • Integrates two full-featured DS3 framer/performance monitors • Decodes a B3ZS-encoded signal and indicates line code violations • Frames to an M23 or C-bit parity

VL82c311

Abstract: vl82c486 386DX motherboard Phoenix BIOS VL82C486 bios VL82C310 VL82C311L topcat 386dx bios Phoenix BIOS VL82C486 bios setup vl82c380
Contextual Info: VL82C380 SINGLE-CHIP 386DX PC/AT ISA CONTROLLER WITH ON-CHIP CACHE CONTROLLER O v e r v ie w VLSI Technology, Inc.’s VL82C380 is a highly integrated 32-bit single-chip PC/AT controller with on-chip cache controller designed for use in 386DX-based ISA systems operating at up to 40

VL82C331-FC

Abstract: VL82c311 VL82C332-FC 386DX motherboard scamp VLB2C386-SET laptop MOTHERBOARD Chip Level MANUAL VL82C331FC topcat 386sX Single Board Computer
Contextual Info: O v e r v ie w The TOPCAT 386DX chip set from VLSI Technology, Inc., is a very high-integration chip set for use in the design of PC/AT -compatible based systems. This chip set is intended for use in 80386DX microprocessor-based systems with clock speeds from 16 to

z351

Abstract: SOREP Datasheet of ic 7660 "VLSI Technology Inc." 7442 pin diagram fn521 NE 7555 vlsi technology VP14374QC ANSI T1.403 CISCO
Contextual Info: fee 2 VLSI T e c h n o lo g y , in c . VP14374 QFDL QUAD FACILITY DATA LINK TRANSCEIVER FEATURES DESCRIPTION • Integrates four full-duplex HDLC data link interfaces in a single device The VP14374 QFDL Quad Facility Data Link Transceiver provides termination of

91667

Contextual Info: VLSI T ec h n o lo g y , in c . ADVANCE INFORMATION VP16341 E1XC CEPT E1 TRANSCEIVER FEATURES • Integrates a full-featured C E P T E1 transceiver in a single device with analog circuitry for receiving and transmitting D S X -1 A or G .7 0 3 2048 kbits per second compatible signals

Contextual Info: MP7684A CMOS 8-Bit High Speed Analog-to-Digital Converter M Micro Power Systems FEATURES • • • • • • • • • Low Power CMOS 300 mW • ESD Protection: 4000 Volts Minimum • Latch-Up Free Sampling Rates from 0.001 to 20 MHz (MSPS) 1/4 LSB DNL from 0.001 to 10 MHz

MC6870SP3S

Contextual Info: MOTOROLA m SEMICONDUCTOR TECHNICAL DATA MC68705P3 Technical Summary 8-Bit EPROM Microcomputer Unit 3 The MC68705P3 High-Density NMOS Microcomputer Unit (MCU) is an EPROM member of the MC6805 Family of microcomputers. The user programmable EPROM allows program changes and

BIT 31936

Abstract: Luscombe Engineering
Contextual Info: VLSI T ec h n o lo g y , in c . VP14374 QFDL QUAD FACILITY DATA LINK TRANSCEIVER FEATURES DESCRIPTION • Integrates four full-duplex HDLC data link interfaces in a single device The VP14374 QFDL Quad Facility Data Link Transceiver provides termination of

Contextual Info: SPEAr1310 Dual-core Cortex A9 embedded MPU for communications Data brief Features • CPU subsystem: – 2x ARM Cortex A9 cores, up to 600 MHz – Supporting both symmetric SMP and asymmetric (AMP) multiprocessing – 32+32 KB L1 Instructions/Data cache per

Contextual Info: SPEAr1310 Dual-core Cortex A9 embedded MPU for communications Data brief Features • CPU subsystem: – 2x ARM Cortex A9 cores, up to 600 MHz – Supporting both symmetric SMP and asymmetric (AMP) multiprocessing – 32+32 KB L1 Instructions/Data cache per

A0937

Contextual Info: Intelligent Access Voice Solutions AMDÌ1 Am79D2251 Dual Intelligent Subscriber Line Audio-Processing Circuit ISLAC™ DISTINCTIVE CHARACTERISTICS • High performance digital signal processor provides programmable control of all major linecard functions

P1001SC

Abstract: PQT064 PQT080 TISP61089 Am79Q2243 am79231 RSN 314 H 41 PLCC-34 Q1843 AM79q2242jc
Contextual Info: Intelligent Access Voice Solutions PRELIMINARY AMDB Am79Q2241/2242/2243 Quad Intelligent Subscriber Line Audio-Processing Circuit ISLAC™ DISTINCTIVE CHARACTERISTICS • High performance digital signal processor provides programmable control of all major

HD6309

Abstract: hitachi HD6309 HD63B09 HD63C09 PCR 606 J HD6809 adcb 27 byg 220 HD6800 HMCS6800
Contextual Info: HD63B09, HD63C09-CMOS MPU Micro Processing Unit Pin Arrangement Description The HD6309 is the highest 8-bit microprocessor of HMCS6800 family, which is compatible with the conventional HD6809. v ss NMI IRQ FiRQ BS BA Vcc Ao A, a2 A3 Ä4 As A6 Ä7

TEK 461

Abstract: SK TME 86 i on VM009-B 2272 m4 "vlsi technology" VM009 book cook
Contextual Info: MW 4 Mi V L S I Tech no lo gy , in c . VM009 HIGH-SPEED DES DEVICE FEATURES • Supports three ciphering operations: - Electronic Codebook ECB - Cipher Block Chaining (CBC) - Cipher Feedback (CFB) • Three data ports - Master Port - Slave Port - Auxiliary Port

6803 microprocessor

Abstract: 68B03 EF6803CMB 68A03 EF6803CV EF6803c EF68A03CV AN0842 ef-6800 EF6801-EF6803
Contextual Info: THOMSON COMPOSANTS MILITAIRES ET SPATIAUX EF 6803 NMOS 8-BIT MICROPROCESSOR ESCRIPTION 'he EF6803 is an 8-bit single-chip microprocessor unit MPU) which significantly enhances the capabilities of 6800 amily o f parts derived dram the 6801 microcomputer. It in­

386SX

Abstract: VL82C331 VL82C325 SCAMP VL82C320A fe 8622 fn521 tag 8622 AM386SX VL82C386SX
Contextual Info: AD V A N C E INFORM ATION V L S I T e c h n o lo g y in c. VL82C325 VL82C386SX SYSTEM CACHE CONTROLLER FEATURES • Optimized for TOPCAT 386SX and SCAMP™-LT chip sets • Supports memory configurations to 16 MB • • Programmable cache architecture

JXD4

Abstract: 386SX 386SX topcat VL82C320A HM62168 SCAMP 386SX CIRCUIT diagram SCAMP-LT Controller VLSI TECHNOLOGY vl82c31
Contextual Info: w V LSI Technology , inc . ADVANCE INFORMATION VL82C325 VL82C386SX SYSTEM CACHE CONTROLLER FEATURES • Optimized for TOPCAT 386SX and SCAMP™-LT chip sets Supports memory configurations to 16 MB • Programmable cache architecture - Block size: 8 or 16 bytes

vl82c486

Abstract: Phoenix BIOS VL82C486 bios Phoenix BIOS VL82C486 bios setup KB 7780 the-VL82C486 VL82C48 65ZD tag 8622 TAG7_ equivalent TAG3_ equivalent
Contextual Info: i-1* 3 i TO VLSI T ech n o lo g y , in c. ADVANCE INFORMATION VL82C425 486 CACHE CONTROLLER FEATURES • Single chip second-level cache control­ ler optimized for use with the VL82C486 System Controller • Look-aside architecture allows cache to be board-level option

VL16C450

Abstract: VL16C550 Delco 195 sorep s3607 MSR 200 VL16C550PC
Contextual Info: VLSI Tech no lo gy , in c . VL16C550 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFOs FEATURES DESCRIPTION • Fully compatible with VL16C450 ACE The VL16C550 is an asynchronous communications element ACE that is functionally equivalent to the VL16C450, and additionally incorpo­

HD6301YOCP

Abstract: 63B01Y HD63A01YOP HD63C01 HD6301Y0P HD6301Y0
Contextual Info: HD6301 Y0,HD63A01 YO, — H D63B01 YO, H D63C01 YO CMOS MCU M icrocom puter Unit The HD6301Y0 is a CMOS 8-bit single-chip microcomputer unit which contains a CPU compatible with the CM O S 8-bit microcomputer HD630ÍV, 16k bytes of ROM , 256 bytes of R A M ,

HD6309

Abstract: HD63B09 opel HD63C09 HD6800 HD6809 HMCS6800 Hitachi HD63B09 hitachi HD6309
Contextual Info: HD63B09, HD63C09-CMOS MPU Micro Processing Unit Pin A rrangem ent Description T h e HD6309 is the highest 8-bit m icroprocessor of H M CS6800 fam ily, w h ich is com patible w ith the conventional HD6809. vss L_ I O NMI IRQ FIRQ BS BA Vcc Ao A, a2

Contextual Info: V L S I T e c h n o l o g y , in c . VL16C554 QUAD ASYNCHRONOUS COMMUNICATIONS ELEMENT FEATURES - 5-, 6-, 7- or 8-bit characters - Even-, odd- or no-parity generation and detection - 1 , 1 1 /2, or 2 stop bit generation • Four 16550 C om patible Serial Ports

VL16C450

Abstract: VL16C451B Burr Brown PWR 74 91667 vlsi 486 Nippon capacitors traco power tme MARKING traco power txl VL16C451
Contextual Info: V L S I T ec h n o lo g y , in c . VL16C551 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO FEATURES • PC/AT-compatible • Enhanced bidirectional line printer port • 16-byte FIFO reduces CPU interrupts • Independent control of transmit, receive, line status and data set

tda 8690 an

Abstract: tda 8375 pin voltage H14DL EE21 type core VM007 "vlsi technology" D400 F 7B
Contextual Info: N92 V L S I T e c h n o l o g y , in c . VM007 DATA ENCRYPTION PROCESSOR FEATURES DESCRIPTION • Complete cryptographic processing system on a single chip Class 3 ESD protection above 4000V • Supports clock frequencies to 30 MHz Pending validation by National