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    IP CORES FOR OPTICAL SYSTEMS Search Results

    IP CORES FOR OPTICAL SYSTEMS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TMPM3HMFYAFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP80-1212-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HPFYADFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP128-1420-0.50-001 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HLFYAUG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP64-1010-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HNFZAFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP100-1414-0.50-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HLFZAUG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP64-1010-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation

    IP CORES FOR OPTICAL SYSTEMS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Turbo decoder Xilinx

    Abstract: verilog code for floating point adder 80C31 instruction set dvb-RCS chip AX1610 65-bit verilog code for FFT 32 point G.727 matlab vhdl code of 32bit floating point adder vhdl code direct digital synthesizer
    Text: R Chapter 2: Design Considerations Loading Keys DES keys can only be loaded through JTAG. The JTAG Programmer and iMPACT tools have the capability to take a .nky file and program the device with the keys. In order to program the keys, a “key-access mode” is entered. When this mode is entered, all of the


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    PDF UG012 Turbo decoder Xilinx verilog code for floating point adder 80C31 instruction set dvb-RCS chip AX1610 65-bit verilog code for FFT 32 point G.727 matlab vhdl code of 32bit floating point adder vhdl code direct digital synthesizer

    DPS module

    Abstract: No abstract text available
    Text: Applications Networking Virtex-II Platform FPGAs Support System Packet Interface Standards for Optical Networks The production release of SPI-4 Phase 2 cores to Xilinx communication customers worldwide, is a critical technology boost for multi-service, packet, and cell-based networking equipment.


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    PDF OC-192 10-channel DPS module

    xilinx vhdl code for floating point square root

    Abstract: multiplier accumulator MAC code verilog multi channel UART controller using VHDL 80C31 instruction set vhdl code of 32bit floating point adder verilog code for floating point adder xilinx logicore fifo generator 6.2 xilinx vhdl code for floating point square root o vhdl code for 3-8 decoder using multiplexer vhdl code 32bit LFSR
    Text: R Using the CORE Generator System Introduction This section on the Xilinx CORE Generator System and the Xilinx Intellectual Property IP Core offerings is provided as an overview of products that facilitate the Virtex-II design process. For more detailed and complete information, consult the CORE Generator


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    PDF XC2V1000-4 UG002 xilinx vhdl code for floating point square root multiplier accumulator MAC code verilog multi channel UART controller using VHDL 80C31 instruction set vhdl code of 32bit floating point adder verilog code for floating point adder xilinx logicore fifo generator 6.2 xilinx vhdl code for floating point square root o vhdl code for 3-8 decoder using multiplexer vhdl code 32bit LFSR

    gennum

    Abstract: SuperSpeed USB 3.0 to Serial ATA Bridge pioneer corporation tsx micro hdmi SDI ip cores for optical systems
    Text: Gennum Corporate Overview August 2009 Overview Gennum Corporation TSX: GND designs innovative semiconductor solutions and intellectual property (IP) cores for the world’s most advanced consumer connectivity, video broadcast and data communications products. Leveraging the company’s proven


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    Untitled

    Abstract: No abstract text available
    Text: View from the top Platform FPGAThe Future of Logic Design Xilinx and its partners are building the high-performance technology platform on which the designs of the future will emerge. 4 View from the top The IBM Partnership By: Wim Roelandts, CEO, Xilinx The revolution in logic design continues, bringing dramatic performance improvements and new capabilities that help you create the systems of the future, and get them to


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    Celoxica

    Abstract: PCIX-66 XC2VP50
    Text: New Product Virtex-II Pro Platform FPGA Virtex-II Pro FPGAs: The Platform for Programmable Systems Has Arrived The Virtex-II Pro solution heralds a paradigm shift in system architecture by moving design based on zones of programmability to entire system-level programmability.


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    SGMII PCIE bridge

    Abstract: pcie Designs guide wishbone Scatter-Gather direct memory access SG-DMA TN1084 wishbone rev. b SFP CPRI EVALUATION BOARD PCI Express footprint ddr1 ram Ethernet to PCIe Bridge
    Text: f u l l y t e s t e d a n d i n t e r o p e r a b l e Lattice PCIe Solutions Ready-to-Use PCIe Portfolio Lattice provides designers with low cost, low power, programmable solutions that are ready-to-use right out of the box. A suite of tested and interoperable solutions is available for PCI Express,


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    PDF 8b/10b 1-800-LATTICE LatticeMico32, I0195A SGMII PCIE bridge pcie Designs guide wishbone Scatter-Gather direct memory access SG-DMA TN1084 wishbone rev. b SFP CPRI EVALUATION BOARD PCI Express footprint ddr1 ram Ethernet to PCIe Bridge

    SGMII PCIE bridge

    Abstract: Scatter-Gather direct memory access SG-DMA TN1084 lvds serdes project wishbone rev. b
    Text: f u l l y t e s t e d a n d i n t e r o p e r a b l e Lattice PCIe Solutions Ready-to-Use PCIe Portfolio Lattice provides designers with low cost, low power, programmable solutions that are ready-to-use right out of the box. A suite of tested and interoperable solutions is available for PCI Express,


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    PDF Interope/10b 1-800-LATTICE LatticeMico32, I0195C SGMII PCIE bridge Scatter-Gather direct memory access SG-DMA TN1084 lvds serdes project wishbone rev. b

    SGMII PCIE bridge

    Abstract: RGMII to SGMII bridge SGMII RGMII bridge StrataXGS EVALUATION BOARD 88E1111 Marvell 88E1111 mdio 88E1111 jumbo GMII Marvell PHY 88E1111 Datasheet 88e1111 mii fpga ethernet sgmii
    Text: f u l l y t e s t e d a n d i n t e r o p e r a b l e Lattice Ethernet Solutions Ready-to-Use Ethernet Portfolio Lattice provides customers with low cost and low power programmable solutions that are ready-to-use right out of the box. A full suite of tested and interoperable solutions is available for Ethernet


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    PDF 10GbE, 1-800-LATTICE LatticeMico32, I0194B SGMII PCIE bridge RGMII to SGMII bridge SGMII RGMII bridge StrataXGS EVALUATION BOARD 88E1111 Marvell 88E1111 mdio 88E1111 jumbo GMII Marvell PHY 88E1111 Datasheet 88e1111 mii fpga ethernet sgmii

    STS-48

    Abstract: airbus logic gates
    Text: White Paper Building Blocks for Rapid Communication System Development Introduction The explosive growth of the Internet has placed huge demands on the communications industry to rapidly develop and deploy new products that support a wide array of protocols with a highly flexible architecture. The aggregate


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    microcontroller 8051 application traffic light

    Abstract: 8051 project on traffic light controller traffic light using 8051 gals wrapper design "Crosspoint Switch" 10Gbps DFPIC1655X 8051 microcontroller data sheet D8254 GPIP UTI USB
    Text: Lattice Semiconductor Corporation • October 2003 • Volume 9, Number 1 In This Issue New XPIO 10Gbps SERDES Lattice Applications Solutions Portal Automotive Temperature Range ispPAC Power Manager Devices Lattice Wins Top Programmable Device Award ispLeverCORE™


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    PDF 10Gbps 128-Macrocell 4000Z 56-Ball NL0105 microcontroller 8051 application traffic light 8051 project on traffic light controller traffic light using 8051 gals wrapper design "Crosspoint Switch" 10Gbps DFPIC1655X 8051 microcontroller data sheet D8254 GPIP UTI USB

    ieee embedded system projects free

    Abstract: vhdl coding for error correction and detection vhdl code for 8-bit parity checker vhdl code for 3 bit parity checker AUTOMATIC TRANSMISSION GEARBOXES scrambler solomon 8237 verilog vhdl code for parity checker ORLI10G embedded system projects free
    Text: I N T E L L E C T U A L P R O P E R T Y C O R E S ispLeverCORE Re-Usable, Fully-Tested IP Modules Lattice’s new ispLeverCORE IP modules are large, modular design blocks that can be reused and easily placed within a programmable logic design. ispLeverCORE modules implement popular industry-standard functions, commonly used in communications, bus interface, memory


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    PDF 1-800-LATTICE I0160 ieee embedded system projects free vhdl coding for error correction and detection vhdl code for 8-bit parity checker vhdl code for 3 bit parity checker AUTOMATIC TRANSMISSION GEARBOXES scrambler solomon 8237 verilog vhdl code for parity checker ORLI10G embedded system projects free

    MLC3890

    Abstract: MLC1036 pioneer audio ic MLC3390 Usb circuit in vcd player voice control home appliances MLN7010 MLC3100A MLC3500 MLN7000
    Text: At the Heart of Digital Convergence Leading the MCS Logic Inc., as a fabless semiconductor company, is competing with top-class international companies. MCS Logic is a fabless semiconductor company that designs, develops, and markets advanced semiconductor integrated circuits ICs and


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    IXS1000

    Abstract: circuit diagram of voice recognition power consumption of each block of Intel IXP1200 IXP1200 "caller id" "call waiting"
    Text: Optimized High-Density Voice over Packet VoP Architecture for Next-Generation Networks White Paper June 2001 Order Number: 249745-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual


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    28HP

    Abstract: pcie gen3 10GBASE-KR class 10 up board Datasheet 2012 CPRI Multi Rate datasheets of optical fpgas germanium power devices corporation germanium small signal power devices corporation pcie X1 edge connector pcie X8
    Text: Introducing Innovations at 28 nm to Move Beyond Moore’s Law WP-01125-1.1 White Paper In addition to processing techniques, FPGA innovations allow Altera to move beyond Moore’s Law to meet higher bandwidth requirements while meeting cost and power budgets. Altera’s Stratix V FPGAs provide breakthrough bandwidth via 28-Gbps


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    PDF WP-01125-1 28-Gbps ebcasts/all/wc-2010-introducing-stratix-v 28HP pcie gen3 10GBASE-KR class 10 up board Datasheet 2012 CPRI Multi Rate datasheets of optical fpgas germanium power devices corporation germanium small signal power devices corporation pcie X1 edge connector pcie X8

    usb boombox

    Abstract: wireless SURROUND sound system car audio connection 80C51 internet jukebox processor 5.1 channel surround sound IC 2.0 to 5.1 surround output DSPs
    Text: Semiconductors Tune into the sound of life Semiconductor solutions for digital audio Superb listening, desirable systems What does audio mean to you? • A beautifully rich surround sound environment created by multichannel hi-fi? • The thrill of a dramatic movie soundtrack, brought to life by multimedia entertainment systems?


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    viterbi IESS-308/309

    Abstract: xilinx logicore core dds Automatic Railway Gate Control system, CORDIC system generator xilinx xilinx logicore core dds square wave XAPP474 CORDIC to generate sine wave fpga spartan3 fpga development boards dvb-s encoder design with fpga Sequential IESS-308/309
    Text: Application Note: Spartan-3 FPGA Series R Using IP Cores in Spartan-3 Generation FPGAs XAPP474 v1.1 June 19, 2005 Summary This document provides an overview of the Xilinx CORE Generator System and the Xilinx Intellectual Property (IP) offerings that facilitate the Spartan™-3 Generation design process.


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    PDF XAPP474 27MHz viterbi IESS-308/309 xilinx logicore core dds Automatic Railway Gate Control system, CORDIC system generator xilinx xilinx logicore core dds square wave XAPP474 CORDIC to generate sine wave fpga spartan3 fpga development boards dvb-s encoder design with fpga Sequential IESS-308/309

    DCI circuit diagram

    Abstract: No abstract text available
    Text: Overview Platform FPGA Virtex-II Platform FPGA Solution Launches New Era of High Performance System Design The result of the largest silicon and software R&D effort in the history of programmable logic, the Virtex-II Platform FPGA solution has produced major improvements in engineering productivity,


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    gsm simulink

    Abstract: JESD204 VITA-57 SFP CPRI EVALUATION BOARD VHDL code for high speed ADCs using SPI with FPGA dvb-s encoder design with fpga TC7000-LTE VITA-57 fmc fft algorithm verilog in ofdm Reed-Solomon encoder verilog for wimax
    Text: f u l l y t e s t e d a n d i n t e r o p e r a b l e Lattice Wireless Solutions Ready-to-Use Wireless Portfolio Lattice provides customers with low cost and low power programmable solutions that are ready-to-use right out of the box. For wireless applications, a full suite of tested solutions are available


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    PDF JESD204 LatticeMico32 1-800-LATTICE LatticeMico32, I0197 gsm simulink VITA-57 SFP CPRI EVALUATION BOARD VHDL code for high speed ADCs using SPI with FPGA dvb-s encoder design with fpga TC7000-LTE VITA-57 fmc fft algorithm verilog in ofdm Reed-Solomon encoder verilog for wimax

    Toshiba TMPA8873

    Abstract: TA1343NG TMPA8891 TMPA8893 tmpa8873 tmpa8859 TC90A96BFG TB1318FG TMPA8857 TMPA8853
    Text: 2007-5 SYSTEM CATALOG TV Solutions Guide Digital and Analog Flat TV Organizations Contents ● ICs for Tuners…………………………………4-5 Digital Broadcasting Digital Broadcast Signal Processing DRAM ● PIF/SIF Systems…………………………………6


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    PDF SCE0001C S-167 SCE0001D Toshiba TMPA8873 TA1343NG TMPA8891 TMPA8893 tmpa8873 tmpa8859 TC90A96BFG TB1318FG TMPA8857 TMPA8853

    GPON

    Abstract: GPON OLT OLT GPON design ideas Reed-Solomon interlaken interlaken network processor Sarance Technologies 10g EPON olt
    Text: Flexible, Scalable, and Ready for Deployment GPON Solutions from Altera While meeting new standards and time-to-market requirements remains important, you also need to lower cost and power consumption in your gigabit passive optical network GPON or Ethernet passive optical network (EPON)


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    PDF SS-01026-4 GPON GPON OLT OLT GPON design ideas Reed-Solomon interlaken interlaken network processor Sarance Technologies 10g EPON olt

    ZR36722

    Abstract: Usb circuit in vcd player dvd optical pickup Laser Diode for dvd Recording ZR36 dvd servo control ic dolby true HD circuit zoran vaddis 9 20/ni usb 6501
    Text: CONNECT SHARE E N T E R TA I N Activa Activa® 200 + 250 DVD RECORDER SYSTEM-ON-A-CHIP + ANALOG FRONT END DVD D I G I TA L C A M E R A D I G I TA L T V D I G I TA L P R I N T I N G MOBILE IP CORES Product Brief Zoran Corporation 1390 Kifer Road Sunnyvale, CA 94086


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    soc toshiba

    Abstract: 90 nm CMOS soc 1044 TC280 B707 cmos logic 90nm 90-nm CMOS standard cell library process technology toshiba transistors selection guide TOSHIBA
    Text: 2003-2 PRODUCT GUIDE BCE0012A 90nm Ldrawn=70nm CMOS ASIC TC300 Family 2003 http://www.semicon.toshiba.co.jp/eng SoC Solution for a Wide Range of UltraHigh-Performance and Ultra-Low-Power Applications TC300 Family Features and Benefits Ultra-High Density and Ultra-Low Power


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    PDF BCE0012A TC300 90-nm 70-nm-drawn F-93561, soc toshiba 90 nm CMOS soc 1044 TC280 B707 cmos logic 90nm 90-nm CMOS standard cell library process technology toshiba transistors selection guide TOSHIBA

    interlaken

    Abstract: Altera Cyclone IV sfp design kit of optical fpgas 100G Development Kit
    Text: Stratix IV GT FPGA design resources for 100G applications Altera offers two design resources to help you evaluate Stratix IV GT FPGAs: a signal integrity development kit and a 100G demo board. Ideal for high-bandwidth 40G and 100G applications, Stratix IV GT FPGAs are the market’s lowest power high-density, high-performance FPGAs with


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    PDF 10-Gbps SS-01064-1 interlaken Altera Cyclone IV sfp design kit of optical fpgas 100G Development Kit