IC TTL AND Search Results

dtl logic gates

Abstract: ttl NAND gate circuit series inverter circuit diagrams 9000 ttl 930 series dtl ttl NAND gate with expander K 9008 TTL 7430 6 a 8 mic 4 pin mic circuit
Contextual Info: Logic Integrateci Circuits, MIC 9 0 0 0 Series TTL C irc u it F unctions Compatible w ith M IC 930 Series DTL and other TTL and DTL Series M IC M IC M IC M IC M IC M IC M IC M IC M IC M IC M IC M IC M IC 9000 9001 9002 9003 9004 9005 9006 9007 9008 9009 9012

Contextual Info: Agilent 10529A Logic Comparator Dat a Sheet Inputs Input Threshold: 1.4V nominal 1.8V nominal with socket board , TTL or DTL compatible. Test IC Loading: Outputs driving Test IC inputs are loaded by 5 low-power TTL loads plus input of Reference IC. Test IC outputs are loaded by 2 low-power TTL loads.

signal path designer

Contextual Info: PRELIMINARY D E V IC E S P E C IF IC A T IO N 320000 SERIES ECL/TTL "TURBO" LOGIC ARRAYS 020000 FEATURES PERFORMANCE SUMMARY PARAMETER Typical gate delay* Maximum toggle frequency Maximum TTL input frequency Maximum TTL output frequency Maximum ECL input frequency

omron MAGNETIC card reader HEAD

Abstract: iso 7813 omron MAGNETIC HEAD pump magnetic card reader 3 track "iso magnetic head" 3S4YR-SGR0J MAGNETIC HEAD 1 track reader 3 track magnetic head card reader MAGNETIC HEAD 2 track reader MAGNETIC HEAD
Contextual Info: Insert Magnetic/IC Card Reader 3S4YR-SGR Compact Insert Reader with Magnetic or IC Card Interface • Landing-style IC contact ■ Red and green LEDs for operation status indication ■ Solenoid-controlled IC card release mechanism ■ TTL-compatible interface

Contextual Info: « 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 S E M IC O N D U C T O R FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise

Contextual Info: * 9-BIT LATCHED ECL-TO -TTL SYNERGY SY10H603 SY100H603 S E M IC O N D U C T O R FEATURES DESCRIPTION 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise Dual supply

16f8

Contextual Info: data detayW devices;inc. 7a s t L o g ic Programmable Delay Units SERIES: PDU-16F 6-Bit TTL Interfaced Features: T es t C o nditions: • Input & Output TTL buffered ■ 6-Bit TTL program m able delay line ■ Two (2) Separate outputs; inverting and non-inverting.

ic 3525 internal block diagram

Abstract: ic 3525
Contextual Info: SYNERGY SINGLE SUPPLY OCTAL PECL/TTL-tO -TTL C'° SY100H646 S E M IC O N D U C T O R FEATURES PECL/TTL-to-TTL version of popular ECLinPS El 11 Meets specifications required to drive highperformance x86 processors Guaranteed low skew specification Three-state enable

Contextual Info: O SING LE SUPPLY PEC L-TTL 1:4 C LO C K DRIVER SYNERGY S E M IC O N D U C T O R FEATURES S Y ^o'lo'ohS l DESCRIPTION • Translates positive ECL to TTL PECL-TTL The SY10H841 and SY100H841 are single supply, low skew translating 1:4 clock drivers. The devices feature a 24m A TTL output stage, with AC

SN74ALS900

Abstract: Advanced Schottky Family ci 741 SN54ALS900 LS 741
Contextual Info: Attachment B-15 y PRELIMINARY DATA SHEET ADVANCED LOW-POWER SCHOTTKY TTL TYPES SN54ALS900 and SN74ALS900 QUAD 2 - INPUT NAND BUFFERS QUAD 2- INPUT NAND BUFFERS * * * ELECTRICAL PINOUT ADVANCED OX IDE-ISOLATED, IONIMPLANTED SCHOTTKY TTL PROCESS pos itive 1og ic :

uA 741 IC pin configuration

Abstract: internal circuit diagram of IC 741 ic 741 datasheet internal diagram of 741 IC uA 741 OF IC 741 pin diagram of ic 741 uA 741 IC shift register ic pdf of 741 ic
Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Preliminary Datasheet 500 Mb/s Video Shift Register IC VSC6424 Features • ECL and TTL I/Os: ECL for high-speed interface, TTL for low-speed interface • Multiplex or Demultiplex Operation • Selectable Shift Register Length

FT232R

Abstract: FT232RQ TTL232R-3V3 ft232r MAX232 MAX232 TTL232R TTL-232R TTL-232R-3V3 UART TTL buffer serial port to ttl using max232
Contextual Info: Future Technology Devices International Ltd. TTL-232R USB to TTL Serial Converter Cable The TTL-232R is a USB to TTL serial converter cable incorporating FTDI’s FT232RQ USB - Serial UART interface IC device, the latest device to be added to FTDI’s range of USB UART interface Integrated Circuit Devices. It is designed

CY101E383

Abstract: diode SKE 39
Contextual Info: W r CY10E383 CY101E383 CYPRESS ECL/TTL/ECL Translator and High-Speed Bus Driver Features Functional Description • B iC M O S for optim um speed/power • H igh speed max. — 2.5 n s Ipu TTL-to-EC L — 3.5 n s tpo EC L-to-TTL The CY10/101E383 is a new-generation

max232 rts cts

Abstract: TTL-232R-3V3 cmos 3v3 TTL232R-3V3 FT232RQ FT232R USB UART ttl drive USB CABLE MAX232 for level converter notes on serial communication MAX232
Contextual Info: Future Technology Devices International Ltd. TTL-232R-3V3 USB to TTL Serial Converter Cable The TTL-232R-3V3 is a USB to TTL serial converter cable incorporating FTDI’s FT232RQ USB - Serial UART interface IC device, the latest device to be added to FTDI’s range of USB UART interface Integrated Circuit Devices. It

7400 fan-out

Abstract: 7402 nor 7491 8-bit 7490 Decade Counter TTL 7400 TTL 7400 AND propagation delay TTL 7400 propagation delay TTL 7475 TTL 7490 7402 J-K Flip-Flop
Contextual Info: Logic Integrateci Circuits, MIC 7400 Series TTL G a te s in order of gates per package Type M IC M IC M IC M IC M IC M IC M IC M IC M IC M IC M IC M IC 7430 7453 7454 7420 7440 7450 7451 7460 7410 7400 7401 7402 Positive logic definition Gates per package

pnp 8 transistor array ttl

Abstract: MB7130E MB7130H dis40
Contextual Info: MB7130E MB7130H FUJITSU M IC R O E L E C T R O N IC S HIGH SPEED SCHOTTKY TTL 8192-BIT PROM DESCRIPTION The Fujitsu M B7130 is a high speed Schottky TTL electrically field programmable read only memory organized as 1024 words by 8-bits. W ith three-state outputs

Contextual Info: MBM93419 FUJITSU M IC R O E L E C T R O N IC S . INC. TTL 576-BIT BIPOLAR RANDOM ACCESS MEMORY DESCRIPTION The Fujitsu MBM93419 is a high speed TTL read/write randomaccess memory, organized as 64 words by 9 bits, with opencollector outputs. M BM93419 is packaged in a

Contextual Info: r a s t Log ic Pulse Width DiSCriminatOr I series PWD.21 ^ TTL Interfaced Features: • Auto-insertable. ■ Completely interfaced with TTL and DTL application. ■ No external components required. ■ P.C. board space economy achieved. ■ Fits standard 14 pins DIP socket.

Contextual Info: TPD1039S TOSHIBA Intelligent Power Device Silicon Monolithic Power MOS IC TPD1039S Low-Side Switch for Motor, Solenoid and Lamp Drive TPD1039S is a monolithic power IC for low-side switch. The IC has a vertical MOSFET output which can be directly driven from a CMOS or TTL logic circuit e.g., an MPU . The IC

TPD*1039s

Abstract: tpd1039s 1039S
Contextual Info: TPD1039S TOSHIBA Intelligent Power Device Silicon Monolithic Power MOS IC TPD1039S Low-Side Switch for Motor, Solenoid and Lamp Drive TPD1039S is a monolithic power IC for low-side switch. The IC has a vertical MOSFET output which can be directly driven from a CMOS or TTL logic circuit e.g., an MPU . The IC

TPD*1039s

Abstract: TPD1039S 1039s
Contextual Info: TPD1039S TOSHIBA Intelligent Power Device Silicon Monolithic Power MOS IC TPD1039S Low-Side Switch for Motor, Solenoid and Lamp Drive TPD1039S is a monolithic power IC for low-side switch. The IC has a vertical MOSFET output which can be directly driven from a CMOS or TTL logic circuit e.g., an MPU . The IC

"power MOSFET" reliability report

Abstract: TPD1039S
Contextual Info: TPD1039S TOSHIBA Intelligent Power Device Silicon Monolithic Power MOS IC TPD1039S Low-Side Switch for Motor, Solenoid and Lamp Drive TPD1039S is a monolithic power IC for low-side switch. The IC has a vertical MOSFET output which can be directly driven from a CMOS or TTL logic circuit e.g., an MPU . The IC

H600

Abstract: MC10H645 TTL 3 input and
Contextual Info: * 1:9 TTL CLOCK DRIVER SYNERGY S EM IC O N D U C TO R DESCRIPTION FEATURES The SY10H645 is a single supply, low skew, TTL I/O 1:9 Clock Driver. Devices in the H600 clock driver family utilize the 28-tead PLCC for optimal power and signal pin placement. The device features a 24mA TTL output stage with AC

Contextual Info: fax id: 5000 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Featu res • B iC M O S for optimum speed/p ow er • High speed max. — 3.0 ns tpD TTL-to-ECL — 4 ns t PD ECL-to-TTL • Low skew < ± 1 ns • Can o perate on single +5V supply