IC PIN CONFIGURATION 74LS138 Search Results

l381

Abstract: and gate 74LS138 74ls138 function 74LS138 pin for 74LS138 74LS138 pin diagram SP74SC138F SP74SC138N pin diagram demultiplexer 74LS138
Contextual Info: y SP74SC138 DECODER/DEMULTIPLEXER PIN CONFIGURATION A FEATURES B • Designed for high performance memory decoders in microprocessor systems ■ 3 to 8 line decoders include 3 enable inputs ■ Pin com patible with 74LS138 ■ SPI CMOS technology ■ Full TTL interface capability

pin diagram of ic 74ls138

Abstract: 74LS138 pin configuration ic 74ls138 74LS138 pin diagram 74ls138 function 74LS138 LOGIC OF 74LS138 74LS138 3 to 8 decoder Pin pin for 74LS138 74ls138 3-8
Contextual Info: 74LS138, S138 Signetics Decoders/Demultiplexers 1-Of-8 Decoder/Demultiplexer Product Specification Logic Products FEATURES • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Direct replacement for Intel 3205 74LS138

74LS138P

Abstract: M74LS138P 20-PIN pin diagram 14 demultiplexer 3DCX
Contextual Info: DESCRIPTION The M 74LS138P is a consisting o f a 3 -b it s em ico n d u c to r b in a ry -o c ta l in teg rated c irc u it PIN CONFIGURATION TOP VIEW d e c o d e r/d e m u ltip le x e r w ith enable inputs. FEATURES • 3 classes o f enable in puts • 4 t o 1 6 d e c o rd e r/d e m u ltip le x e r fu n c tio n s are provid ed

M02S7S7

Contextual Info: GD54/74LS138 3-TO-8-LINE DECODERS/DEMULTIPLEXERS Feature Pin Configuration • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems • Incorporate 3 Enable Inputs to Simplify Cascading AND/OR Data Reception • Schottky Clamped for High Performance

Contextual Info: GD54/74LS138 3-TO-8-LINE DECODERS/DEMULTIPLEXERS Feature Pin Configuration • • • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems Incorporate 3 Enable Inputs to Simplify Cascading AND/OR Data Reception Schottky Clamped for High Performance

LOGIC OF 74LS138

Abstract: pin for 74LS138 74LS138 3 to 8 decoder notes 74LS138 74LS138 pins 74l5138 of 74LS138 3 to 8 decoder 74ls138 function TTL 74ls138 74LS138 3 to 8 decoder Pin
Contextual Info: 74LS138, S138 Signetics Decoders/Dem ultiplexers 1-Of-8 D e co d e r/D e m u ltip le xe r Product Specification L o g ic P rod ucts FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory chip select decoding

block diagram of 74LS138 3 to 8 decoder

Abstract: block diagram of 74LS138 1 line to 16 line TTL 74ls138 74LS138 74LS138 3 to 8 74LS138 application note 74LS138 pin configuration 74LS138 3 to 8 decoder Pin of 74LS138 3 to 8 decoder 74ls138 3-8
Contextual Info: GD54/74LS138 3-TO-8-LINE DECODERS/DEMULTIPLEXERS Feature • Pin Configuration • D esigned Specifically for High S p e e d M em ory D ec o d e rs and Data Transm ission System s Incorporate 3 Enable Inputs to Simplify Cascading • A N D /O R Data R eception

TMS320D

Abstract: dpdi EC K2U 74299 TMS320C30 EF vs EC LS74
Contextual Info: TLC32044C, TLC32044I VOICE BAND ANALOG INTERFACE CIRCUITS D3098, MARCH 1988-REV ISED DECEMBER 1990 Advanced LinCMOS Silicon-Gate Process Technology N PA C KA G E T O P V IE W NU C 1 ^ 2 8 D n u RESET C 2 27 U n u EODR C 3 26 J I N FSR C 4 24 D A U X IN +

VL82c311

Abstract: VL82C1 VL82C310 VL82C310/VL82C311/VL82C311L VL82C311/VL82C311L VL82C310/VL82C311/
Contextual Info: ADVANCE INFORMATION V L S I T e c h n o lo g y , in c. VL82C310/VL82C311/VL82C311L SINGLE CHIPAT, MID-RANGE PERFORMANCE SCAMP CONTROLLER FEATURES • Fully compatible with 286- or 386SXbased PC/AT compatible systems VL82C311L is 286 compatible only • Includes:

Contextual Info: A N A LO G D E V IC E S □ FEATURES Complete 12-Bit D/A Function On-Chip Output Amplifier High Stability Buried Zener Reference Fast 40ns Write Pulse 0.3" Skinny DIP and PLCC Packages Single Chip Construction Monotonicity Guaranteed Over Temperature Settling Time: 3p.s max to 1/2LSB

7HC125

Abstract: ic 74ls138 block diagram of 74LS138 1 line to 16 line ic 74ls138 details ic 74ls138 pdf datasheet 74LS138 HP5082-2835 MC68000 MP7652 MP7652AN
Contextual Info: MP7652 4-Channel Voltage Output 15 MHz, Input Bandwidth, 8-Bit Multiplying DACs with 3-Wire Serial Digital Port and Independent References FEATURES • Low Harmonic Distortion: 0.25% typical with VREF = 1 V p-p @ 1 MHz • VREF/2 Output Preset Level • Latch-Up Free

6821 pia

Abstract: PIA 8255 hdpl2416 HPDL-2614 truth table for ic 7404 8085 microprocessor program 68a00 PIA 6821 6821 (PIA) HPDL-2416
Contextual Info: i Ihfíl P a c k a rd i i N APPLICATION NOTE 1026 Designing with Hewlett-Packard’s HPDL-2416 Smart Display TABLE OF CONTENTS INTRO DUCTION . ELECTRICAL DESCRIPTION 1 .

ad767

Abstract: ceramic capacitor codes AD767J DB11-D80
Contextual Info: ANALOG DEVICES □ FEATURES Complete 12-Bit D/A Function On-Chip Output Amplifier High Stability Buried Zener Reference Fast 40ns Write Pulse 0.3" Skinny DIP and PLCC Packages Single Chip Construction Monotonicity Guaranteed Over Temperature Settling Time: 3|is max to 1/2LSB

7HC125

Abstract: 74LS138 HP5082-2835 MC68000 MP7641 MP7641AN MP7641AS MP7651 composite to sdi converter
Contextual Info: MP7641 8-Channel Voltage Output 10 MHz Input Bandwidth 8-Bit Multiplying DACs with Serial Digital Port FEATURES • DACs Matched to +0.5% typ • Chip Select Available: MP7651 • Low Harmonic Distortion: 0.25% typical with VREF = 1 V p-p @ 1 MHz • VREF/2 Output Preset Level

microprocessor 8255 application seven segment

Abstract: ICM7135 icl7211 exclusive or pin diagram cd4030 LCD 1602 D1 74c915 7 segment common anode g3jb CI 74LS138 ICM7211
Contextual Info: A 1 /J X I/M Four D ig it D isplay D ecoder/D rivers - - Features The Maxim ICM7211 LCD and ICM7212 (LED) four digit, seven segment display drivers include input data latches, BCD to segment decoders, and all level translation and tim ing circuits needed to drive non­

74c915

Abstract: ICM7135 m72 seven segment display icl7211 M72 BCD to Seven Segment display 7 segment common anode 7211am ICL7135 m72 seven segment M72 7 segment
Contextual Info: JV\JVXAJV\ 19-959; Rev. 2; 11/05 Four D igit Display D ecoder/D rivers The M axim ICM7211 LC D and ICM7212 (LED) fo u r digit, seven segm ent display drivers include inp ut data latche s, B C D to segm ent d e co d e rs, and all level translation and tim in g circu its needed to drive non­

schematic diagram tv sony kv 2197

Abstract: scheme tv color tucson LOG100 ADC600 ISO106 sony ccd ADC-817 adc817 SDM857 SHC76
Contextual Info: HOW TO USE THIS BOOK If you know the MODEL NUMBER, Use the Model Index on the INSIDE FRONT COVER. If you know the PRODUCT TYPE, Use the TABBED TABLE OF CONTENTS on page v. Or, use the SELECTION GUIDE TABLES at the front of each tabbed section. If you know the M ODEL

Contextual Info: y k i y j x i y k i Four D ig it Display D ecoder/D rivers _ Features The Maxim ICM7211 LCD and ICM7212 (LED) four digit, seven segment display drivers include input data latches, BCD to segment decoders, and all level translation and tim ing circuits needed to drive non­

schematic diagram of TV memory writer

Abstract: ES688 es688 audio drive sound card es1869 ES1869F sound card schematics GP-019-1 2N600 62H01 ES1869S
Contextual Info: ES1Ô69 A udioDr'we Solution Data Sheet ESS Technology, Inc. DESCRIPTION The ES1869 AudioDrive® solution is a mixed-signal single chip that adds 16-bit stereo sound and FM music synthesis to personal computers. It is compliant with the Microsoft® PC 97 and PC 98 specification and WHQL

Contextual Info: ES1869 A udioDr'we Solution Data Sheet ESS Technology, Inc. DESCRIPTION The ES1869 AudioDme® solution is a mixed-signal single chip that adds 16-bit stereo sound and FM music synthesis to personal computers. It is compliant with the Microsoft® PC 97 and PC 98 specification and WHQL

Contextual Info: ES1879 AudioDr'we Solution Data Sheet ESS Technology, Inc. DESCRIPTION The ES1879 /WoDrive® solution is a mixed-signal single-chip solution that adds 16-bit stereo sound and FM music synthesis to notebook computers. It is compliant with the Microsoft® PC97 and PC98 specifications and WHQL audio

isa bus interfacing with microprocessor 8088

Abstract: 8085 timing diagram for interrupt 8080a intel microprocessor pin diagram 8085 schematic with hardware reset 80586 u1j marking code quart intel 8080A instruction set i8231 8085 intel microprocessor block diagram
Contextual Info: XR82C684 j C CMOS Quad Channel UART QUART 'E X A R September 1999-2 FEATURES • Four Full-Duplex, Independent Channels • Two Multi-function 16-bit Counter/Timers • Asynchronous Receiver and Transmitter • • Quadruple-Buffered Receivers and Transmitters

SN74299

Abstract: D3188 TMS320C1
Contextual Info: TLC32045C, TLC32045I VOICE BAND ANALOG INTERFACE CIRCUITS D3188. DECEMBER 1988-REVISED DECEMBER 1990 Advanced LinCMOS Silicon-Gate Process Technology N PACKAGE TOP VIEW NU C 1 L ^ 2 8 U n u 27 U n u RESET C 2 26 J IN + EODR C 3 16-Bit Dynamic Range Input with

block diagram of 74LS138 3 to 8 decoder

Abstract: 6802 processor motorola intel 8748 HCTL-2016 circuit datasheet 6802 processor motorola HCTL-2020 M027 Interfacing the HCTL-20XX HCTL-1101 Application 8051 quadrature decoder 4X HCTL-2000
Contextual Info: H Quadrature Decoder/Counter Interface ICs Technical Data HCTL-2000 HCTL-2016 HCTL-2020 Features • Interfaces Encoder to Microprocessor • 14 MHz Clock Operation • Full 4X Decode • High Noise Immunity: Schmitt Trigger Inputs Digital Noise Filter • 12 or 16-Bit Binary Up/