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    IC 74LS138 PIN DIAGRAM Search Results

    IC 74LS138 PIN DIAGRAM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    TCKE912NL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 2.7 to 23V, 4A, Latch, Fixed Over Voltage Clamp, WSON8 Visit Toshiba Electronic Devices & Storage Corporation
    TC7SZ07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), SOT-353 (USV), -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    TC7W66FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), SPST Analog Switch, SOT-765 (US8), 2 in 1, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    TC7SET125F Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-25 (SMV), -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation

    IC 74LS138 PIN DIAGRAM Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    pin diagram of ic 74ls138

    Abstract: FUNCTIONAL APPLICATION OF 74LS138 connection diagram of ic 74ls138 IC 74ls138 block diagram of 74LS138 3 to 8 decoder 74LS138 3 to 8 decoder notes 74LS138 HP5082-2835 MP7612 MP7612AP
    Text: MP7612 Octal 12-Bit DAC ArrayTM D/A Converter with Output Amplifier and Serial Data/Address µP Control Logic .the analog plus company TM FEATURES APPLICATIONS • Eight Independent 12-Bit DACs with Output Amplifiers • Low Power 320 mW typ. • Serial Digital Data and Address Port (3-Wire


    Original     		MP7612 12-Bit MP7613 pin diagram of ic 74ls138 FUNCTIONAL APPLICATION OF 74LS138 connection diagram of ic 74ls138 IC 74ls138 block diagram of 74LS138 3 to 8 decoder 74LS138 3 to 8 decoder notes 74LS138 HP5082-2835 MP7612 MP7612AP PDF

    ic 74ls138 pdf datasheet

    Abstract: 74LS138 DATASHEET MP7610AS MP7610BP MP7610BS MP7610CP MP7610CS MP7611 HP5082-2835 MP7610
    Text: MP7610 Octal 14-Bit DAC ArrayTM D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic June 1998-3 FEATURES • · · · · · · · · · APPLICATIONS Eight Independent 14-Bit DACs with Output Amplifiers Low Power 320 mW typ. Serial Digital Data and Address Port (3-Wire Standard)


    Original     		MP7610 14-Bit 12-Bit 60mA/Channel) MP7611 ic 74ls138 pdf datasheet 74LS138 DATASHEET MP7610AS MP7610BP MP7610BS MP7610CP MP7610CS MP7611 HP5082-2835 MP7610 PDF

    a1275

    Abstract: No abstract text available
    Text: MP7610 .the analog plus company TM Octal 14-Bit DAC ArrayTM D/A Converter with Output Amplifier and Serial Data/Address µP Control Logic FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • Eight Independent 14-Bit DACs with Output Amplifiers


    Original     		MP7610 14-Bit 12-Bit MP7611 a1275 PDF

    7HC125

    Abstract: ic 74ls138 block diagram of 74LS138 1 line to 16 line ic 74ls138 details ic 74ls138 pdf datasheet 74LS138 HP5082-2835 MC68000 MP7652 MP7652AN
    Text: MP7652 4-Channel Voltage Output 15 MHz, Input Bandwidth, 8-Bit Multiplying DACs with 3-Wire Serial Digital Port and Independent References FEATURES • Low Harmonic Distortion: 0.25% typical with VREF = 1 V p-p @ 1 MHz • VREF/2 Output Preset Level • Latch-Up Free


    Original     		MP7652 150ns 7HC125 ic 74ls138 block diagram of 74LS138 1 line to 16 line ic 74ls138 details ic 74ls138 pdf datasheet 74LS138 HP5082-2835 MC68000 MP7652 MP7652AN PDF

    8205 decoder

    Abstract: 74LS138 decoder
    Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V


    Original     		DAC811 12-BIT DAC811, 74LS138 DAC811s 8205 decoder 74LS138 decoder PDF

    block diagram of 74LS138 3 to 8 decoder

    Abstract: block diagram of 74LS138 1 line to 16 line hp5082 7651 IC 74ls138 MP7651AS 74LS138 HP5082-2835 MC6800 MC68000 MP7651
    Text: MP7651 8-Channel, Voltage Output 10 MHz Input Bandwidth 8-Bit Multiplying DACs with Serial Digital Data Port and Chip Select Decoder FEATURES • 8 Independent 2-Quadrant Multiplying 8-Bit DACs • Serial Digital Input Data and Address Port 3-Wire Standard plus Internal Chip Address Decoder


    Original     		MP7651 150ns 150mW block diagram of 74LS138 3 to 8 decoder block diagram of 74LS138 1 line to 16 line hp5082 7651 IC 74ls138 MP7651AS 74LS138 HP5082-2835 MC6800 MC68000 MP7651 PDF

    7HC125

    Abstract: 74LS138 HP5082-2835 MC68000 MP7641 MP7641AN MP7641AS MP7651 composite to sdi converter
    Text: MP7641 8-Channel Voltage Output 10 MHz Input Bandwidth 8-Bit Multiplying DACs with Serial Digital Port FEATURES • DACs Matched to +0.5% typ • Chip Select Available: MP7651 • Low Harmonic Distortion: 0.25% typical with VREF = 1 V p-p @ 1 MHz • VREF/2 Output Preset Level


    Original     		MP7641 MP7651 150ns 150mW 7HC125 74LS138 HP5082-2835 MC68000 MP7641 MP7641AN MP7641AS MP7651 composite to sdi converter PDF

    DAC811KU-1

    Abstract: ic 74ls138 pdf datasheet DAC811 DAC811A DAC811AH DAC811BH DAC811J DAC811JP block diagram of 74LS138 3 to 8 decoder 74LS138 pin diagram
    Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V


    Original     		DAC811 12-BIT DAC811 DAC811KU-1 ic 74ls138 pdf datasheet DAC811A DAC811AH DAC811BH DAC811J DAC811JP block diagram of 74LS138 3 to 8 decoder 74LS138 pin diagram PDF

    Ic 74hc138 logic diagram

    Abstract: No abstract text available
    Text: Revised February 1999 S E M IC Q N D U C T O R T M MM74HC138 3-to-8 Line Decoder The decoder’s outputs can drive 10 low power Schottky TTL equivalent loads, and are functionally and pin equiva­ lent to the 74LS138. All inputs are protected from damage due to static discharge by diodes to V qq and ground.


    OCR Scan     		MM74HC138 74LS138. MM74HC138 Ic 74hc138 logic diagram PDF

    pin diagram of ic 74ls138

    Abstract: 74LS138 pin configuration ic 74ls138 74LS138 pin diagram 74ls138 function 74LS138 LOGIC OF 74LS138 74LS138 3 to 8 decoder Pin pin for 74LS138 74ls138 3-8
    Text: 74LS138, S138 Signetics Decoders/Demultiplexers 1-Of-8 Decoder/Demultiplexer Product Specification Logic Products FEATURES • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Direct replacement for Intel 3205 74LS138


    OCR Scan     		74LS138, 74LS138 74S138 N74S13BN, N74LS138N N74LS138D, N74S138D 1N916, 1N3064, 500ns pin diagram of ic 74ls138 74LS138 pin configuration ic 74ls138 74LS138 pin diagram 74ls138 function LOGIC OF 74LS138 74LS138 3 to 8 decoder Pin pin for 74LS138 74ls138 3-8 PDF

    LOGIC OF 74LS138

    Abstract: pin for 74LS138 74LS138 3 to 8 decoder notes 74LS138 74LS138 pins 74l5138 of 74LS138 3 to 8 decoder 74ls138 function TTL 74ls138 74LS138 3 to 8 decoder Pin
    Text: 74LS138, S138 Signetics Decoders/Dem ultiplexers 1-Of-8 D e co d e r/D e m u ltip le xe r Product Specification L o g ic P rod ucts FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory chip select decoding


    OCR Scan     		74LS138, 1-of-32 1N916, 1N3064, 500ns LOGIC OF 74LS138 pin for 74LS138 74LS138 3 to 8 decoder notes 74LS138 74LS138 pins 74l5138 of 74LS138 3 to 8 decoder 74ls138 function TTL 74ls138 74LS138 3 to 8 decoder Pin PDF

    l381

    Abstract: and gate 74LS138 74ls138 function 74LS138 pin for 74LS138 74LS138 pin diagram SP74SC138F SP74SC138N pin diagram demultiplexer 74LS138
    Text: y SP74SC138 DECODER/DEMULTIPLEXER PIN CONFIGURATION A FEATURES B • Designed for high performance memory decoders in microprocessor systems ■ 3 to 8 line decoders include 3 enable inputs ■ Pin com patible with 74LS138 ■ SPI CMOS technology ■ Full TTL interface capability


    OCR Scan     		SP74SC138 74LS138 SP74SC138 74LS138. 400//A l381 and gate 74LS138 74ls138 function 74LS138 pin for 74LS138 74LS138 pin diagram SP74SC138F SP74SC138N pin diagram demultiplexer 74LS138 PDF

    74LS138PC

    Abstract: No abstract text available
    Text: 138 CONNECTION DIAGRAM PINOUT A & 54S/74S138 54LS/74LS138 bi f rC 1-0F-8 DECODER/DEMULTIPLEXER D E S C R IP TIO N — The '138 is a high speed 1-of-8 decoder/dem ultiplexer. This device is ideally suited for high speed bipolar memory chip select ad­ dress decoding. The m ultiple input enables allow parallel expansion to a


    OCR Scan     		54S/74S138 54LS/74LS138 1-Of-24 1-of-32 74LS138PC PDF

    D133

    Abstract: 74ls139 TTL 9334 74LS152 PIN 74LS42 7442 pin diagram 93L01 74156 ttl 74155 D132
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 T12 T11 T10 T9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 D133 74ls139 TTL 9334 74LS152 PIN 74LS42 7442 pin diagram 93L01 74156 ttl 74155 D132 PDF

    connection diagram of ic 74ls138

    Abstract: pin diagram of ic 74ls138 pin for 74LS138 74ls138 function sn54ls138 SN54LS13B 74LS138 function table ic 74ls138 74ls138 74S138A
    Text: SN54LS13B, SN54S138, SN74LS138, SN74S13BA 3 LINE TO 8 UNE DECODERSjDEMULTIPLEXERS DECEMBER 1 9 7 2 -R E V IS E D M AR C H 1 9 8 8 Designed Specifically for High-Speed: Memory Decoders Data Transmission Systems SN 5 4 LS 1 38 , S N 54S 138 . . . J OR W PACKAG E


    OCR Scan     		SN54LS13B, SN54S138, SN74LS138, SN74S13BA 74LS138, 74S138A SN74S138A 54S138 74S138A connection diagram of ic 74ls138 pin diagram of ic 74ls138 pin for 74LS138 74ls138 function sn54ls138 SN54LS13B 74LS138 function table ic 74ls138 74ls138 PDF

    pin diagram of ic 74ls138

    Abstract: ic 74ls138 motorola sn74ls138 o7ad motorola 74ls138 EM 5103
    Text: MOTOROLA D E S C R IP T IO N — The L S T T L / M S I S N 5 4 L S / 7 4 L S 1 38 is a high speed 1-of-8 D ecoder/Dem ultiplexer. T h is device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1 -of-24 decoder using just three


    OCR Scan     		-of-24 1-of-32 SN54LS138 SN74LS138 pin diagram of ic 74ls138 ic 74ls138 motorola sn74ls138 o7ad motorola 74ls138 EM 5103 PDF

    connection diagram of ic 74ls138

    Abstract: ic 74ls138 pin diagram of ic 74ls138 74LS138 3 to 8 decoder notes 74ls138 truth table
    Text: MOTOROLA <8 > D E S C R I P T I O N — The L S T T L / M S IS N 5 4 L S / 7 4 L S 1 3 8 is a high speed 1-of-8 Decoder/Demultiplexer. This device is ideally suited for high speed bipolar m em ory chip select address decoding. The multiple input enables allow parallel expansion to a 1 -of-2 4 decoder u sing just three


    OCR Scan     		1-of-32 connection diagram of ic 74ls138 ic 74ls138 pin diagram of ic 74ls138 74LS138 3 to 8 decoder notes 74ls138 truth table PDF

    SN54138

    Abstract: SN74LS138 LS138 SN54LS138 SN54S138 SN74S138A gl 1151
    Text: SN54LS138, SN54S138, SN74LS138, SN74S138A 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS D E C E M B E R 1972 — R E V IS E D M A R C H 1988 Designed Specifically for High-Speed: Memory Decoders Data Transmission Systems S N 54LS 138, S N 54S 138 SN 74LS 138, S N 74S 138A


    OCR Scan     		SN54LS13B, SN54S138, SN74LS138, SN74S138A 1972-REVISED usuall5012 SN74S138A sn54s138 SN54138 SN74LS138 LS138 SN54LS138 gl 1151 PDF

    64LS138

    Abstract: No abstract text available
    Text: S N 5 4 LS 13 8 , SN 54S138, S N 74 LS 13 8 , S N 74 S 13 8 A 3-LINE TO 8-LINE D EC OD ERS/DEM U LTIPLEXERS DECEMBER 1972 —REVISED MARCH 1988 Designed Specifically for High-Speed: Memory Decoders Data Transmission Systems I I 3 Enable Inputs to Simplify Cascading


    OCR Scan     		54S138, 64LS138 PDF

    pin diagram of ic 74ls138

    Abstract: connection diagram of ic 74ls138 t138 FUNCTIONAL APPLICATION OF 74LS138 74HC138 M74HCT13
    Text: M54HCT138 M74HCT138 SGS-THOMSON 3 TO 8 LINE DECODER INVERTING . HIGH SPEED tPD = 16 ns (TYP.) at Vcc = 5 V . LOW POWER DISSIPATION Ice = 4 (iA AT TA = 25 "C . OUTPUT DRIVE CAPABILITY 10LSTTL LOADS • BALANCED PROPAGATION DELAYS tpLH = tPHL B1R (Plastic Package)


    OCR Scan     		M54HCT138 M74HCT138 10LSTTL 54/74LS138 M54/74HC138 pin diagram of ic 74ls138 connection diagram of ic 74ls138 t138 FUNCTIONAL APPLICATION OF 74LS138 74HC138 M74HCT13 PDF

    EQUIVALENT 74HCT138

    Abstract: T907 74HCT138 S-100-48 FUNCTIONAL APPLICATION OF 74LS138 G1.L 54HC 74HC M54HCT138 M74HCT138
    Text: M54HCT138 M74HCT138 rZJ SGS -THOMSON RiOO [^@[i[L[lgT^ Q R!]ö(gS 3 TO 8 LINE DECODER LOW POWER DISSIPATION |cc = 4 aiA (MAX.) at TA = 25°C HIGH NOISE IMMUNITY Vnih = V N|L= 28% VCc (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    OCR Scan     		M54HCT138 M74HCT138 54/74LS138 M54/74HCT138 S-10048 M54/74HCT138 EQUIVALENT 74HCT138 T907 74HCT138 S-100-48 FUNCTIONAL APPLICATION OF 74LS138 G1.L 54HC 74HC M74HCT138 PDF

    Untitled

    Abstract: No abstract text available
    Text: Or, Cell Customer Service a 1 1-80Ú-548-6132 USA Only BURR-BROWN DAC811 AVAILABLE IN DIE 00 o < Q Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER 0) DC FEATURES • SINGLE INTEGRATED CIRCUIT CHIP • MICROCOMPUTER INTERFACE: DOUBLE-BUFFERED LATCH


    OCR Scan     		DAC811 12-BIT DAC811 DAC81 17313b5 PDF

    Untitled

    Abstract: No abstract text available
    Text: C T S C S -T H O M S O N *7# dO g[i3 iLi(gra![](g§ M54HC138 M74HC138 3 TO 8 LINE DECODER (INVERTING • HIGH SPEED tPD= 17ns (TYP.) at VCc = 5V ■ LOW POWER DISSIPATION Ice = 4 at TA = 25°C ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ BALANCED PROPAGATION DELAYS


    OCR Scan     		M54HC138 M74HC138 54/74LS138 M54/74HC138 M54/74HC138 PDF

    M74HCT13

    Abstract: No abstract text available
    Text: Æ T SCS-TNOM SON *7# RÂlOMtlILIlÊ'irmDgi M54HCT138 M74HCT138 3 TO 8 LINE DECODER • LOW POWER DISSIPATION IC C = 4 f*A MAX. at TA = 25°C ■ HIGH NOISE IMMUNITY V n ih = VNIL= 28% VCc (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ SYMMETRICAL OUTPUT IMPEDANCE


    OCR Scan     		M54HCT138 M74HCT138 54/74LS138 M74HCT138 M54HCT138 M54/74HCT138 S-10046 M74HCT13 PDF