IBM04184ARLAA Search Results

Contextual Info: IBM04184ARLAA IBM04364ARLAA Preliminary 128K X 36 & 256K X 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • Latched Outputs • 0.4 Micron CMOS Technology • Asynchronous Output Enable and Power Down Inputs • Synchronous Register-Latch Mode Of Opera­

Contextual Info: IBM04184ARLAA IBM04364ARLAA Preliminary 128K X 36 & 256K X 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • Latched Outputs • 0.4 Micron CMOS Technology • Asynchronous Output Enable and Power Down Inputs • Synchronous Register-Latch Mode Of Opera­

Contextual Info: IBM04184ARLAA IBM04364ARLAA P relim inary 128K X 36 & 256K X 18 SR AM Features • 128K x 36 or 256K x 18 Organizations • Latched Outputs • 0.4 Micron CMOS Technology • Asynchronous Output Enable and Power Down Inputs • Synchronous Register-Latch Mode Of Opera­

Contextual Info: IBM04184ARLAA IBM04364ARLAA Preliminary 128K X 36 & 256K X 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • Latched Outputs • 0.4 Micron CMOS Technology • Asynchronous Output Enable and Power Down Inputs • Synchronous Register-Latch Mode Of Opera­

Contextual Info: I = = — = -= P relim inary IBM04184ARLAA IBM04364ARLAA 1 28K X 36 & 2 5 6 K X 1 8 S R A M Features • 128K x 36 or 256K x 18 Organizations • Latched Outputs • 0.4 Micron C M O S Technology • Asynchronous Output Enable and Power Down Inputs • Synchronous Register-Latch Mode Of Opera­

Contextual Info: Higher Density, up to 225MHz operation 4Mb High Performance SRAM Highlights Access Time 2.5 ns Pipeline , 6.5 ns (Flow Thru), 6.0ns (Register Latch) Registered addresses, write enables,synch select,data ins Cycle Time 5 ns (Pipeline ),4.5 ns (Flow Thru),