I2S SPECIFICATION Search Results

I2S SPECIFICATION Result Highlights (5)

Part	Manufacturer	Description
D82C284-8	Rochester Electronics LLC	82C284 - Processor Specific Clock Generator, 16MHz, CMOS, CDIP18
D82C284-12	Rochester Electronics LLC	82C284 - Processor Specific Clock Generator, 25MHz, CMOS, CDIP18
TCM3105NL	Rochester Electronics LLC	TCM3105NL - FSK Modem, PDIP16
AM79865JC	Rochester Electronics LLC	AM79865 -Physical Data Transmitter
AM79866AJC-G	Rochester Electronics LLC	AM79866A - Physical Data Receiver

I2S SPECIFICATION Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
AD62550A Abstract: AD8256A TTL buffer signal schmitt trigger Text: ESMT AD62550A Class-D Audio Power Amplifier with USB / I2S Interface Features z Compliant with USB Specification v1.1, and USB 2.0 full speed z Embedded high efficiency, high performance class D stereo amplifier z Support I2S input and I2S output interface of	Original	AD62550A 48kHz Me//2000/XP AD62550A AD8256A TTL buffer signal schmitt trigger	PDF
bead filter Abstract: amplifier with port USB diagram Text: ESMT AD6255A Class-D Audio Power Amplifier with USB / I2S Interface and Recording function Features z Compliant with USB Specification v1.1, and USB 2.0 full speed z Embedded high efficiency, high performance class D stereo amplifier z Support I2S input and I2S output interface of	Original	48kHz Me//2000/XP AD6255An, AD6255A bead filter amplifier with port USB diagram	PDF
AD6255A Abstract: usb amplifier with button control diagram AD8356A ttl buffer TTL Schmitt-Trigger schmitt trigger 1M volume resistor Text: ESMT AD6255A Class-D Audio Power Amplifier with USB / I2S Interface and Recording function Features z Compliant with USB Specification v1.1, and USB 2.0 full speed z Embedded high efficiency, high performance class D stereo amplifier z Support I2S input and I2S output interface of	Original	AD6255A 48kHz Me//2000/XP AD6255A usb amplifier with button control diagram AD8356A ttl buffer TTL Schmitt-Trigger schmitt trigger 1M volume resistor	PDF
Untitled Abstract: No abstract text available Text: I2S Triggering and Hardware-based Decode Option SND for Agilent InfiniiVision Oscilloscopes Data Sheet Find and debug intermittent errors and signal integrity problems faster Features: • I2S serial bus triggering • I2S hardware-based protocol decoding	Original	5990-4198EN	PDF
i2s philips Abstract: block diagram for asynchronous FIFO testbench of a transmitter in verilog verilog i2s philips I2S bus specification synchronous fifo design in verilog verilog i2s bus Philips Compact Disc Designer Guide Text:  Meets Philips Inter-IC Sound Bus Specification  Supported modes I2S-APB Inter-IC Sound Bus Megafunction for AMBA APB − I2S Philips − Left Justified − Right Justified − DSP  Two clock domains − APB the host side clock do- main − system clock for the I2S	Original		PDF
TXM RX 28 Receiver Abstract: TXM RX 23 Receiver IA6 l syncomm IA6 synic SYNIC-IA6002 syncomm SYNIC-IA6 SYNIC IA6002 TXM, Receiver, 16 Pin Configuration Text: Your Value-added Designer Data Sheet SYNIC – IA6002 Interface Between I2S Data Format and IA6 Transceiver March 11, 2003 Data Sheet Interface Between I2S Data Format and IA6 Transceiver SYNIC-IA6002 1. Block Diagram: RF / I2S Audio Codec / / IA6 Frame Sync	Original	IA6002 SYNIC-IA6002 TXM RX 28 Receiver TXM RX 23 Receiver IA6 l syncomm IA6 synic SYNIC-IA6002 syncomm SYNIC-IA6 SYNIC IA6002 TXM, Receiver, 16 Pin Configuration	PDF
verilog code for amba apb master Abstract: verilog code for apb verilog code for amba apb bus i2s philips synchronous fifo design in verilog verilog code for i2s bus testbench of a transmitter in verilog philips I2S bus specification verilog code for 8 bit fifo register testbench verilog ram asynchronous Text: Meets Philips Inter-IC Sound Bus Specification Supported modes I2S-APB − I2S Philips Inter-IC Sound Bus Core for AMBA APB − Right Justified − Left Justified − DSP Two clock domains − APB the host side clock do- The I2S-APB core integrates eight channels of Inter-IC Sound compatible serial buses.	Original		PDF
I2S bus specification Abstract: verilog code for amba apb master verilog code for apb testbench of a transmitter in verilog philips I2S bus specification i2s specification verilog code for amba apb bus testbench verilog ram asynchronous verilog code for digital clock AMBA BUS vhdl code Text:  Meets Philips Inter-IC Sound Bus Specification  Supported modes I2S-APB  I2S Philips Inter-IC Sound Bus Core for AMBA APB  Right Justified  Left Justified  DSP  Two clock domains  APB the host side clock do- The I2S-APB core integrates eight channels of Inter-IC Sound compatible serial buses.	Original		PDF
NE5532 data Abstract: TDA1543 TDA1543 Application Notes NE5532 SO16L TDA1543T Text: INTEGRATED CIRCUITS DATA SHEET TDA1543 Dual 16-bit DAC economy version (I2S input format) Product specification File under Integrated Circuits, IC01 February 1991 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format)	Original	TDA1543 16-bit TDA1543 16-bit NE5532 data TDA1543 Application Notes NE5532 SO16L TDA1543T	PDF
TDA1543 Application Notes Abstract: TDA1543 NE5532 data NE5532 SO16L TDA1543T ne5532 equivalent Text: INTEGRATED CIRCUITS DATA SHEET TDA1543 Dual 16-bit DAC economy version (I2S input format) Product specification File under Integrated Circuits, IC01 February 1991 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format)	Original	TDA1543 16-bit TDA1543 16-bit TDA1543 Application Notes NE5532 data NE5532 SO16L TDA1543T ne5532 equivalent	PDF
TDA1543 Application Notes Abstract: TDA1543 MEA110 NE5532 SO16L TDA1543T ne5532 thd Text: INTEGRATED CIRCUITS DATA SHEET TDA1543 Dual 16-bit DAC economy version (I2S input format) Product specification File under Integrated Circuits, IC01 February 1991 Philips Semiconductors Product specification Dual 16-bit DAC (economy version) (I2S input format)	Original	TDA1543 16-bit TDA1543 16-bit TDA1543 Application Notes MEA110 NE5532 SO16L TDA1543T ne5532 thd	PDF
SPDIF i2s RECEIVER Abstract: creative home theater 2.1 circuit diagram Voltage regulator 78 ML5 SPDIF AES17-1991 STAC9756 STAC9756T STAC9757 STAC9757T Text: Integrating Mixed-Signal Solutions PRODUCT DATA SHEET STAC9756/57 Two Channel AC’97 Codecs with I2S Digital I/O and SPDIF Output Two Channel AC’97 Codecs with I2S Digital I/O and SPDIF Output 2-9756-D1-3.3-0303 STAC9756/57 Two Channel AC’97 Codecs with I2S Digital I/O and SPDIF Output	Original	STAC9756/57 2-9756-D1-3 0000h 0000h, 8888h. 8808h SPDIF i2s RECEIVER creative home theater 2.1 circuit diagram Voltage regulator 78 ML5 SPDIF AES17-1991 STAC9756 STAC9756T STAC9757 STAC9757T	PDF
SPDIF i2s RECEIVER Abstract: difference between EN8 EN9 SPDIF i2s converter SPDIF i2s RECEIVER selector SPDIF IC adc audio i2s 8 channel controller STAC9757T Digital ECHO microphone mixing circuit for surround creative home theater 2.1 circuit diagram ENERGY SAVING UNIT AC Diagram Text: Integrating Mixed-Signal Solutions PRODUCT DATA SHEET STAC9756/57 Two Channel AC’97 Codecs with I2S Digital I/O and SPDIF Output Two Channel AC’97 Codecs with I2S Digital I/O and SPDIF Output 2-9756-D1-3.0-0101 STAC9756/57 Two Channel AC’97 Codecs with I2S Digital I/O and SPDIF Output	Original	STAC9756/57 2-9756-D1-3 8384h 7656h 0000h, 8888h. 8808h SPDIF i2s RECEIVER difference between EN8 EN9 SPDIF i2s converter SPDIF i2s RECEIVER selector SPDIF IC adc audio i2s 8 channel controller STAC9757T Digital ECHO microphone mixing circuit for surround creative home theater 2.1 circuit diagram ENERGY SAVING UNIT AC Diagram	PDF
LM492 Abstract: 5 pin PCB Mounted 3.5mm Stereo jack Text: LM4921 LM4921 Low Voltage I2S 16-Bit Stereo DAC with Stereo Headphone Power Amplifiersand Volume Control Literature Number: SNAS178D LM4921 Low Voltage I2S 16-Bit Stereo DAC with Stereo Headphone Power Amplifiers and Volume Control General Description Key Specifications	Original	LM4921 LM4921 16-Bit SNAS178D LM492 5 pin PCB Mounted 3.5mm Stereo jack	PDF

verilog code for amba ahb bus Abstract: verilog code AMBA AHB verilog code for amba ahb master ahb slave verilog code verilog code for i2s bus ahb wrapper verilog code verilog code for ahb bus slave ahb slave RTL verilog i2s amba ahb verilog code Text: I2S core meets the Philips InterIC Sound bus specification Supports Master/Slave and Receiver/Transmitter modes I2S-AHB Eight configurable stereo channels Inter-IC Sound Bus Core for AMBA AHB Data mode capabilities: 22.05, 24; 32, 44.1; 48; 88.2; 96; 176.4; 192kHz	Original	192kHz verilog code for amba ahb bus verilog code AMBA AHB verilog code for amba ahb master ahb slave verilog code verilog code for i2s bus ahb wrapper verilog code verilog code for ahb bus slave ahb slave RTL verilog i2s amba ahb verilog code	PDF
AN4520 Abstract: i2s specification DIAB Text: Freescale Semiconductor Application Note Document Number: AN4520 Rev. 0, 5/2012 An I2S Inter-IC Sound Bus Application on Kinetis I2S Driver for K60 by: Guo Jia Automotive and Industrial Solutions Group Contents 1 Introduction 1	Original	AN4520 i2s specification DIAB	PDF
128fs Abstract: No abstract text available Text: LM49450 LM49450 I2S Input, 2.5W/Channel, Low EMI, Stereo, Class D Audio Sub-System withGround Referenced Headphone Amplifier, 3D Enhancement, and Headphone Sense Literature Number: SNAS440C August 4, 2011 I2S Input, 2.5W/Channel, Low EMI, Stereo, Class D Audio	Original	LM49450 LM49450 SNAS440C 24-bit 128fs	PDF
CX20745 Abstract: ec16b Text: CX20745 Low-Power I2S CODEC Data Sheet General Description Features The CX20745 is an Integrated Interchip Sound I2S audio Coder-Decoder (CODEC), with integrated stereo class-D speaker amplifiers and capless headphones with performance that exceeds 100dB Signal-to-Noise Ratio	Original	CX20745 100dB 008DSR00 ec16b	PDF
ad2410 Abstract: No abstract text available Text: Automotive Audio Bus A2B Transceiver AD2410W A2B BUS FEATURES GENERAL DESCRIPTION Line topology Single master, multiple slave Up to 10 meters between nodes Up to 40 meters overall cable length Communication over distance Synchronous data Multichannel I2S/TDM to I2S/TDM	Original	AD2410W D12780F-0-12/14 ad2410	PDF
I2S bridge Abstract: AN2682 EPM3064 spi to i2s I2S serial bus protocol vhdl code for spi controller implementation on MAX3000A PWM code using vhdl STM32 TIM1 DMA STR711 Text: AN2682 Application note Connecting I2S audio devices to the STR7/STR9 MCU Introduction This application note describes how to interface the STR7xx SPI peripheral with an audio device Codec, ADC, DAC, filter. using the I2S protocol via an external interface consisting	Original	AN2682 STR91x I2S bridge AN2682 EPM3064 spi to i2s I2S serial bus protocol vhdl code for spi controller implementation on MAX3000A PWM code using vhdl STM32 TIM1 DMA STR711	PDF
FLI30602H-AC Abstract: Power Sub Woofer Amplifier spdif input 5.1 woofer dual sub woofer circuit diagram make ypbpr Faroudja FLI30502-AC JESD97 fli30602h Text: FLI30x02 Single-chip analog TV processor Data Brief Features • Advanced audio enhancement ■ Digital audio support ■ I2S, SPDIF input ■ I2S, SPDIF output ■ Loud speaker, sub woofer, and headphone ■ Analog line in, microphone in, and line out ■	Original	FLI30x02 10-bit FLI30602H) FLI30602H FLI30502) FLI30602H-AC Power Sub Woofer Amplifier spdif input 5.1 woofer dual sub woofer circuit diagram make ypbpr Faroudja FLI30502-AC JESD97	PDF
Untitled Abstract: No abstract text available Text: Stereo PDM-to-I2S or TDM Conversion IC ADAU7002 Data Sheet FEATURES GENERAL DESCRIPTION 64x decimation of a stereo pulse density modulation PDM bit stream to pulse code modulation (PCM) audio data Slave I2S or time division multiplexed (TDM) output interface	Original	ADAU7002 ADAU7002 ADAU7002ACBZ-R7 ADAU7002ACBZ-RL EVAL-ADAU7002Z 1-21-2012-A D11265-0-7/13	PDF
ADAU7002 Abstract: TDM8 ADAU7002ACBZ-R7 i2s specification Text: Stereo PDM-to-I2S or TDM Conversion IC ADAU7002 Data Sheet FEATURES GENERAL DESCRIPTION 64x decimation of a stereo pulse density modulation PDM bit stream to pulse code modulation (PCM) audio data Slave I2S or time division multiplexed (TDM) output interface	Original	ADAU7002 ADAU7002 ADAU7002ACBZ-R7 ADAU7002ACBZ-RL EVAL-ADAU7002Z 1-21-2012-A D11265-0-1/13 TDM8 i2s specification	PDF
Untitled Abstract: No abstract text available Text: CS4205 CrystalClear Audio Codec ’97 for Portable Computing Features Integrated Three Asynchronous I2S Input Port ZV Port Integrated High-Performance Microphone Pre-Amplifier Integrated Digital Effects Processing for Bass and Treble Response Digital Docking Including an I2S Output, 3	Original	CS4205 20-bit 18-bit DS489PP4 MS022	PDF

I2S SPECIFICATION Search Results

I2S SPECIFICATION Result Highlights (5)

I2S SPECIFICATION Datasheets Context Search

AD62550A

bead filter

AD6255A

Untitled

i2s philips

TXM RX 28 Receiver

verilog code for amba apb master

I2S bus specification

NE5532 data

TDA1543 Application Notes

TDA1543 Application Notes

SPDIF i2s RECEIVER

SPDIF i2s RECEIVER

LM492

verilog code for amba ahb bus

AN4520

128fs

CX20745

ad2410

I2S bridge

FLI30602H-AC

Untitled

ADAU7002

Untitled