HS7 EQUIVALENT Search Results

TLE 7201R

Abstract: smd marking RA1 transistor IGO tv circuit diagram Ci 4431 mosfet SMD MOSFET DRIVE 4427 8 PIN 7201R tle 4417 MOSFET marking smd 4425 IC SMD 4614 EF00
Contextual Info: Door Module Power IC TLE 8201R Data Sheet Rev. 2.0 Features • Full bridge 150mΩ for main doorlock motor • Two half-bridges (400mΩ) for deadbolt and mirror position motor or mirror fold motor • Two half-bridges (800mΩ) for mirror position • High-side switch (100mΩ) for mirror defrost

IGO tv circuit diagram

Abstract: TLE8203E FET MARKING mark ls5
Contextual Info: Final Data Sheet, Rev. 1.0, February 2009 TLE 8203E Mirror Power IC Automotive Power TLE 8203E Table of Contents Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

FF300R17ME3

Contextual Info: Technische Information / technical information FF300R17ME3 IGBT-Module IGBT-modules EconoDUAL 3 Modul mit Trench/Feldstop IGBT³ und EmCon3 Diode EconoDUAL™3 module with trench/fieldstop IGBT³ and EmCon3 diode IGBT-Wechselrichter / IGBT-inverter Vorläufige Daten / preliminary data

L99MD01

Abstract: L99MD01XPTR smps PCB diagram HC176 microcontroller based smps circuit diagram
Contextual Info: L99MD01 Octal half-bridge driver with SPI control for automotive application Features • 8 half bridges ■ RON = typ. 0.9 Ω HS , 0.64 Ω (LS) @ Tj = 25 °C ■ Current limit of each output at min. 0.8 A ■ Intrinsic DC/DC step up converter driving an

Contextual Info: L99MD01 Octal half-bridge driver with SPI control for automotive application Features • 8 half bridges ■ RON = typ. 0.9 Ω HS , 0.64 Ω (LS) @ Tj = 25 °C ■ Current limit of each output at min. 0.8 A ■ Intrinsic DC/DC step up converter driving an

Contextual Info: L99MD01 Octal half-bridge driver with SPI control for automotive application Features • 8 half bridges ■ RON = typ. 0.9 Ω HS , 0.64 Ω (LS) @ Tj = 25 °C ■ Current limit of each output at min. 0.8 A ■ Intrinsic DC/DC step up converter driving an

Contextual Info: HY534256A Series “ H Y U N D A I 256KX 4-bit CMOS DRAM DESCRIPTION ITie HY534256A is the 2nd generation and fast dynamic RAM organized 262,144 x 4-bit. The HY534256A utilizes Hyundai’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating

Contextual Info: Data Sheet Microelectronics FE020-Series Power Modules: dc-dc Converters; 48 Vdc Input, 20 W Features • Low profile: 0.5 in. ■ High power-density: 6 W/in.3 ■ Output overvoltage clamp ■ No minimum load ■ Short-circuit protection ■ Parallel operation with load sharing

Contextual Info: ANALOG DEVICES 10-Bit, 40 MSPS/60 MSPS A/D Converter AD9050 FUNCTIONAL BLOCK DIAGRAM FEATURES Low Power: 315 m W @ 40 M SP S, 345 m W @ 60 M S P S On-Chip T/H, Reference Single +5 V Power Supply Operation Selectable 5 V or 3 V Logic I/O SNR: 53 dB Minim um at 10 MHz w/40 M S P S

ST90R50C6

Abstract: ST90R50 ST90R50C ST90R51 ST90R50Q1 PLCC84 PQFP80 B7464 10 35L a5 capacitor ST90R50/R51
Contextual Info: ST90R50  ROMLESS HCMOS MCU WITH BANKSWITCH AND A/D CONVERTER PRELIMINARY DATA Register oriented 8/16 bit CORE with RUN, WFI and HALT modes Minimum instruction cycle time : 500ns 12MHz internal 224 generalpurpose registers available as RAM, accumulators or index pointers (register file)

ST90R52

Abstract: ST90R52GQ1 PQFP80 st90r50 ST90R
Contextual Info: ST90R52  ROMLESS HCMOS MCU WITH BANKSWITCH AND A/D CONVERTER Register oriented 8/16 bit CORE with RUN, WFI and HALT modes Minimum instruction cycle time: 375ns 16MHz internal 224 general purpose registers available as RAM, accumulators or index pointers (register file)

fpi bus

Abstract: AD10 AD11 AD12 AD14 HS13 HS14 TC1910
Contextual Info: Da ta S he et , V 1. 0, O ct . 20 03 T C 1 91 0 3 2 - B i t S i n g le - C h i p M ic r o c o n t r o l l e r M i c ro c o n t ro l l e rs N e v e r s t o p t h i n k i n g . Edition 2003-10 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany

AD17

Abstract: AD27 AD29 TC1912 AD-29B
Contextual Info: Da ta S he et , V 1. 0, O ct . 20 03 T C 1 91 2 3 2 - B i t S i n g le - C h i p M ic r o c o n t r o l l e r M i c ro c o n t ro l l e rs N e v e r s t o p t h i n k i n g . Edition 2003-10 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany

1.8V SRAM

Contextual Info: Da ta S he et , V 1. 0, O ct . 20 03 T C 1 91 0 3 2 - B i t S i n g le - C h i p M ic r o c o n t r o l l e r M i c ro c o n t ro l l e rs N e v e r s t o p t h i n k i n g . Edition 2003-10 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany

Contextual Info: S G S -T H O M S O N ST90R52 ROMLESS HCMOS MCU WITH BANKSWITCH AND A/D CONVERTER • Register oriented 8/16 bit CORE with RUN, WFI and HALT modes ■ Minimum instruction cycle time: 375ns 16MHz internal ■ 224 general purpose registers available as RAM,

ST9036C1

Abstract: ST90T36C6 microcontroller ST9036 ST90T36 ST9036 ST9036C 10 35L a8 capacitor crystal 24mhz st92 80pin PQFP80
Contextual Info: ST9036  16K ROM / 256 RAM HCMOS MCU WITH RAM AND A/D CONVERTER Register oriented 8/16 bit CORE with RUN, WFI and HALT modes Minimum instruction cycle time : 500ns 12MHz internal Internal Memory : ROM 16Kbytes RAM 256 bytes 224 general purpose registers available as RAM,

ST6398

Abstract: HLX quartz hlx crystal QMA INVERTER setting data hlx 12Mhz crystal oscillator RG61 SGS M74HC04 sda 20560 hlx* crystal QMA INVERTER
Contextual Info: SGS-THOMSON [M œ [lL iû r a M O i S T 9 0 2 7 , S T 9 0 2 8 16K ROM / 256 RAM HCMOS MCUs • Register oriented 8/16 bit CORE with RUN, WFI and HALT modes ■ Minimum instruction cycle time : 500ns (12MHz internal ■ Internal Memory : ROM RAM ST9027

400w pfc

Abstract: UCC25600 230V ac to 36V dc converter circuit diagram rr 681k- 1kv capacitor
Contextual Info: TI Designs 230-V, 400-W High Efficiency Battery Charger With PFC and LLC for 36-V Power Tools TI Designs Design Features TI Designs provide the foundation that you need including methodology, testing and design files to quickly evaluate and customize the system. TI Designs

1.8v sram

Abstract: FD08H
Contextual Info: Da ta S he et , V 1. 0, O ct . 20 03 T C 1 91 2 3 2 - B i t S i n g le - C h i p M ic r o c o n t r o l l e r M i c ro c o n t ro l l e rs N e v e r s t o p t h i n k i n g . Edition 2003-10 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany

R0014

Abstract: VR001415 7L Marking TC 4863 SGS-Thomson ST9 10 35L V6 TDA 4863 G
Contextual Info: SGS-THOMSON IM O M iL iig r a fM O O S S T 9 0 R 5 2 ROMLESS HCMOS MCU WITH BANKSWITCH AND A/D CONVERTER • Register oriented 8/16 bit CORE with RUN, WFI and HALT modes ■ Minimum instruction cycle time: 375ns 16MHz internal ■ 224 general purpose registers available as RAM,

Contextual Info: SGS-THOMSON ST9020 ST9027, ST9028 IL[ 12/16K ROM HCM O S MCUs Register oriented 8/16 bit CORE with RUN, WFI and HALT modes Minimum instruction cycle time : 500ns 12MHz internal Internal Memory: ROM RAM ST9020 12K ST9027 16K 256 ST9028 16K 256 224 general purpose registers available as RAM,

C28W

Abstract: ST9020 JI 0190 HA
Contextual Info: ST9020 ST9027, ST9028 SGS-THOMSON IMOIMSIILIO'iriHMOCS 1 2 /1 6 K R O M H C M O S M C U s Register oriented 8/16 bit CORE with RUN, WFI and HALT modes Minimum instruction cycle time : 500ns 12MHz internal Internal Memory : ROM RAM ST9020 12K ST9027 16K 256

st90r50

Contextual Info: SGS-THOMSON [ M œ [ lL iû r a M O i S T 9 0 R 5 0 ROMLESS HCMOS MCU WITH BANKSWITCH AND A/D CONVERTER PRELIMINARY DATA • Register oriented 8/16 bit CORE with RUN, WFI and HALT modes ■ Minimum instruction cycle time : 500ns (12MHz internal ■ 224 general purpose registers available as RAM,

74hc3730

Abstract: HLX quartz hlx crystal st90r52 D67-D60 ST90R50 C3K marking led marking code m25t mcl d01 display sks 260
Contextual Info: = 7 WM S G S -T H O M S O N S T9 0 R52 ROM LESS HCM OS MCU W ITH BANKSW ITCH AND A/D CO NVERTER • Register oriented 8/16 bit CORE with RUN, WFI and HALT modes ■ Minimum instruction cycle time: 375ns 16MHz internal ■ 224 general purpose registers available as RAM,