HIGIG SPECIFICATION Search Results

HIGIG SPECIFICATION Result Highlights (5)

Part	ECAD Model	Manufacturer	Description	Download	Buy
D82C284-8		Rochester Electronics LLC	Processor Specific Clock Generator, 16MHz, CMOS, CDIP18, CERDIP-18
D82C284-12		Rochester Electronics LLC	Processor Specific Clock Generator, 25MHz, CMOS, CDIP18, CERDIP-18
AM79865JC		Rochester Electronics LLC	Telecom Circuit,
AM79866AJC-G		Rochester Electronics LLC	SPECIALTY TELECOM CIRCUIT, PQCC20, ROHS COMPLIANT, PLASTIC, LCC-20
AM7992BPC		Rochester Electronics LLC	Manchester Encoder/Decoder, PDIP24, PLASTIC, DIP-24

HIGIG SPECIFICATION Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
msan configuration Abstract: spartan 3a higig specification SPARTAN-3A EP3C10 EP3C16 EP3C25 EP3C40 procket networks LP Technology Text: White Paper Developing MSAN Equipment Using Low-Cost FPGAs Introduction In this paper, we will look at the trends in the multi-service access node MSAN equipment market that are forcing developers to re-examine the architectures they have used in the past, as well as driving more and more MSAN	Original	PDF	10-Gbps msan configuration spartan 3a higig specification SPARTAN-3A EP3C10 EP3C16 EP3C25 EP3C40 procket networks LP Technology
ddr3 sata controller Abstract: OC48 SSTL-15 SSTL-18 DFE EQUALIZER ERROR SCRAMBLE Text: Section I. Device Datasheet and Addendum for Stratix IV Devices This section includes the following chapters: • Chapter 1, DC and Switching Characteristics for Stratix IV Devices ■ Chapter 2, Addendum to the Stratix IV Device Handbook Revision History	Original	PDF
HD-SDI over sdh Abstract: hd-SDI splitter OC48 SSTL-15 SSTL-18 30Gbps Text: Stratix IV Device Handbook Volume 4 Stratix IV Device Handbook Volume 4 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V4-4.5 2010 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.	Original	PDF
Untitled Abstract: No abstract text available Text: Arria II Device Handbook Volume 3: Device Datasheet and Addendum Arria II Device Handbook Volume 3: Device Datasheet and Addendum 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V3-4.4 Document publication date: December 2013 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.	Original	PDF
PCI Express 3.0 Abstract: HD-SDI over sdh HIV54001-1 SSTL-15 SSTL-18 SMPTE-424M PRBS24 VX 1818 Text: 1. DC and Switching Characteristics of HardCopy IV Devices HIV54001-1.0 Electrical Characteristics This chapter covers the electrical characteristics for HardCopy IV devices. Operating Conditions When HardCopy IV devices are implemented in a system, they are rated according to	Original	PDF	HIV54001-1 PCI Express 3.0 HD-SDI over sdh SSTL-15 SSTL-18 SMPTE-424M PRBS24 VX 1818
HD-SDI over sdh Abstract: GR-253-CORE PRBS31 SMPTE292M SSTL-15 SSTL-18 PRBS-15 Text: Section I. Arria II GX Device Data Sheet and Addendum This section provides information about the Arria II GX device data sheet and addendum. This section includes the following chapters: • Chapter 1, Arria II GX Device Datasheet ■ Chapter 2, Addendum to the Arria II GX Device Handbook	Original	PDF
GPON block diagram Abstract: TSMC 40nm 90 nm hspice CEI-6G-SR CPRI multi rate 10Gcapable 29K212 pcie X1 edge connector sata CIRCUIT diagram 40G-100G Text: Innovating With a Full Spectrum of 40-nm FPGAs and ASICs with Transceivers WP-01078-1.4 White Paper Increasing bandwidth requirements for broadband services are driving silicon vendors to use more and more high-speed serial transceivers. Therefore, nextgeneration applications feature a wide range of data rates, from a few Mbps to	Original	PDF	40-nm WP-01078-1 40-nm GPON block diagram TSMC 40nm 90 nm hspice CEI-6G-SR CPRI multi rate 10Gcapable 29K212 pcie X1 edge connector sata CIRCUIT diagram 40G-100G
10010b Abstract: b10010 ADN8102 ADN8102ACPZ ADN8102ACPZ-R7 ADN8102-EVALZ AN-772 MO-220-VMMD-4 Text: 3.75 Gbps Quad Bidirectional CX4 Equalizer ADN8102 Optimized for dc to 3.75 Gbps data Programmable input equalization Up to 22 dB boost at 1.875 GHz Compensates up to 30 meters of CX4 cable up to 3.75 Gbps Compensates up to 40 inches of FR4 up to 3.75 Gbps	Original	PDF	ADN8102 ADN8102ACPZ ADN8102ACPZ-R7 ADN8102-EVALZ 64-Lead CP-64-2 10010b b10010 ADN8102 ADN8102ACPZ ADN8102ACPZ-R7 ADN8102-EVALZ AN-772 MO-220-VMMD-4
5AGX Abstract: lpddr2 tutorial EP4CE22F17 solomon 16 pin lcd display 16x2 Altera MAX V CPLD DE2-70 vhdl code for dvb-t 2 fpga based 16 QAM Transmitter for wimax application with quartus altera de2 board sd card AL460A-7-PBF Text: Version 11.0 Altera Product Catalog Contents Glossary. 2 Stratix FPGA Series. 3 HardCopy® ASIC Series. 17 Arria® FPGA Series. 21	Original	PDF	SG-PRDCT-11 5AGX lpddr2 tutorial EP4CE22F17 solomon 16 pin lcd display 16x2 Altera MAX V CPLD DE2-70 vhdl code for dvb-t 2 fpga based 16 QAM Transmitter for wimax application with quartus altera de2 board sd card AL460A-7-PBF
EP2SGX60EF Abstract: CEI 23-16 circuit diagram of PPM transmitter and receiver CPRI multi rate HD-SDI over sdh PRBS10 3G-SDI serializer SIIGX52002-4 k307 Text: 2. Stratix II GX Transceiver Architecture Overview SIIGX52002-4.2 Introduction This chapter provides detailed information about the architecture of Stratix II GX devices. Figure 2–1 shows the Stratix II GX block diagram. Figure 2–1. Stratix II GX Transceiver Block Diagram	Original	PDF	SIIGX52002-4 8B/10B EP2SGX60EF CEI 23-16 circuit diagram of PPM transmitter and receiver CPRI multi rate HD-SDI over sdh PRBS10 3G-SDI serializer k307
resistor bank Abstract: JESD8-15 TI 7C mini-lvds source driver EIA-644 SSTL-15 SSTL-18 Text: 6. I/O Features in Stratix IV Devices SIV51006-3.1 This chapter describes how Stratix IV devices provide I/O capabilities that allow you to work in compliance with current and emerging I/O standards and requirements. With these device features, you can reduce board design interface costs and increase	Original	PDF	SIV51006-3 resistor bank JESD8-15 TI 7C mini-lvds source driver EIA-644 SSTL-15 SSTL-18
HD-SDI over sdh Abstract: uc 3884 b verilog code of prbs pattern generator S 1854 SMPTE-424 2206 CP 2262 encoder Programmable PLL Clock Generator SDH 209 toggle switches 2041 BY Text: Stratix II GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIIGX5V1-4.4 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and	Original	PDF
alt2gxb Abstract: texas handbook gxb tx_coreclk diode handbook handbook Text: 4. Stratix II GX ALT2GXB Megafunction User Guide SIIGX52003-4.1 Introduction The MegaWizard Plug-In Manager in the Quartus® II software creates or modifies design files that contain custom megafunction variations that can then be instantiated in a design file. The MegaWizard Plug-In	Original	PDF	SIIGX52003-4 alt2gxb texas handbook gxb tx_coreclk diode handbook handbook
Untitled Abstract: No abstract text available Text: Arria II Device Handbook Volume 1: Device Interfaces and Integration Arria II Device Handbook Volume 1: Device Interfaces and Integration 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-4.3 Document last updated for Altera Complete Design Suite version:	Original	PDF