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    HE1L5BT200S

    Abstract: 9916h HE1L5AA010S HE1L5AT080S HE1L5AT HE1L5
    Text: HE1LA*S Series Published Page 1 of 5 BGA (HE) Delay Lines (Patent Pending) HE1L5(A,B)(A,T)*S Series Description High-efficiency delay lines for clock and data deskew in single-ended circuit designs requiring precise timing control in a small, low profile BGA package.


    Original     		PDF Sn63/Pb37, Elec103-89-14 A0613-89-2 acb363040f5be585256a7b001dcc4c/443814c301 HE1L5BT200S 9916h HE1L5AA010S HE1L5AT080S HE1L5AT HE1L5