HDB3DEC Search Results

Contextual Info: IgT Integrated Telecom Technology, Inc. E3 Framer EAC-030-A User’s Manual Copyright 1994 -1 9 9 7 Integrated Telecom Technology, Inc. All Rights Reserved Integrated Telecom Technology, Inc. 18310 Montgomery Village Avenue, Suite 300 Gaithersburg, MD 20879 USA

RAV 14101

Abstract: PMC-90
Contextual Info: PMC PM6341 E1XC PMC-Sierra, Inc. DATA SHEET PMC-910419 E1 FRAMER/TRANSCEIVER ISSUE 8 PM6341 E1XC E1 FRAMER/TRANSCEIVER DATA SHEET ISSUE 8: JUNE 1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE • PMC-Sierra, Inc.

204B

Abstract: CST11 G732 S8978 ALTERNATE DIGIT INVERSION pin FOR PIN COMPATIBLE ADI
Contextual Info: - > GOULD C,EPT Digital Trunk Interface Circuit s Z tro m c s Preliminary Data Sheet S8978 Features Applications □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ Compatible with CCITT Recommendation G732 ST-BUS C om patible Interface to Bidirectional 2048 kbit/s CEPT link

Contextual Info: P T e l e c o m S ta n d a r d P r o d u c t I M r 1 PMC-Sierra, Inc. I / IV h PRELIMINARY INFORMATION PM 6341 E1XC SINGLE CEPTE1 TRANSCEIVER CONTENTS FEATURES. 4

MT8978

Contextual Info: MT8978 CEPT PCM 30 Framer Circuit ISO-CMOS ST-BUS" FAMILY MITEL* 9161-002-012-NA ISSUE 8 Features • • • • • • • • • • • • • Compatible with CCITT Recommendation G.732 ST-BUS compatible Interface to bidirectional 2048 kbit/s CEPT link

TD38-1505A

Abstract: rneg2
Contextual Info: P R E L IM IN A R Y 8/ 11/97 A Cirrus Logic Company C S 6 1 5 8 4 A Dual T1/E1 Line Interface Features General Description • Dual T1/E1 Line Interface The CS61584A is a dual line interface for T1/E1 appli­ cations, designed for high-voiume cards where low

ely transformers

Abstract: PM6341-QI IC Data-book PM4341A PM6341 TS16
Contextual Info: PM6341 E1XC DATA SHEET PMC-910419 ISSUE 8 E1 FRAMER/TRANSCEIVER PM6341 E1XC E1 FRAMER/TRANSCEIVER DATA SHEET ISSUE 8: JUNE 1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE PM6341 E1XC DATA SHEET PMC-910419 ISSUE 8

S191 marking

Contextual Info: PMC-Sierra, Inc. S ta n d a rd P r o d u c t I I / 1 ^ ^ ISSUE 7 PM 6341 E 1X C E1 FRAMER/TRANSCEIVER P M 6341 E1 XC E1 FRAMER/TRANSCEIVER Is s u e 7: F e b r u a r y , 1996 PMC-Sierra, Inc. 8501 Commerce Court, Burnaby, BC Canada V5A 4N3 604 668 7300 S ta n d a rd P r o d u c t

et 1102

Abstract: ely transformers PM6341 PM4341A TS16 IC Data-book g803
Contextual Info: PM6341 E1XC DATA SHEET ISSUE 8 E1 FRAMER/TRANSCEIVER :2 8: 03 AM PMC-910419 ,1 n Su nd ay E1XC 2J an ua ry ,2 00 3 02 PM6341 sil ico ne xp er to E1 FRAMER/TRANSCEIVER ISSUE 8: JUNE 1998 Do wn lo ad ed by ah m ed m et wa ly of DATA SHEET PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Contextual Info: PM6341 E1XC DATA SHEET ISSUE 8 E1 FRAMER/TRANSCEIVER :0 7: 26 PM PMC-910419 ,2 co n Fr id ay E1XC 9O ct ob er ,2 00 4 12 PM6341 Pa rtm in er In E1 FRAMER/TRANSCEIVER ISSUE 8: JUNE 1998 Do wn lo ad ed by Co nt e nt T ea m of DATA SHEET PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Contextual Info: GEC PLESSEY SEMICONDS MME » EH 37bflS25 QGlbQDS Q U P L S B GEC PL E SSE Y SEMICONDUCTORS PRELIMINARY INFORMATION DS3077-1.3 M V 1 4 4 2 HDB3 ENCODER/DECODER/CLOCK REGENERATOR The GPS 2M bit PCM signalling series com prises a group of circuits which will perform the com mon channel

Contextual Info: GEC PLESSEY | s e m i c o n d u c t o r s |_ PRELIMINARY INFORMATION DS3077-1.3 MV1442 HDB3 ENCODER/DECODER/CLOCK REGENERATOR The GPS 2Mbit PCM signalling series comprises a group of circuits which will perform the common channel

ABB stt 117

Contextual Info: P S ta n d a r d P r o d u c t ISSUE I [ \ / | t PMC-Sierra, Inc. I / 7 PM 6341E 1X C E1 FRAMER/TRANSCEIVER FEA TU R ES • Integrates a full-featured E1 transceiver in a single device with analog circuitry for receiving and transmitting G.703 2048 kbit/s compatible signals and digital

marking t16c

Abstract: "LINK STATE"
Contextual Info: PMC-Sierra, Inc. S TANDARD PRODUCT PM6341 E1XC ISSUE 7 E1 FRAMER/TRANSCEIVER PM6341 E1XC E1 FRAMER/TRANSCEIVER Issue 7: February, 1996

bit3195

Abstract: dmo 265 8051 interfacing programming examples TTB-11 diode T35 12H XRT7234 XR-T7295E XRT7296 XR-T7296 332102rx
Contextual Info: xr XRT7234 PRELIMINARY E3 UNI FOR ATM NOVEMBER ‘999 1.0 SYSTEM DESCRIPTION The XR-T7234 E3 UNI IC for ATM consists of the following functional sections/blocks. • Transmit Section – Transmit Utopia Interface Block – Transmit Cell Processor Block – Transmit E3 Framer Block

A97D

Abstract: 0497D ALTERNATE DIGIT INVERSION
Contextual Info: M I T E L S E M I C O N D U C T O R T7 t,24^370 0 0 0 4 5 0 4 6249370 MITEL SEMICONDUCTOR MT8978 CEPT Digital Trunk Interface Circuit Features • • • • • • • • • • • • • D st-bus family iso-cmos Compatible with CCITT Recommendation G 732

Contextual Info: DATA SHEET PM PMC-910419 ISSUE 8 1 PMC-Sierra, Inc. PM6341 e ix c E1 FRAMER/TRANSCEIVER FEATURES • Integrates a full-featured E1 transceiver in a single device with analog circuitry for receiving and transmitting G.703 2048 kbit/s compatible signals and digital circuitry for terminating the duplex digital signal.

Contextual Info: C S 61584A A dvanced Product D ata bo ok — CIRRUS LOGIC FEATURES • Dual T1/E1 Line Interface ■ 3.3 Volt and 5 Volt Versions ■ Crystal less Jitter Attenuator Meets European CTR 12 and ETSI ETS 300 011 Specifications ■ Matched Impedance Transmit Drivers

100-c23

Abstract: Oscillators 8MHz 4-pin saronix pulse transformer with four binding CON12 CS61583 CS61584 CS61584-IL3 CS61584-IL5 CS61584-IQ3 CS61584-IQ5
Contextual Info: CS61584 A Cirrus Logic Company Dual T1/E1 Line Interface Features General Description • The CS61584 is a dual line interface for T1/E1 applica­ tions, designed for high-volume cards where low power and high density are required. The device is optimized

HD b3c

Contextual Info: APRIL, 1996 SXT6234 E-Rate Multiplexer General Description Features The SXT6234 E-Rate Multiplexer is a single-chip solution for multiplexing four tributary channels into a single high speed data stream and for demultiplexing a high speed data stream back to four tributary channels. A ll of the necessary

OCXX

Abstract: t1e1-7
Contextual Info: CS61584 A Cirrus Logic Company Dual T1/E1 Line Interface Features General Description • DualT1/E1 Line Interface The CS61584 is a dual line interface for T1/E1 applica­ tions, designed for high-volume cards where low power and high density are required. The device is optimized

Contextual Info: CEPT Digital Trunk Interface Circuit •> GOULD Electronics Preliminary Data Sheet S8978 Features A p p lic a tio n s □ □ □ □ □ □ □ □ □ High Speed Links Using CEPT 2048 kbit/s Link □ PBX or Computer to CEPT 2048 kbit/s Link □ Channel Banks

CON12

Abstract: CS61584-IL5 CS61583 CS61584 CS61584-IL3 CS61584-IQ3 CS61584-IQ5 Transparent, Extended ribbon cable SRX5770
Contextual Info: CS61584 Dual T1/E1 Line Interface Features General Description • • • The CS61584 is a dual line interface for T1/E1 applications, designed for high-volume cards where low power and high density are required. The device is optimized for flexible microprocessor control through a serial or

D01002-2

Abstract: D01002
Contextual Info: GOULD 4U55916 GOULD S E M IC O N D U C T O R S E M IC O N D U C T O R D IV D 3E D IV D 03E -> GOUU3 | H O S S T lt . 0 D 1 0 D 1 7 E J 10017 D CEPT Digital Tmnk Interface Circuit Bectron,es Preliminary Data Sheet S8978 Features A p p lic a tio n s □ Compatible with CCITT Recommendation G732