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    HD74HC37 Search Results

    HD74HC37 Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    HD74HC373RP Renesas Electronics Corporation Octal D-Type Transparent Latches (3-State Outputs) Octal D-Type Transparent Latches (Inverted 3-State Outputs), , / Visit Renesas Electronics Corporation
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    HD74HC37 Price and Stock

    Renesas Electronics Corporation HD74HC373FPV-E

    HD74HC373FPV-E
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    Verical HD74HC373FPV-E 45 41
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    Chip1Stop HD74HC373FPV-E Tube 45
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    Quest Components HD74HC374FPEL-E 2,528
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    Quest Components HD74HC373P-E 687
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    Quest Components HD74HC375FPEL-E 299
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    Hitachi Ltd HD74HC374P

    IC,FLIP-FLOP,OCTAL,D TYPE,HC-CMOS,DIP,20PIN,PLASTIC
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    Quest Components HD74HC374P 152
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    HD74HC37 Datasheets (38)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    HD74HC373 Hitachi Semiconductor Octal D-type Transparent Latches Original PDF
    HD74HC373 Renesas Technology Original PDF
    HD74HC373FP Hitachi Semiconductor Latch, D-Type, Transparent, 8-Channel, 3-State, 20-SOP Original PDF
    HD74HC373FP Renesas Technology Logic IC; Function: Octal D-type Transparent Latches with 3-state output; Package: SOP Original PDF
    HD74HC373FP Hitachi Semiconductor Logic IC - Datasheet Reference Scan PDF
    HD74HC373P Hitachi Semiconductor Latch, D-Type, Transparent, 8-Channel, 3-State, 20-DIP Original PDF
    HD74HC373P Renesas Technology Logic IC; Function: Octal D-type Transparent Latches with 3-state output; Package: DIP Original PDF
    HD74HC373P Hitachi Semiconductor Octal D-Type Transparent Latch Scan PDF
    HD74HC373RP Hitachi Semiconductor Latch, D-Type, Transparent, 8-Channel, 3-State, 20-SOP Original PDF
    HD74HC373RP Renesas Technology Logic IC; Function: Octal D-type Transparent Latches with 3-state output; Package: SOP Original PDF
    HD74HC373T Hitachi Semiconductor Latch, D-Type, Transparent, 8-Channel, 3-State, 20-TSSOP Original PDF
    HD74HC373T Renesas Technology Logic IC; Function: Octal D-type Transparent Latches with 3-state output; Package: TSSOP Original PDF
    HD74HC374 Hitachi Semiconductor Octal D-type Flip-Flops (with 3-state outputs) - Octal D-type Flip-flops (with inverted 3-state outputs) Original PDF
    HD74HC374 Renesas Technology Original PDF
    HD74HC374FP Renesas Technology Octal D-type Flip-Flops with 3-state output Original PDF
    HD74HC374FP Renesas Technology Logic IC; Function: Octal D-type Flip-Flops with 3-state output; Package: SOP Original PDF
    HD74HC374P Renesas Technology Logic IC; Function: Octal D-type Flip-Flops with 3-state output; Package: DIP Original PDF
    HD74HC374P Renesas Technology Octal D-type Flip-Flops with 3-state output Original PDF
    HD74HC374RP Renesas Technology Flip-Flop, Positive-Edge, D Flip-Flop, 8-Element, 1-Input, 20-SOP Original PDF
    HD74HC374T Renesas Technology Flip-Flop, Positive-Edge, D Flip-Flop, 8-Element, 1-Input, 20-TSSOP Original PDF

    HD74HC37 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    HD74HC377

    Abstract: HD74HC377FPEL HD74HC377P PRDP0020AC-B PRSP0020DD-B
    Text: HD74HC377 Octal D-type Flip-Flops with Enable REJ03D0622-0200 (Previous ADE-205-501) Rev.2.00 Mar 30, 2006 Description Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the enable input G is low. Clock triggering occurs at a particular voltage level and is not


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    HD74HC377 REJ03D0622-0200 ADE-205-501) HD74HC377 HD74HC377FPEL HD74HC377P PRDP0020AC-B PRSP0020DD-B PDF

    Hitachi DSA002789

    Abstract: No abstract text available
    Text: HD74HC375 Quad. Bistable Latches Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data D input is transferred to the Q output when the enable (G) is high and the Q output will follow the data input as long as the enable


    Original
    HD74HC375 Hitachi DSA002789 PDF

    Hitachi DSA00279

    Abstract: No abstract text available
    Text: HD74HC373/HD74HC533 Octal D-type Transparent Latches with 3-state outputs Octal D-type Transparent Latches (with inverted 3-state outputs) Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low,


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    HD74HC373/HD74HC533 HD74HC373 HD74HC533 Hitachi DSA00279 PDF

    Hitachi DSA002789

    Abstract: HD74hc377
    Text: HD74HC377 Octal D-type Flip-Flops with Enable Description Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the enable input G is low. Clock triggering occurs at a


    Original
    HD74HC377 Hitachi DSA002789 HD74hc377 PDF

    Hitachi DSA002789

    Abstract: No abstract text available
    Text: HD74HC374/HD74HC534 Octal D-type Flip-Flops with 3-state outputs Octal D-type Flip-flops (with inverted 3-state outputs) Description These devices are positive edge triggered flip-flops. The difference between HD74HC374 and HD74HC534 is only that the former is a true outputs and the latter is a false outputs. Data at the D


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    HD74HC374/HD74HC534 HD74HC374 HD74HC534 Hitachi DSA002789 PDF

    HD74HC373P

    Abstract: HD74HC373 75x12 HD74HC373FPEL HD74HC373RPEL HD74HC373TELL HD74HC533 HD74HC533FPEL HD74HC533P
    Text: HD74HC373, HD74HC533 Octal D-type Transparent Latches with 3-state outputs Octal D-type Transparent Latches (with inverted 3-state outputs) REJ03D0619-0300 Rev.3.00 Mar 25, 2009 Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of


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    HD74HC373, HD74HC533 REJ03D0619-0300 HD74HC373 HD74HC533 HD74HC373P 75x12 HD74HC373FPEL HD74HC373RPEL HD74HC373TELL HD74HC533FPEL HD74HC533P PDF

    HD74HC374

    Abstract: HD74HC534 Hitachi DSA00395
    Text: HD74HC374/HD74HC534 Octal D-type Flip-Flops with 3-state outputs Octal D-type Flip-flops (with inverted 3-state outputs) Description These devices are positive edge triggered flip-flops. The difference between HD74HC374 and HD74HC534 is only that the former is a true outputs and the latter is a false outputs. Data at the D inputs,


    Original
    HD74HC374/HD74HC534 HD74HC374 HD74HC534 Hitachi DSA00395 PDF

    HD74HC373

    Abstract: HD74HC533 DSA003719
    Text: HD74HC373/HD74HC533 Octal D-type Transparent Latches with 3-state outputs Octal D-type Transparent Latches (with inverted 3-state outputs) Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at


    Original
    HD74HC373/HD74HC533 HD74HC373 HD74HC533 DSA003719 PDF

    HD74HC375

    Abstract: Hitachi DSA00389
    Text: HD74HC375 Quad. Bistable Latches Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data D input is transferred to the Q output


    Original
    HD74HC375 HD74HC375 Hitachi DSA00389 PDF

    HD74HC373P

    Abstract: HD74HC373 HD74HC373FPEL HD74HC533 HD74HC533FPEL HD74HC533P
    Text: HD74HC373, HD74HC533 Octal D-type Transparent Latches with 3-state outputs Octal D-type Transparent Latches (with inverted 3-state outputs) REJ03D0619-0200 (Previous ADE-205-498) Rev.2.00 Mar 30, 2006 Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of


    Original
    HD74HC373, HD74HC533 REJ03D0619-0200 ADE-205-498) HD74HC373 HD74HC533 HD74HC373P HD74HC373FPEL HD74HC533FPEL HD74HC533P PDF

    HD74HC375

    Abstract: Hitachi DSA00222
    Text: HD74HC375 Quad. Bistable Latches ADE-205-500 Z 1st. Edition Sep. 2000 Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output


    Original
    HD74HC375 ADE-205-500 HD74HC375 Hitachi DSA00222 PDF

    HD74HC377

    Abstract: Hitachi DSA00222
    Text: HD74HC377 Octal D-type Flip-Flops with Enable ADE-205-501 (Z) 1st. Edition Sep. 2000 Description Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the enable input G is low. Clock triggering occurs at a particular


    Original
    HD74HC377 ADE-205-501 HD74HC377 Hitachi DSA00222 PDF

    HD74HC375

    Abstract: HD74HC375P PRDP0016AE-B PRSP0016DH-B
    Text: HD74HC375 Quad. Bistable Latches REJ03D0621-0200 Previous ADE-205-500 Rev.2.00 Mar 30, 2006 Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable


    Original
    HD74HC375 REJ03D0621-0200 ADE-205-500) HD74HC375 HD74HC375P PRDP0016AE-B PRSP0016DH-B PDF

    ck g

    Abstract: HD74HC377 Hitachi DSA003777
    Text: HD74HC377 Octal D-type Flip-Flops with Enable Description Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the enable input G is low. Clock triggering occurs at a particular


    Original
    HD74HC377 ck g HD74HC377 Hitachi DSA003777 PDF

    HD74HC374P

    Abstract: HD74HC374 HD74HC374FPEL HD74HC534 HD74HC534P HD74HC534FPEL
    Text: HD74HC374, HD74HC534 Octal D-type Flip-Flops with 3-state outputs Octal D-type Flip-Flops (with inverted 3-state outputs) REJ03D0620-0200 (Previous ADE-205-499) Rev.2.00 Mar 30, 2006 Description These devices are positive edge triggered flip-flops. The difference between HD74HC374 and HD74HC534 is only


    Original
    HD74HC374, HD74HC534 REJ03D0620-0200 ADE-205-499) HD74HC374 HD74HC534 HD74HC374P HD74HC374FPEL HD74HC534P HD74HC534FPEL PDF

    Untitled

    Abstract: No abstract text available
    Text: HD74HC374 HD74HC534 • Octal D -type Flip-Flops with 3 -s ta te outputs • Octal D -type Flip-Flops (with inverted 3 -s ta te o u tp u ts ) These devices are positive edge triggered flip-flops. The d if­ ference between H D 7 4 H C 3 7 4 and H D 7 4 H C 5 3 4 is only that


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    HD74HC374 HD74HC534 PDF

    Untitled

    Abstract: No abstract text available
    Text: HD74HC377 Octal D-type Flip-Flops with Enable Information at the D inputs meeting the setup time require- | ments is transferred to the Q outputs on the positive-going PIN ARRANGEMENT edge of the clock pulse if the enable input G is low. Clock triggering occurs at a particular voltage level and is not


    OCR Scan
    HD74HC377 PDF

    Untitled

    Abstract: No abstract text available
    Text: HD74HC375 # Q u a d Bistable Latches This latch » ideally suited for usa as temporary storage for binary information between processing units and input/ output or indicator units. Information present at a data O input is transferred to the Q output when the enable (G) is


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    HD74HC375 PDF

    HD74HC373

    Abstract: No abstract text available
    Text: I fl 4 i H t 2 G 3 O Q I O S I Q 2 I H I T A C H I / L O G I C / A R R A Y S / M E n TB T-46-07-11 HD74HC373 HD74HC533 • Octal D-type Transparent Latches with 3-state outputs) • Octal D-type Transparent Latches (with-inverted 3-state outputs) When the latch enable inpu t is high, the Q outputs o f


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    T-46-07-11 HD74HC373 HD74HC533 HD74HC373 HD74HC533 44TLED3 0D1D315 T-90-20 PDF

    Untitled

    Abstract: No abstract text available
    Text: HD74HC375 • Q u a d . Bistable Latches This latch is ideally suited for use as temporary storage for binary | information between processing units and input/ i PIN ARRANGEMENT output or indicator units. Information present at a data D id [ T input is transferred to the Q output when the enable (G) is


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    HD74HC375 HD74HC3T5 1-85X1 PDF

    HD74HC373

    Abstract: No abstract text available
    Text: HD74HC373 HD74HC533 W hen th e la tch enable in p u t • Octal D-type Transparent Latches with 3-state outputs • Octal D-type Transparent Latches (with inverted 3-state outputs) i t h ig h , th e Q o u tp u ts o f | I PIN ARRANGEMENT 1 IH D74HC373 H D 7 4 H C 3 7 3 w ill fo llo w th e O in p u ts a n d th e Q o u tp u ts o f


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    HD74HC373 HD74HC533 D74HC373 PDF

    DIODE go z 4d

    Abstract: HD74HC373
    Text: HD74HC373 HD74HC533 When the latch enable input # Octal D-type Transparent Latches with 3-state outputs • Octal D-type Transparent Latches (with inverted 3-state outputs) is high, the Q outputs o f | I PIN ARRANGEMENT * »H D 74H C 373 H D 7 4 H C 3 7 3 w ill fo llo w the D inputs and the Q outputs o f


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    HD74HC373 HD74HC533 DIODE go z 4d PDF

    HD74HC373

    Abstract: HD74HC533 I38D Hitachi Scans-001
    Text: I fl 4iHt2G3 OQIOSIQ 2 I HITACHI/ LOGIC/ARRAYS/MEn TB T-46-07-11 HD74HC373 HD74HC533 • Octal D-type Transparent Latches with 3-state outputs) • Octal D-type Transparent Latches (with-inverted 3-state outputs) When the latch enable inpu t is high, the Q outputs o f


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    44clti5D3 Un74UrQ7' T-46-07-11 HD74HC533 HD74HC373 HD74HC533 FP-14D I38D Hitachi Scans-001 PDF

    Untitled

    Abstract: No abstract text available
    Text: HD74HC374 HD74HC534 • Octal D-type Flip-Flops with 3-state outputs • Octal D-type Flip-Flops (with inverted 3 - state o u tp u ts) These devices are positive edge triggered flip -flo p s. The d if­ ference between HD74HC374 and HD74HC534 is on ly that


    OCR Scan
    HD74HC374 HD74HC534 HD74HC534 HD74HC374 PDF