TOP246
Abstract: EER28L transformer for top246 TOP246 equivalent erl28 VAC TRANSFORMER PC40EER28L-Z thermistor 10 ohm BEER-28L-1112CPH orega transformer smt18
Text: Title Engineering Prototype Report EP13 43 W / 57 W pk, 5 Output TOPSwitch-GX (TOP246Y) Power Supply Specification 185 - 265 VAC input, 3.3 V / 3 A, 5 V / 3.2 A, 12 V / 0.6 A (1.8 A pk), 18 V / 0.5 A, 30 V / 0.03 A output. (Details for 115 VAC conversion included)
|
Original
|
OP246Y)
EPR-000013
08-May-2001
load5143
TOP246
EER28L
transformer for top246
TOP246 equivalent
erl28
VAC TRANSFORMER
PC40EER28L-Z
thermistor 10 ohm
BEER-28L-1112CPH
orega transformer smt18
|
PDF
|
vx 1937
Abstract: No abstract text available
Text: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SII5V1-4.5 Copyright 2011 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
|
Original
|
|
PDF
|
pin configuration of IC 1619
Abstract: pin configuration for half adder U 1560 CQ 245 D 1609 VO A1 JD 1801 dct verilog code jd 1801 data sheet logic diagram to setup adder and subtractor LPM 562 force sensor sensor 3414
Text: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SII5V1-4.4 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
|
Original
|
|
PDF
|
jd 1801 data sheet
Abstract: JD 1801 PCI 6601 U 1560 CQ 245 2262 encoder JD 1801 PIN DIAGRAM sensor 3414 EP2S15 EP2S30 EP2S60
Text: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SII5V1-4.3 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
|
Original
|
|
PDF
|
verilog code 8 stage cic interpolation filter
Abstract: verilog code 8 stage cic decimation filter vhdl code for decimator CIC Filter vhdl code for interpolation CIC Filter MISO Matlab code interpolation CIC Filter verilog code for decimator cic compensation filters vhdl code for cic Filter verilog code for parallel fir filter
Text: CIC MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Date: 11.0 May 2011 Copyright 2011 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
|
Original
|
|
PDF
|
MISO Matlab code
Abstract: cic compensation filters vhdl code for cic Filter vhdl code for decimator CIC Filter AN320 AN442 AN455 EP3C10F256C6 cic filter matlab design verilog code 8 stage cic interpolation filter
Text: CIC MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Date: 9.1 November 2009 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
|
Original
|
|
PDF
|
tda 85630
Abstract: tda 9580 LDR type orp 12 str w 6554 a LDR orp 11 TDA 9583 str 6554 tda 5652 TDA 4963 tda 8130
Text: ST120 DSP-MCU PROGRAMMING MANUAL Release 1.0 This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice. ST120 DSP-MCU PROGRAMMING MANUAL TABLE OF CONTENTS Page 1 ST120 DSP-MCU ASSEMBLY SYNTAX SPECIFICATIONS .
|
Original
|
ST120
ST120PM
tda 85630
tda 9580
LDR type orp 12
str w 6554 a
LDR orp 11
TDA 9583
str 6554
tda 5652
TDA 4963
tda 8130
|
PDF
|
MISO Matlab code
Abstract: verilog code 8 stage cic interpolation filter cic compensation filters verilog code 8 stage cic decimation filter vhdl code for decimator CIC Filter vhdl code for interpolation CIC Filter circuit diagram of speech to text, altera digital FIR Filter verilog HDL code verilog code for interpolation filter c code for interpolation and decimation filter
Text: CIC MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Date: 10.0 July 2010 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
|
Original
|
|
PDF
|
connect usb in vcd player circuit diagram
Abstract: usb vcd player circuit diagram avalon slave interface with pci master bus Oscilloscope USB 200Mhz Schematic LED Dot Matrix vhdl code AN-605 verilog hdl code for encoder parallel to serial conversion vhdl IEEE paper altera 2C35 UART using VHDL
Text: Quartus II Handbook Version 10.0 Volume 3: Verification 101 Innovation Drive San Jose, CA 95134 www.altera.com QII5V3-10.0.1 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
|
Original
|
QII5V3-10
connect usb in vcd player circuit diagram
usb vcd player circuit diagram
avalon slave interface with pci master bus
Oscilloscope USB 200Mhz Schematic
LED Dot Matrix vhdl code
AN-605
verilog hdl code for encoder
parallel to serial conversion vhdl IEEE paper
altera 2C35
UART using VHDL
|
PDF
|
dct 814
Abstract: clock tree balancing IC 2073 astro tools B2008 project ips ips works astro mb HIERARCHICALLY astro place and routing
Text: Designing Hierarchically Reusable Digital IPs Using DC-T/ICC Flow James Deng Michael Lai Ninh Ngo Keith Duwel Kevin Huang Michael Zheng Richard Price Altera Corporation San Jose, California, USA www.altera.com Liang Xu, Sridhar Panchapakesan, Pallavi Padala
|
Original
|
45-nm
dct 814
clock tree balancing
IC 2073
astro tools
B2008
project ips
ips works
astro mb
HIERARCHICALLY
astro place and routing
|
PDF
|
Statistical
Abstract: regression
Text: Chapter 9: Statistics This chapter describes the tools for analyzing statistical data on the TI-80. These include entering lists of data, calculating statistical results, fitting data to a model, and plotting data. Chapter Contents Getting Started: Building Height and City Size .
|
Original
|
TI-80.
Statistical
regression
|
PDF
|
trigger transformer
Abstract: No abstract text available
Text: High Voltage Trigger Transformer EPC3215G-X & EPC3215G-X-LF EPC3215G-XX & EPC3215G-XX-LF ELECTRONICS INC. • Used as Trigger Transformer in Photoflash Circuits • Operating Temperature : -40°C to +85°C • UL 94V-0 Recognized Components • UL 1446 Class B Insulation System
|
Original
|
EPC3215G-X
EPC3215G-X-LF
EPC3215G-XX
EPC3215G-XX-LF
EPC3215G-1
EPC3215G-2
EPC3215G-3A
IPC/JEDEC-J-STD-020C)
EPC3215G-XX
trigger transformer
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Altera Transceiver PHY IP Core User Guide Subscribe Feedback UG-01080 2013.7.1 101 Innovation Drive San Jose, CA 95134 www.altera.com TOC-2 Contents Introduction to the Protocol-Specific and Native Transceiver PHYs.1-1 Protocol-Specific Transceiver
|
Original
|
UG-01080
|
PDF
|
VE880
Abstract: LE88311 sumida c8100 MBT3946DW1T1LRG LE88311DLC IIR NEON le88331 MURS120DICT-ND VE880 "pin compatible" rft rg1
Text: A D V A N C E D C O P Y Le88311/331 Dual Channel Tracking Battery VoicePort™ Device VE880 Series APPLICATIONS ORDERING INFORMATION Voice enabled Cable and DSL Modems Voice over IP/ATM - Integrated Access Devices IAD Residential VoIP Gateways and Routers
|
Original
|
Le88311/331
VE880
Le88311/331
LE88311
sumida c8100
MBT3946DW1T1LRG
LE88311DLC
IIR NEON
le88331
MURS120DICT-ND
VE880 "pin compatible"
rft rg1
|
PDF
|
|
LVDS connector 26 pins LCD m tsum
Abstract: DDR3 sdram pcb layout guidelines IC 74 HC 193 simple microcontroller using vhdl NEC MEMORY transistor marking v80 ghz alu project based on verilog m104a electrical engineering projects NAND intel
Text: Quartus II Handbook Version 9.0 Volume 1: Design and Synthesis 101 Innovation Drive San Jose, CA 95134 www.altera.com QII5V1-9.0 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
|
Original
|
|
PDF
|
EP2S60F
Abstract: OV 5642 27631 VHDL fpga stratix II ep2s180
Text: Section I. Stratix II Device Family Data Sheet This section provides the data sheet specifications for Stratix II devices. This section contains feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC
|
Original
|
|
PDF
|
General Electric Semiconductor Data Handbook
Abstract: D 1609 VO A1 Datasheet Library 1979 S 1854 bst 1046 class 10 up board Datasheet 2012 CMOS applications handbook d 1878 DATA SHEET sensor 3414 toggle switches 2041 BY
Text: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SII5V1-4.4 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
|
Original
|
|
PDF
|
EP2S15
Abstract: EP2S180 EP2S30 EP2S60 EP2S90 A 27631 transistor
Text: Section I. Stratix II Device Family Data Sheet This section provides the data sheet specifications for Stratix II devices. This section contains feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC
|
Original
|
|
PDF
|
RSN 314 H 41
Abstract: 4558 DX RSN 315 H 42 AM7901 h3 0925 4558 DX dip 8 4558 audio operational IC 4558 distortion mark 0925 h3 32X2
Text: NOV 2 i 1991 Final Am7901 B/C Advanced Micro Devices Subscriber Line Audio-Processing Circuit SLAC WORLD-CHIP DISTINCTIVE CHARACTERISTICS • Combination CODEC and Filter ■ No trimming or adjustments required ■ Uses digital signal processing ■ Six user-programmable digital filters
|
OCR Scan
|
Am7901
1M-9/90-0
RSN 314 H 41
4558 DX
RSN 315 H 42
h3 0925
4558 DX dip 8
4558 audio operational
IC 4558 distortion
mark 0925 h3
32X2
|
PDF
|
Untitled
Abstract: No abstract text available
Text: H O ' 2 1 19« P R E L IM IN A R Y a Am79C02/3 A) Advanced Micro Dual Subscriber Line Audio-Processing Circuit (DSLAC Device) Devices DISTINCTIVE CHARACTERISTICS • Software programmable: Dual PCM ports -S L IC impedance -T rans-hybrid balance -T ransm it and Receive gains
|
OCR Scan
|
Am79C02/3
096-MHz
Am79C02/3A
WCP-8M-9/91-0
|
PDF
|
STR F 6234
Abstract: 09893E e712 09893f 56497 440-256 lmr2 5d DSC 5D
Text: Am79C30A/32A Advanced Micro Devices Digital Subscriber Controller DSC™ Circuit DISTINCTIVE CHARACTERISTICS • Combines CCITT 1.430 S/T-lnterface Transceiv er, D-Channel LAPD Processor, Audio Proces sor (DSC device only), and IOM-2 Interface in a
|
OCR Scan
|
Am79C30A/32A
16-byte
09B93G
3M-i/95-0
STR F 6234
09893E
e712
09893f
56497
440-256
lmr2 5d
DSC 5D
|
PDF
|
SC4105
Abstract: preamplifier 4558 circuit diagram DIN 3967 617-2240 IC1 4558 h3 0925 SC430 ic 4558 audio diagram LM 4138 BTA 2087-0
Text: NOV 2 1 199» Preliminary ÎI Am79C30A Advanced Micro Devices Digital Subscriber Controller DSC DISTINCTIVE CHARACTERISTICS • Combines CCITT 1.430 S/T Interface Trans ceiver, D-channel LAPD Processor, Audio Processor (DSC only), and IOM-2 Interface
|
OCR Scan
|
Am79C30A
BTA/5M/4-91
SC4105
preamplifier 4558 circuit diagram
DIN 3967
617-2240
IC1 4558
h3 0925
SC430
ic 4558 audio diagram
LM 4138
BTA 2087-0
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NOV 2 1 199» n Preliminary Am79C30A Advanced Micro Devices Digital Subscriber Controller DSC DISTINCTIVE CHARACTERISTICS • Combines CCITT 1.430 S/T Interface Trans ceiver, D-channel LAPD Processor, Audio Processor (DSC only), and IOM-2 Interface
|
OCR Scan
|
Am79C30A
BTA/5M/4-91
|
PDF
|
IC 4468
Abstract: No abstract text available
Text: F LK 202M H -14 f u j Tt s u X-Ku Band Power GaAs FETs FEATURES • High Output Power: P-|dB = 32.5dB m Typ. • High Gain: G ^ b = 6.0dB (Typ.) • High PAE: riadd = 27% (Typ.) • Proven Reliability • Herm etic M etal/C eram ic Package DESCRIPTION Th e F L K 2 0 2 M H -1 4 is a power G aAs F E T that is designed for general
|
OCR Scan
|
FLK202M
IC 4468
|
PDF
|