GPS TOD FORMAT Search Results

AR51A-09

Contextual Info: AR51A-09 GPS-Disciplined Rubidium Clock Accurate Time & Frequency System for Military Applica ons AR51A-09 Features • GPS disciplined Rubidium clock • Frequency Accuracy : 1E-12 • 1PPS Accuracy: 30ns RMS • Mul ple outputs: 10MHz, 1PPS, TOD (Time of Day)

AR76

Abstract: vectron ocxo gps receiver
Contextual Info: AR76 GPS-Disciplined Rubidium/OCXO Clock AR76 Features • Frequency Accuracy : 1E-12 • 1PPS Accuracy: 20ns RMS • Holdover: 1 s/24 hours, 5E-11/month • 20 outputs 10MHz, 1PPS, TOD • LAN IPV4 (NTP V3, Monitor & Control, DHCP) • External 1PPS / Frequency input for disciplining

e/RJ48C

Contextual Info: parallel measurements for Ethernet & IP Mobile Backhaul test multiple Slave and Boundary Clocks simultaneously Save on time and equipment with the Calnex Paragon - t 1588v2 Paragon-t at-a-glance 4 ports Sync-E clock measurement 1GbE, 100BT 4 ports clock measurement

RF-3073-AT242

Abstract: Voice encryption mobile
Contextual Info: multiband networking radio RF-7800M-MP features >> Software-Defined >> SCA v2.2 >> Mobile ad-hoc networking >> 30 Mhz to 2 GHz Frequency Range >> Higher data rates >> Programmable Crypto The RF-7800M-MP Multiband Networking Radio is a revolutionary CNR-sized radio that

AD11405

Contextual Info: PRELIMINARY TECHNICAL DATA a 14-Bit, 105MSPS A/D Converter AD11405 PERFORMANCE FEATURES FUNCTIONAL BLOCK DIAGRAM 105 MSPS sample rate IF Sampling to 200 MHz 85dB Spurious-Free Dynamic Range out to 200 MHz Two’s Complement Output Format 3.3V Compatible Outputs

408C

Abstract: AD6640 AD6640AST 44-Terminal
Contextual Info: a FEATURES 65 MSPS Minimum Sample Rate 80 dB Spurious-Free Dynamic Range IF-Sampling to 70 MHz 695 mW Power Dissipation Single +5 V Supply On-Chip T/H and Reference Twos Complement Output Format 3.3 V or 5 V CMOS-Compatible Output Levels APPLICATIONS Cellular/PCS Base Stations

Contextual Info: STA-61 and STA-61G Sync Tester/Analyzer The STA-61 synchronization tester/analyzer is now known as the Sentinel available from Calnex Solutions. The information in this document is for the convenience of existing STA-61 users. • Synchronization test platform for Next

gps tod format

Abstract: ERICSSON 2g and 3g bts ericsson bts Technical specification IEEE1588v2 IEEE1588 "Mobile switching center" ericsson GSM equipments 01-80-C2-00-00-02 Synchronous Ethernet IEEE1588 phy
Contextual Info: Synchronization over Packet Networks April 2008 Maamoun Seido – System Architect Solutions for Next-Generation Timing ƒ Two solutions are becoming dominant – Physical Layer Synchronization or Synchronous Ethernet SyncE – Protocol Layer Synchronization or Timing Over Packet (ToP)

686C CAPACITOR

Abstract: AI203
Contextual Info: EV10AS008B 10-bit 2.2 Gsps ADC Datasheet - Preliminary Specification Features • • • • • • • • • • • • • 10-bit Resolution ADC 2.2 Gsps Sampling Rate Ascending Compatibility with e2v AT84AS008 10-bit 2.2 Gsps ADC 500 mVpp Full-scale Analog Input Range

marking codes transistors 2F2

Abstract: BDC Marking gps tod format AT84AS008 AI203 AT84AS008CGL AT84CS001 RO4003 TS83102G0B
Contextual Info: Features • • • • • • • • • • • • • • 10-bit Resolution ADC 2.2 Gsps Sampling Rate Seamless Ascending Compatibility with TS83102G0B 10-bit 2 Gsps ADC 500 mVpp Full-scale Analog Input Range 100Ω Differential or 50Ω Single-ended Analog input and Clock Input

atmel 948

Contextual Info: Features • • • • • • • • • • • • • • 10-bit Resolution ADC 2.2 Gsps Sampling Rate Seamless Ascending Compatibility with Atmel TS83102G0B 10-bit 2 Gsps ADC 500 mVpp Full-scale Analog Input Range 100Ω Differential or 50Ω Single-ended Analog input and Clock Input

gps tod format

Abstract: marking codes transistors 2F2 TRANSISTOR J 6815 EQUIVALENT TS83102 5404A j 6815 transistor at84as008cgl
Contextual Info: Features • • • • • • • • • • • • • • 10-bit Resolution ADC 2.2 Gsps Sampling Rate Seamless Ascending Compatibility with Atmel TS83102G0B 10-bit 2 Gsps ADC 500 mVpp Full-scale Analog Input Range 100Ω Differential or 50Ω Single-ended Analog input and Clock Input

gps tod format

Abstract: atmel 948
Contextual Info: Features • • • • • • • • • • • • • • 10-bit Resolution ADC 2.2 Gsps Sampling Rate Seamless Ascending Compatibility with Atmel TS83102G0B 10-bit 2 Gsps ADC 500 mVpp Full-scale Analog Input Range 100Ω Differential or 50Ω Single-ended Analog input and Clock Input

AD6640

Abstract: AD10242 AD10265 AD9631 AD9632 D10A
Contextual Info: a Dual Channel, 12-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning AD10265 performance. The AD10265 uses innovative high-density circuit design and laser-trimmed thin-film resistor networks to achieve exceptional matching and performance while still maintaining excellent isolation, and providing for significant board

Contextual Info: AT84AS008 10-bit 2.2 Gsps ADC Datasheet Features • • • • • • • • • • • • • • 10-bit Resolution ADC 2.2 Gsps Sampling Rate Seamless Ascending Compatibility with TS83102G0B 10-bit 2 Gsps ADC 500 mVpp Full-scale Analog Input Range

AT84AS008

Abstract: gray to binary AI203 AT84AS008CGL gps tod format transistor marking P8
Contextual Info: AT84AS008 10-bit 2.2 Gsps ADC Datasheet Features • • • • • • • • • • • • • • 10-bit Resolution ADC 2.2 Gsps Sampling Rate Seamless Ascending Compatibility with TS83102G0B 10-bit 2 Gsps ADC 500 mVpp Full-scale Analog Input Range

ADC 8 channels, 10msps

Contextual Info: a Dual Channel, 14-Bit, 10 MSPS A/D Converter with Analog Input Signal Conditioning PRELIMINARY TECHNICAL DATA 9/7/99 AD10410 For current information contact 336 605-4385 PERFORMANCE FEATURES Dual, 10 MSPS minimum sample rate - Channel-channel matching, +/- .1% gain error

ADC 8 channels, 10msps

Abstract: AD10242 AD10265 AD10410 AD9240 68-PIN
Contextual Info: a Dual Channel, 14-Bit, 10 MSPS A/D Converter with Analog Input Signal Conditioning PRELIMINARY TECHNICAL DATA AD10410 For current information contact 336 605-4385 PERFORMANCE FEATURES Dual, 10 MSPS minimum sample rate - Channel-channel matching, +/- .1% gain error

Contextual Info: 10-Gbps Ethernet MAC MegaCore Function User Guide 10-Gbps Ethernet MAC MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01083-3.2.1 Document last updated for Altera Complete Design Suite version: Document publication date:

Contextual Info: Dual Channel, 14-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning PRELIMINARY TECHNICAL DATA AD10465 For current information contact 336 605-4385 PERFORMANCE FEATURES Dual, 65 MSPS minimum sample rate - Channel-channel matching, +/- .1% gain error

gps tod format

Abstract: AD10242 AD10265 AD10465 AD6644 AD8037 AD8138 99MHZ TOD 5761
Contextual Info: a Dual Channel, 14-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning PRELIMINARY TECHNICAL DATA AD10465 For current information contact 336 605-4385 PERFORMANCE FEATURES Dual, 65 MSPS minimum sample rate - Channel-channel matching, +/- .1% gain error

BC641

Abstract: BC 641
Contextual Info: 12-Bit, 65 MSPS, Dual ADC AD15252 Preliminary Technical Data FUNCTIONAL BLOCK DIAGRAM FEATURES AD15252 12-bit, 65 MSPS dual ADC Differential input with 100 Ω input impedance Full-scale analog input: 300 mV p-p 180 MHz 3 dB bandwidth SNR −9 dBFS :64 dBFS (70 MHz AIN), 62 dBFS (140 MHz AIN)

74AS00 TTL

Abstract: 74AS00 AD10242 AD10265 AD6640 AD9631 AD9632 D10A analog b4a 100-c30 00
Contextual Info: a Dual Channel, 12-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning AD10265 65 MSPS performance. The AD10265 uses innovative highdensity circuit design and laser-trimmed thin-film resistor networks to achieve exceptional matching and performance

Fairchild E212

Abstract: toshiba e225 E180 VJ1206U474MFXMB e140 transformer E224 toshiba E181 VJ1206U e227 AD10242
Contextual Info: a Dual Channel, 12-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning AD10265 performance. The AD10265 uses innovative high-density circuit design and laser-trimmed thin-film resistor networks to achieve exceptional matching and performance while still maintaining excellent isolation, and providing for significant board