FMAX Search Results

Contextual Info: TIBPAL22V10-20M HIGH-PERFORMANCE IMPACT-X PROGRAMMABLE ARRAY LOGIC CIRCUITS SRPSQ12A - D3523, JUNE 1 9 9 0 -R E V IS E D MARCH 1992 JT P A C K A G E Second-Generation PLD Architecture TO P V IE W High-Performance Operation: fmax (External Feedback). . . 33.3 MHz

L20r

Contextual Info: TIBPAL20L8-20M, TIBPAL20R4 20M, T1BPAL20RB-20M, T1BPAL20R8 20M TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R615C, TIBPAL20R8 15C HIGH PERFORMANCE IMPACT1*PAL CIRCUITS D 2 9 2 0 , JUNE 1 9 8 6 -R E V IS E D DECEMBER 1 9 8 7 • High Performance: fmax feedback

TC74ACT109

Contextual Info: TOSHIBA TC74ACT109 Dual J-K Flip-Flop with Preset and Clear Features: • High Speed: fmax = 185MHz typ. at Vcc = 5V • Low Power Dissipation: lcc = 4|xA (max.) at Ta = 25°C • Compatible with T IL Outputs: V,L = 0.8V (max.) VlH=2V (min.) • Symmetrical Output Impedance:

Contextual Info: TOSHIBA TC74AC164 8-bit Shift Register S-IN, P-OUT Features: • High Speed: fmax = 170MHz (typ.) at Vco = 5V • Low Power Dissipation: • High Noise Immunity: VN,H=VNIL=28% Voc (min.) • Symmetrical Output Impedance: llOHl = I o l = 24mA (min.). Capability of driving 50ft transmission lines.

Contextual Info: TOSHIBA TC74AC109 Dual J-K Flip-Flop with Preset and Clear Features: • High Speed: fmax = 200MHz typ. at Vcc = 5V • Low Power Dissipation: lcc = 4|iA (max.) at Ta = 25°C • High Noise Immunity: VNIH = VN1L = 28% Vcc (min.) • Symmetrical Output Impedance: ll0H>= Iol = 24mA

up down counter truth table

Contextual Info: TOSHIBA TC74AC169 4-bit Binary Up/Down Counter Features: • High Speed: fmax = ?MHz typ. at V cc = 5V • Low Power Dissipation: lcc = 8nA (max.) at Ta = 25°C • High Noise Immunity: VN,H= V ML= 28% V cc (min.) • Symmetrical Output Impedance: • Balanced Propagation Delays: tpLH = W

Contextual Info: Precision Edge SY89325V ® Precision Edge 3.3V/5V 1.5Gbps DIFFERENTIAL CML/PECL/LVPECL-to-LVDS TRANSLATOR Micrel, Inc. SY89325V FEATURES • Guaranteed AC performance over temp and voltage: • DC-to >1.5Gbps data rate throughput • >750MHz clock fMAX • <50ps within-device skew

Contextual Info: 3V LVTTL-TO-DIFFERENTIAL LVPECL AND DIFFERENTIAL LVPECL-TO-LVTTL TRANSLATOR SY10EPT28L SY100EPT28L FINAL FEATURES • 3.3V ±10% power supply ■ Guaranteed AC parameters over temperature: fMAX > 275MHz LVTTL ■ < 2ns LVPECL-to-LVTTL propagation delay ■ < 600ps LVTTL-to-LVPECL propagation delay

Contextual Info: SuperLite SY55852U D FLIP-FLOP DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ 2.5GHz min. fMAX 2.3V to 5.7V power supply Single bit register memory Synchronizes 1 bit of data to a clock Optimized to work with SuperLite™ family Fully differential

Contextual Info: 2.5V, 2GHz ANY DIFF. IN-TO-LVDS Precision Edge SY89872U PROGRAMMABLE CLOCK DIVIDER/FANOUT Final BUFFER WITH INTERNAL TERMINATION FEATURES DESCRIPTION • Guaranteed AC performance over temperature and voltage: • >2GHz FMAX • < 750ps Tpd matched delay between banks

K416

Contextual Info: 2.5V/3.3V/5V 1:4 PECL/ECL 2.5GHz CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX FEATURES DESCRIPTION • Guaranteed AC parameters over temp/voltage: • > 2.5GHz fMAX • < 25ps within-device skew • < 275ps tr/tf time • < 525ps prop delay ■ 2:1 Differential Mux input

Contextual Info: Micrel 2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY WITH FINE TUNE CONTROL Precision Edge SY89296U Precision Edge™ SY89296U FEATURES • Precision LVPECL programmable delay line ■ Guaranteed AC performance over temperature and voltage: • > 1.5GHz fMAX

16V8

Abstract: GAL16LV8 GAL16LV8C GAL16LV8C-10LJ GAL16LV8C-15LJ GAL16LV8C-7LJ GAL16LV8D GAL16LV8D-3LJ GAL16LV8D-5LJ
Contextual Info: ree Lead-Fage P a c k ns Optio le! b Availa Features GAL16LV8 Low Voltage E2CMOS PLD Generic Array Logic Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 3.5 ns Maximum Propagation Delay — Fmax = 250 MHz — 2.5 ns Maximum from Clock Input to Data Output

GAL16V8

Abstract: GAL16VP8 GAL16VP8B-15LJ GAL16VP8B-15LP GAL16VP8B-25LJ GAL16VP8B-25LP AC021 isppld
Contextual Info: GAL16VP8 High-Speed E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH DRIVE E2CMOS GAL® DEVICE — TTL Compatible 64 mA Output Drive — 15 ns Maximum Propagation Delay — Fmax = 80 MHz — 10 ns Maximum from Clock Input to Data Output

Contextual Info: LeadFree a P ckage Options Available! ispLSI 2128/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS fmax = 100 MHz Maximum Operating Frequency tpd = 10 ns Propagation Delay • IN-SYSTEM PROGRAMMABLE D0 C7 A1 ES

20xv10

Abstract: 20L10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10
Contextual Info: GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs

26CV12

Abstract: GAL26CV12 GAL26CV12B-10LJ GAL26CV12B-10LP GAL26CV12B-15LP GAL26CV12C-7LJ GAL26CV12C-7LP 122x52
Contextual Info: GAL26CV12 High Performance E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 142.8 MHz — 4.5ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs

Contextual Info: TOSHIBA TC74AC390 Dual Decade Counter Features: High Speed: fMAX 160MHz typ. at V cc = 5V Low Power Dissipation: Icc = 8|aA (max.) at Ta = 25°C High Noise Immunity: V N,H = V N!L = 28% Vcc (min.) Symmetrical Output Impedance: ll0Hl = Iol = 24mA (min.). Capability of driving 50Q transmission lines.

74HCT646

Abstract: DIP-24 M74HCT646 M74HCT646B1R M74HCT646M1R M74HCT646RM13TR M74HCT646TTR SAB 16 pin dip switch
Contextual Info: M74HCT646 OCTAL BUS TRANSCEIVER/REGISTER WITH 3 STATE OUTPUTS • ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 60 MHz TYP. at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE:

74LVX74

Abstract: 74LVX74M 74LVX74MTR 74LVX74TTR TSSOP14
Contextual Info: 74LVX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 145MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V AT VCC=3V LOW POWER DISSIPATION:

HC193

Abstract: 74LS192 truth table IC 74LS192 74HC192 74LS192 INTERNAL DIAGRAM M54/M74HC192 74LS192 ic 74LS192 PIN diagram data sheet ic 74ls192 HC192
Contextual Info: M54/M74HC192 M54/M74HC193 HC192 - SYNCHRONOUS UP/DOWN DECADE COUNTER HC193 - SYNCHRONOUS UP/DOWN BINARY COUNTER . . . . . . . . HIGH SPEED fMAX = 54 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)

HC32

Abstract: HC40103 M74HC40103 M74HC40103B1R M74HC40103M1R M74HC40103RM13TR M74HC40103TTR
Contextual Info: M74HC40103 8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTER • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 38MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:

74LVQ574

Abstract: 74LVQ574M 74LVQ574MTR 74LVQ574TTR
Contextual Info: 74LVQ574 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 180 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.5V (TYP.) at VCC = 3.3V

M74HC393RM13TR

Abstract: M74HC393 M74HC393B1R M74HC393M1R M74HC393TTR TSSOP14 M74HC393 equivalent
Contextual Info: M74HC393 DUAL BINARY COUNTER • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 79 MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)