FIPD485505 Search Results

D485505

Abstract: PD485505G-25
Contextual Info: DATA SHEET M O S INTEGRATED CIRCUIT /¿P D 4 8 5 5 0 5 LINE BUFFER 5K-WORD BY 8-BIT Description The fiPD485505 is a 5 048 words by 8 bits high speed FIFO First In First Out line buffer. Its CMOS static circuitry provides high speed access and low power consumption.

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Contextual Info: AUG l i 1992 SEC NEC Electronics Inc. fiPD485505 Line Buffer for Communications Systems Preliminary Information August 1992 Description Pin Configurations The /UPD485505 is a 5048-word by 8-bit dual-port line buffer fabricated with a silicon-gate CMOS process.

Contextual Info: JIPD485505 Line Buffer for Communications Systems \0 NEC Electronics Inc. Description Pin Configurations The ¿/PD485505 is a 5048-word by 8-bit dual-port line bu ffe r fa b rica te d w ith a silicon-gate CMOS process. The device is capable o f asynchronous read and w rite

D485505

Abstract: ax253
Contextual Info: m b427S2S 0035734 EMfl JJPD485505 Line Buffer for Communications Systems INECE NEC Electronics Inc. Preliminary Information_ A ugust 1992 N E C ELECTRONICS INC Description Pin Configurations The ¿/PD485505 is a 5048-word by 8-bit d ual-port line buffer fab ric a te d with a silicon-gate CM O S process.

Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT _ / / P D 4 8 5 5 0 5 LINE BUFFER 5K-WORD BY 8-BIT Description The iiPD485505 is a 5,048 words by 8 bits high speed FIFO First In First Out line buffer. Its CMOS static circuitry provides high speed access and low power consumption.