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    F1013 Search Results

    F1013 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    UPD78F1013GC(S)-UEU-AX Renesas Electronics Corporation 16-bit Low-power Microcontrollers for General Purpose Applications (Non Promotion) Visit Renesas Electronics Corporation
    UPD78F1013GC(R)-UEU-AX Renesas Electronics Corporation 16-bit Low-power Microcontrollers for General Purpose Applications (Non Promotion) Visit Renesas Electronics Corporation
    UPD78F1013GC-UEU-AX Renesas Electronics Corporation 16-bit Low-power Microcontrollers for General Purpose Applications (Non Promotion) Visit Renesas Electronics Corporation
    UPD78F1013F1-BAK-A Renesas Electronics Corporation 16-bit Low-power Microcontrollers for General Purpose Applications (Non Promotion) Visit Renesas Electronics Corporation
    UPD78F1013GF(R)-GAS-AX Renesas Electronics Corporation 16-bit Low-power Microcontrollers for General Purpose Applications (Non Promotion) Visit Renesas Electronics Corporation
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    F1013 Price and Stock

    Kyocera AVX Components REF1013221M050K

    CAP ALUM 220UF 20% 50V RADIAL TH
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    DigiKey REF1013221M050K Cut Tape 4,286 1
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    REF1013221M050K Ammo Pack 4,200 600
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    Mouser Electronics REF1013221M050K 302
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    Kyocera AVX Components REF1013330M120K

    CAP ALUM 33UF 20% 120V RADIAL TH
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    Mouser Electronics REF1013330M120K 1,200
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    TME REF1013330M120K 600
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    Kyocera AVX Components REF1013820M063K

    CAP ALUM 82UF 20% 63V RADIAL TH
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    Mouser Electronics REF1013820M063K 1,179
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    TME REF1013820M063K 600
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    Kyocera AVX Components REF1013151M063K

    CAP ALUM 150UF 20% 63V RADIAL TH
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    DigiKey REF1013151M063K Cut Tape 600 1
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    REF1013151M063K Ammo Pack 600 600
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    Mouser Electronics REF1013151M063K 1,166
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    Kyocera AVX Components REF1013470M100K

    CAP ALUM 47UF 20% 100V RADIAL TH
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    DigiKey REF1013470M100K Cut Tape 593 1
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    Mouser Electronics REF1013470M100K 527
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    F1013 Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    F10130 Fairchild Semiconductor Dual D Latch Original PDF
    F10131 Fairchild Semiconductor High Speed Dual D Flip-Flop Original PDF
    F10132 Fairchild Semiconductor Dual Multiplexer / Latch Original PDF
    F10133 Fairchild Semiconductor Quad Latch Original PDF
    F10134 Fairchild Semiconductor Dual Multiplexer Latch Original PDF
    F10135 Fairchild Semiconductor F10K Voltage Compensated ECL Original PDF
    F10136 Fairchild Semiconductor 4 Stage UP/Down Counters Original PDF
    F10137 Fairchild Semiconductor 4 Stage UP/Down Counters Original PDF

    F1013 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: EDD H br D15D20 TITLE F E D C B A REV 11/10/11 1/14/08 1/14/08 10/30/07 10/09/07 2/28/07 02/17/04 DATE SP MCS MCS MCS MCS AWM ALM BY REVISION 11-1238 08/F0015 NO CHANGE 07-F1088 07-F1013 07-F0187 07-F0187 EN NUMBER INC. INC. 8851 SW OLD KANSAS AVE STUART, FL 34997


    Original
    PDF D15D20 08/F0015 07-F1088 07-F1013 07-F0187

    maxim max8770

    Abstract: wpc8763ldg varistor k11 k17 SM 630 finger print module PCI7412 040 U3D 78L12 WPC8763L BCM5787MKMLG 1D05V
    Text: A B C D Biwa Block Diagram Project code: 91.4H001.001 PCB P/N : 55.4H001.XXX REVISION : 06237-3 GCE, Hannstar Mobile CPU CLK GEN. 4 Merom 479 2G/2.33G ICS 9LPR502 (RTM875T-605) 3 2.0G : B0, QLYV 2.2G : B0, QLFS E 4 -3-0313 G792 20 PCB STACKUP 4, 5 TOP CPU DC/DC


    Original
    PDF 4H001 9LPR502 RTM875T-605) 800MHz MAX8770 533/667MHz ISL6236 SPRING-23-GP maxim max8770 wpc8763ldg varistor k11 k17 SM 630 finger print module PCI7412 040 U3D 78L12 WPC8763L BCM5787MKMLG 1D05V

    F10132

    Abstract: F10532
    Text: F10132F10532 DUAL MULTIPLEXER/LATCH h QnnaratoT h F1° 132 and F10532 are dual m ultiplexers w ith D type latches !? S° lect and Reset i nP“ ts. Each latch may be enabled “ LOGIC SYMBOL In a b « f p 'u n n i fl*K ^ 0n Enable <Ec) in ,he LOW sta,e or bV using the


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    PDF F10132 F10532 F10132 F10532

    F10135

    Abstract: F10535 fairchild ECL
    Text: F10135~* F 1 0 5 3 5 ^ F10K VOLTAGE COMPENSATED ECL DUAL JK FLIP-FLOP DESCRIPTION - The F10135 and F10535 are Dual Master/Slave DC Coupled Flip­ Flop. Asynchronous Clear Direct CD and Set Direct (SD) are provided and override the clock. The output states of each flip-flop change on the LOW to HIGH transition of


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    PDF F10135 F10535 F10135 F10535 fairchild ECL

    WR112 5W Load

    Abstract: No abstract text available
    Text: P B tiG E C p l e s s e y DS3536-1.1 F1013-49 & F1147/48 LOW POWER WAVEGUIDE CIRCULATORS * FREQUENCY COVERAGE 7.75 - 40.0GHz * CIRCULATORS AND ISO-CIRCULATORS AV A ILA B LE * 4-PORT VERSIONS IN R120 & R140 * COMPACT AND ROBUST CONSTRUCTION This data sheet describes a standard range of 3-port circulators and iso-circulators in R84, R100,


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    PDF DS3536-1 F1013-49 F1147/48 F1045I F1046\ F1015) 599/U BR320 F1015 WR112 5W Load

    bcd counter using j-k flip flop diagram

    Abstract: pn sequence generator using jk flip flop F10136 ECL Handbook
    Text: / / / F10136F10536 F10137F10537 V 4-STAGE UP/DOWN COUNTERS F10K VOLTAGE COMPENSATED ECL DESCRIPTION - The F10136/F10536 and F10137/FI 0537 are 4-stage synchronous counters capable of operating at typical count rates of 250 MHz. The circuits are designed


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    PDF F10136 F10536 F10137 F10537 F10136/F10536 F10137/FI F10136 modulo-16 F10137 bcd counter using j-k flip flop diagram pn sequence generator using jk flip flop ECL Handbook

    12J2

    Abstract: 1.2j2 F10535 F10135
    Text: F10135^ F10535 F10K VOLTAGE COMPENSATED ECL DUAL JK FLIP-FLOP DESCRIPTION - The F10135 and F10535 are Dual Master/Slave DC Coupled FlipFlop. Asynchronous Clear Direct CD and Set Direct (SD) are provided and override the clock. The output states of each flip-flop change on the LOW to HIGH transition of


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    PDF F10135^ F10535 F10135 F10535 12-----J2 F10135 12J2 1.2j2

    Untitled

    Abstract: No abstract text available
    Text: POLYFET R F DEVICES SbE D • 724100^ 0000052 fl ■ 7\39’09 POLYFET RF DEVICES F1013 PATENTED GOLD METALIZED SILICON RF POWER MOSFET General Description Silicon vertical DMOS designed specifically for RF applications. Immune to forward and reverse bias secondary breakdown.


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    PDF F1013

    Untitled

    Abstract: No abstract text available
    Text: F10135F10535 F10K VOLTAGE COMPENSATED ECL DUAL JK FLIP-FLOP DESCRIPTION - The F10135 and F10535 are Dual Master/Slave DC Coupled FlipFlop. Asynchronous Clear Direct CD and Set Direct (SD) are provided and override the clock. The output states of each flip-flop change on the LOW to HIGH transition of


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    PDF F10135 F10535 F10135 F10535

    si117

    Abstract: No abstract text available
    Text: F10136F10536 F10137F10537 4-STAGE UP/DOWN COUNTERS F10K VOLTAGE COMPENSATED ECL DESCRIPTION - The F10136/F10536 and F10137/F10537 are 4-stage synchronous counters capable of operating at typical count rates ot 250 MHz. The circuits are designed


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    PDF F10136 F10536 F10137 F10537 F10136/F10536 F10137/F10537 F10136 modulo-16 F10137 si117

    F10130

    Abstract: F10530
    Text: F10130F10530 DUAL D LATCH DESCRIPTION - The F10130/F10530 contains_a pair of D type latches with a Common Enable Ec input. Each latch has its own Enable (En), Set (S) and ResetJR) inputs. For each latch, the data present on the D input appears on the Q output when both En and Ec are LOW,


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    PDF F10130 F10530 F10130/F10530 F10130 F10530

    F10133

    Abstract: F10533
    Text: F10133F10533 QUAD LATCH DESCRIPTION — The F10133 and F10533 are high-speed low power Quad Latches consisting of four bistable latch circuits with D type inputs and gated outputs. Open em itters allow a large number of o utputs to be wired-OR together and latch


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    PDF F10133 F10533 F10133 F10533

    Untitled

    Abstract: No abstract text available
    Text: F 10134^» F10534^ DUAL MULTIPLEXER/LATCH DESCRIPTIO N — The F10134 and F10534 are Dual Multiplexers with D type latches. Each latch may be enabled separately by holding the Common Enable in the LOW state and using the Enable En inputs. If the Com mon Enable (Ec) is used to enable the latch,


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    PDF F10534^ F10134 F10534

    fairchild ECL

    Abstract: F10137 F10136 F10536 F10537 ECL Handbook 125-250MHz
    Text: F10136^ F10536 F10137F10537 V 4-STAGE UP/DOWN COUNTERS F10K VOLTAGE COMPENSATED ECL D ESCRIPTIO N - The F10136/F10536 and F10137/F10537 are 4-stage synchronous counters capable o f operating at typical count rates of 250 MHz. The circuits are designed


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    PDF F10136 F10536 F10137 F10537 F10136/F10536 F10137/F10537 F10136 modulo-16 F10137 fairchild ECL F10536 F10537 ECL Handbook 125-250MHz

    Untitled

    Abstract: No abstract text available
    Text: / l/ F10132F10532 DUAL MULTIPLEXER/LATCH DESCRIPTION — The F10132 and F10532 are dual multiplexers with D type latches and have common Data Select and Reset _[nputs. Each latch may be enabled separatejy by holding the Common Enable Ec In the LOW state or by using the


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    PDF F10132 F10532 F10132 F10532

    743 LEM

    Abstract: No abstract text available
    Text: F10131F10531 HIGH SPEED DUAL D FLIP-FLOP DESCRIPTION - The F10131/F10531 contains two master/slave D-type flip-flops. The internal clock is the O R of two dock inputs, one common to both flip-flops. The O B clock permits the use of one input as a clock pulse and the other as an active LO W enable. While the


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    PDF F10131 F10531 F10131/F10531 743 LEM

    Untitled

    Abstract: No abstract text available
    Text: F10133F10533 QUAD LATCH DESC RIPTIO N— The F10133 and F10533 are high-speed low power Quad Latches consisting of four bistable latch circuits with D type inputs and gated outputs. Open em itte rs a llow a large number of o u tpu ts to be wired-OR together and latch


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    PDF F10133 F10533 F10133 F10533

    Untitled

    Abstract: No abstract text available
    Text: F10133F10533 QUAD LATCH DESCRIPTION — The F10133 and F10533 are high-speed low power Quad Latches consisting of four bistable latch circuits with D type inputs and gated outputs. Open em itters a llow a large number of o utputs to be wired-OR together and latch


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    PDF F10133 F10533 F10133 F10533

    Untitled

    Abstract: No abstract text available
    Text: F10130* F10530 DUAL D LATCH DESCRIPTION - The F10130/F10530 contains_a pair of D type latches with a Common Enable Ec input. Each latch has its own Enable (En), S et (S) and ResetJR ) inputs. For each latch, the data present on the D input appears on the Q output when both En and Ec are LOW,


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    PDF F10130* F10530 F10130/F10530

    Untitled

    Abstract: No abstract text available
    Text: F10132F10532 DUAL MULTIPLEXER/LATCH DESCRIPTION — The F10132 and F10532 are dual multiplexers with D type latches and have common Data Select and Reset Jnputs. Each latch may be enabled separately by holding the Common Enable Ec in the LOW state or by using the


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    PDF F10132 F10532 F10132 F10532

    U214D

    Abstract: No abstract text available
    Text: F 1 0 1 3 1 ^ F 1 0 5 3 1 ^ HIGH SPEED DUAL D FLIP-FLOP DESCRIPTION - The F10131/F10531 contains two master/slave D-type flip-flops. The internal clock is the OR of two clock inputs, one common to both flip-flops. The OR clock permits the use of one input as a clock pulse and the other as an active LOW enable. While the


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    PDF F10131/F10531 F10131 F10531 U214D

    CPIE

    Abstract: F10131 F10531 fairchild ECL
    Text: F 10131^ F 10531 ^ HIGH SPEED DUAL D FLIP-FLOP DESCRIPTION - The F10131/F10531 contains two master/slave D-type flip-flops. The internal clock is the OR of two clock inputs, one common to both flip-flops. The OR clock permits the use of one input as a clock pulse and the other as an active LOW enable. While the


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    PDF F10531^ F10131/F10531 F10131 F10531 CPIE F10131 F10531 fairchild ECL

    Untitled

    Abstract: No abstract text available
    Text: F10134F10534 DUAL MULTIPLEXER/LATCH DESCRIPTION— The F10134 and F10534 are Dual Multiplexers with D type latches. Each latch may be enabled separately by holding the Common Enable in the LOW state and using the Enable En inputs. If the Common Enable(Ec) is used to enable the latch,


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    PDF F10134 F10534 F10134 F10534

    LT 741 S

    Abstract: No abstract text available
    Text: F10130F10530 DUAL D LATCH DESCRIPTION - The F10130/F10530 contains_a pair of D type latches with a Common Enable Ec input. Each latch has its own Enable (En), Set (S) and Reset^R) inputs. For each latch, the data present on the D input appears on the Q output when both En and Ec are LOW,


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    PDF F10130 F10530 F10130/F10530 LT 741 S