EXTAL Search Results

motorola 852

Abstract: EB257 DSA003655
Contextual Info: Order this document by EB257/D Motorola Semiconductor Engineering Bulletin EB257 Detecting Loss of Clock on Modular Microcontrollers By Sharon Darley Austin, Texas General Information On modular microcontrollers, when the MODCLK pin is held low at the release of RESET and an external clock signal is applied to the EXTAL

H8/337

Contextual Info: Vdd 1,6-8,29,47 12, 38, 56, 73 CLOCK H D 6 4 7 3 3 7 8 F O— H 8 / 3 3 7 EXTAL 7TT XTAL 2 3 r FCR19. 66M2G C L , - 1 0 p F 777 -CL, 1 0 p F 777

Contextual Info: £ÿj SGS-THOMSON EF6804P2 8 BIT MICROCOMPUTER May 1989 - ’ ’" " W CB132 P Plastic Package CB520 FN (PLCC28) PIN CO NNECTIONS v ss C 1 • '- ^ 28 RËSfcï IRQ Ç ? 11 PA/ 3 26 PA6 C4 25 PAS vcc EXTAl i; 5 24 PA4 MDS t 6 23 PA3 X TAL I 7 22 »A7 PCO ( B

CCR18

Abstract: HD6412390F
Contextual Info: Vdd HD6412390F EXTAL 86 1 XTAL 85 CCR18.0MXC7 V1H/V1L 3 V2H/V2L CL1 CL2 2 *BUILT-IN LOADING CAPACITOR CL1/CL2=8/8pF +/-2pF Oscillating circuit for evaluation

FCR10

Abstract: HD6417144F50
Contextual Info: Vdd HD6417144F50 EXTAL 74 1 XTAL 72 FCR10.0MC5 V1H/V1L 3 V2H/V2L CL1 CL2 2 *BUILT-IN LOADING CAPACITOR CL1/CL2=20/20pF +/-20% Oscillating circuit for evaluation

MFI-D12

Contextual Info: 1.3 Pin Arrangement 2 1 3 4 5 HSPI_TX/ HSPI_CLK/ SIM_CLK/ SIM_D/ MD4/ MCCLK CMT_CTR1 CMT_CTR3 SCIF2_CLK SCIF2_TXD SCIF2_RXD SCIF2_CTS SCIF2_RTS SCIF0_CLK SCIF0_TXD CE2B MCDAT 6 HSPI_RX MCCMD A EXTAL XTAL VDD-CPG VDD-PLL1 SSI0_SCK/ HAC_SD_IN0/ BS2 B RESET VSS-CPG VDD-PLL2 VSS-PLL1

VSSP83

Abstract: PD71
Contextual Info: Pin Description 1.3.1 Pin Arrangement ) PLLVss PF6/ PF5/ PF4/ PF3/ PF2/ / PF1/ / PF0/ P65/TMO1/ P64/TMO0/ P63/TMCI1/ P62/TMCI0/ PD0/D8 PD1/D9 PD2 / D10 PD3 / D11 Vss PD4 / D12 PD5 / D13 PD6 / D14 PLLVcc PF7/φ Vss XTAL EXTAL Vcc FP-144G Top view) 72 71

pin diagram of mc68hc811e2

Abstract: STK 5333 s STK 5333 STK 3205 M68HC11 M68HC11E MC68HC11E0 MC68HC11E1 STK ss 1001 MC68HC11E20
Contextual Info: Reference Guide M68HC11ERG/AD Rev. 2, 10/2003 M68HC11E Series Programming Reference Guide Block Diagram XTAL EXTAL E IRQ OSC INTERRUPT LOGIC MODE CONTROL ROM OR EPROM SEE TABLE EEPROM (SEE TABLE) M68HC11 CPU RAM (SEE TABLE) STROBE AND HANDSHAKE PARALLEL I/O

DSP56321VF220 sch

Abstract: arco 404 DSP56321VF275 DSP56321VL275 DSP56321 DSP56321VF200 DSP56321VL200 DSP56321VL220 DSP56321VL240
Contextual Info: Freescale Semiconductor Technical Data DSP56321 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Address Generation Unit Six Channel DMA Unit DDB YDB XDB PDB GDB Internal Data Bus Switch EXTAL XTAL RESET PINIT/NMI

SRAM

Abstract: QFP 208 PACKAGE SCK 222
Contextual Info:
, ,    







,
, ,
,  Section 22 Pin Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 VDD-RTC 3.3V VSS-RTC EXTAL2 XTAL2 MD3/ A25 A24 A23 A22 A21 A20 A19 A18 MD7/TXD SCK2/ MD8/ TCLK XTAL VSS-CPG VDD-CPG(3.3V) VDD-PLL1(3.3V)

71P26

Abstract: tmci1
Contextual Info: XTAL VCC STBY NMI RES MD2 WDTOVF FWE* P23/TIOCD3/TMCI0 MD1 MD0 P22/TIOCC3/TMRI0 P21/TIOCB3 P20/TIOCA3 PA3/A19 PA2/A18 PA1/A17 64 63 62 61 60 59 58 57 56 55 54 53 52 51 PF7/ø 69 65 PF6/AS 70 66 PF5/RD 71 VSS PF4/HWR 72 EXTAL PF3/LWR/IRQ3 73 67 PF2/WAIT/IRQ2/BREQO

Contextual Info: 1.3 Pin Description 1.3.1 Pin Arrangement 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 P51 /RxD2 P50 /TxD2 PF0 / BREQ PF1 / BACK PF2 / WAIT PF3 / LWR PF4 / HWR PF5 / RD PF6 / AS VCC PF7 / ø VSS EXTAL XTAL VCC STBY

SH7709A

Abstract: MCS B21
Contextual Info: Pin Description 1.3.1 Pin Assignment 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 EXTAL XTAL

p8254-2

Contextual Info: 1.3 Pin Description 1.3.1 Pin Arrangement MD2 MD1 MD0 P66 /LWR P65 /HWR P64 /RD P63 /AS VCC XTAL EXTAL VSS NMI RES STBY ø P62 /BACK P61 /BREQ P60 /WAIT VSS P53 /A 19 P52 /A 18 P51 /A 17 P50 /A 16 P27 /A 15 P26 /A 14 75 74 73 72 71 70 69 68 67 66 65 64 63

Contextual Info: 1.3 Pin Description 1.3.1 Pin Arrangement P52 /A 18 P51 /A 17 P50 /A 16 P27 /A 15 P26 /A 14 54 53 52 51 STBY 62 P53 /A 19 RES 63 55 NMI 64 VSS VSS 65 56 EXTAL 66 P60 /WAIT XTAL 67 57 VCC 68 P61 /BREQ P63 /AS 69 58 P64 /RD 70 59 P65 /HWR 71 P67/φ P66 /LWR

Contextual Info: WDTOVF FWE, EMLE * P23/TIOCD3/TMCI0 MD1 MD0 P22/TIOCC3/TMRI0 P21/TIOCB3 P20/TIOCA3 PA3/A19 PA2/A18 PA1/A17 59 58 57 56 55 54 53 52 51 MD2 60 RES 61 66 NMI XTAL 67 62 EXTAL 68 63 VSS 69 VCC PF7/ø 70 STBY PF6/AS 71 64 PF5/RD 72 65 PF3/LWR/IRQ3 PF4/HWR 73 PF1/BACK/IRQ1/CS5

Contextual Info: 1.3 Pin Description 1.3.1 Pin Arrangement WDTOVF P53 MD1 MD0 P52/SCK2 P51/RxD2 P50/TxD2 59 58 57 56 55 54 PA1/A17 MD2 60 51 RES 61 PA3/A19 NMI 62 PA2/A18 STBY 63 52 VCC 64 53 XTAL PF7/ø 69 65 PF6/AS 70 66 PF5/RD 71 VSS PF4/HWR 72 EXTAL PF3/LWR/IRQ3 73 67

Contextual Info: 1.2 Block Diagram VCC VCC VSS VSS VSS P37/D7 P36/D6 P35/D5 P34/D4 P33/D3 P32/D2 P31/D1 P30/D0 Figure 1-1 shows an internal block diagram of the H8/3039 Series. Port 3 Address bus Data bus upper MD2 MD1 MD0 EXTAL XTAL ø STBY RES RESO/FWE* NMI Port 5 Port 2

74LV1G126

Abstract: 7614-6002BL 74LV1G08A TH92 KHS22E TH103 MJ-179P 74LV1G TH105 TH115
Contextual Info: 5 4 <2,5> CPU_A[23:0] NMI WDTOVFn_TDO STBYn RESn EMLE MD3 MD2 MD1 MD0 NMI WDTOVFn_TDO STBYn RESn EMLE <4,5> PA7_BPHI <2,5> PB7_SDRAMPHI 98 97 EXTAL XTAL 90 89 OSC1 OSC2 142 5 MD_CLK VBUS USDUSD+ PA7_BPHI PB7_SDRAMPHI PM4 <2,5> PM3 <5> PM2 <3,5> PM1_RxD6 <3,5>

stk 1039

Abstract: STK 5333 MC68HC11E2 pin diagram of mc68hc811e2 ROTA E Series M68HC11 M68HC11E MC68HC11E0 MC68HC11E1 ADRX
Contextual Info: Freescale Semiconductor, Inc. Reference Guide M68HC11ERG/AD Rev. 2, 10/2003 Block Diagram XTAL EXTAL E IRQ OSC INTERRUPT LOGIC MODE CONTROL ROM OR EPROM SEE TABLE EEPROM (SEE TABLE) M68HC11 CPU RAM (SEE TABLE) STROBE AND HANDSHAKE PARALLEL I/O SERIAL COMMUNICATION

Contextual Info: 7-41,48-53,55 56,59-78,85,86 57,58,87,89 VdcL CXP88548 EXTAL 43 XTAL 42 o - FCR16.0M2G V2H/V2L CL1 10pF CL2 - I - 10pF

A31G1

Abstract: MPC850
Contextual Info: MPC850 PBGA PIN ASSIGNMENT C 1998 Motorola PIN NAME PIN NAME A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 VSSSYN VSSSYN1 KAPWR XTAL EXTAL EXTCLK VDDL IP_B0/IWP0/VFLS0 IP_B3/IWP2/VF2 FRZ/IRQ6 BB TA BDIP/GPL_B5 CS1 CS3 NC B1 B2 B3 B4 B5 B6 B7 B8

Triac ZO 405 DF

Contextual Info: HD6305X0, HD63A05X0, HD63B05X0 • BLO C K DIAGRAM XTAl EXTAl AES NUM ÍÑT STBV Unit Symbol Value Supply voltage VCC -0.3- +7.0 V Input voltage Vin -0.3-Vc c +0.3 V Item Operating temperature Topr 0 - +70 °C Storage temperature ^sia -55- +150 °C NOTE These products have a protection circuit in their input terminals against higti electrostatic voltage or high electric fields. Notwith­

F-ZTAT

Contextual Info: PD11/D11/AUDATA3*4 PD10/D10/AUDATA2*4 PD9/D9/AUDATA1*4 PD8/D8/AUDATA0*4 Vss PD7/D7 PD6/D6 PD5/D5 Vcc PD4/D4 PD3/D3 PD2/D2 PD1/D1 PD0/D0 Vss XTAL MD3 EXTAL MD2 Vcc FWP*1 NMI MD1 MD0 PLLVcc PLLCAP PLLVss PA15/CK Pin Arrangement RES 1.3 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57