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1030J6C

Abstract: C1030B TDC1030B6C 1030J6A
Contextual Info: m m m T D C 1 0 3 0 M First-In First-Out Memory 64 Words by 9 Bits Cascadable T he T R W T D C 1 0 3 0 is an expandable, First-In First-Out FIFO m em ory organized as 64 w o rd s by 9 bits. A 1 5 M H z data rate m akes it ideal in high-speed ap p li­ cations. Bu rst data rates of 18MFHz can be obtained in

Binary Multipliers

Abstract: TTL 7428 SN54285/74285
Contextual Info: SN54284, SN54285, SN74284, SN74285 BIT BY 4-BIT PARALLEL BINARY MULTIPLIERS MAY 1972 - REVISED MARCH 1988 • Fast Multiplication of Two Binary Numbers 8-Bit Product in 40 ns Typical • Expandable for N-Bit-by-n-Bit Applications: 16-Bit Product in 70 ns Typical

MIL-I-631

Abstract: AMS-DTL-23053 D570 D638
Contextual Info: Alpha Wire | 711 Lidgerwood Avenue, Elizabeth, NJ 07207 Tel: 1-800-52 ALPHA 25742 , Web: www.alphawire.com Customer Specification PART NO. GRP110NF1/8 Construction 1) Tubing Type Expandable Sleeving 2) Tubing Material Braided Polyethelene Terephthalate 3) Minimum Supplied ID(In)

PC13

Abstract: S3P72B9 SAM47 C72B
Contextual Info: S3C72B5/C72B7/C72B9/P72B9 1 PRODUCT OVERVIEW PRODUCT OVERVIEW OVERVIEW The S3C72B5/C72B7/C72B9 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 Samsung Arrangeable Microcontrollers . With an up-to-1280-dot LCD direct drive capability, segment expandable circuit, 8-bit and 16-bit timer/counter,

MVME5110

Abstract: MVME51105E-2263 MVME5100 MVME51105E-2161 MVME51105E-2163 MVME5107-2163 MVME51105E-2261 IPMC7616E-002 MVME51005E-0161 SCANBE ejector
Contextual Info: D ATA S H E E T MPC7410, MPC750 or MPC755 microprocessor with 32KB/32KB L1 cache Up to 2MB of secondary backside cache 100 MHz frontside bus Up to 512MB of on-board ECC SDRAM – expandable up to 1GB with optional RAM500 memory expansion modules 17MB flash memory

8085 pin diagram

Contextual Info: J> SöböMSb m n ilII I W MATRA m GQGGTTS bll Novem ber 1990 M H S M8259 DATA SHEET_ PROGRAMMABLE INTERRUPT CONTROLLER FEATURES . 8085,8086,8088 COMPATIBLE . EIGHT-LEVEL PRIORITY CONTROLLER . EXPANDABLE TO 64 LEVELS . PROGRAMMABLE INTERRUPT MODES FULLY

FCT521

Abstract: 54FCT521
Contextual Info: 54FCT521 8-Bit Identity Comparator General Description Features The ’FCT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.

F 9324

Abstract: DM9324 9324DMQB 9324FMQB C1995 DM9324N J16A N16E W16A 9792
Contextual Info: 9324 DM9324 5-Bit Comparator General Description The 9324 expandable comparators provide comparison between two 5-bit words and give three outputs ‘‘less than’’ ‘‘greater than’’ and ‘‘equal to’’ A HIGH on the active LOW Enable Input forces all three outputs LOW

CY7C028-15AI

Abstract: WH15 CY7C027 CY7C028 CY7C037 CY7C038 IDT7027
Contextual Info: CY7C027/028 CY7C037/038 PRELIMINARY 32K/64K x 16/18 Dual-Port Static RAM Fully asynchronous operation Automatic power-down Expandable data bus to 32/36 bits or more using Mas­ ter/Slave chip select when using more than one device On-chip arbitration logic

8086 interrupt structure

Abstract: 8080a 8086 microcomputer LR2 D 80286 address decoder 80286 microprocessor pin out diagram 8086 interrupt vector table 8086 interrupts application 8086 logic diagram 8086 timing diagram
Contextual Info: 82C59A 82C 59A CMOS Programmable Interrupt Controller ¡APX86 Family DISTINCTIVE CHARACTERISTICS • • • • • • • Pin C om patible with NMOS 8259A Expandable to 64 Levels Eight Level Priority Controller Individual Request Mask Capability Programmable Interrupt Modes

FX403Q

Abstract: FX003 FX403 FX403-Q FX503 wn transistor
Contextual Info: FX403-Q QTC ADDRESS &DATA ENCODER DECODER * N-DIGI T HSC ADDRESS DECODING DECODES SUFFIX INSTRUCTION CODES * GROUP AND ALL-CALL DECODING CODED BLEEP AND AUDIO MUTE OUTPUTS * EXPANDABLE CODE-ROM ADDRESSING ENCODES N - D IGIT ADDRESS /DATA CODES * L O W POWER CMOS PROCESS

F10166

Abstract: F10566
Contextual Info: F10166^ F10566 5-BIT COMPARATOR F10K VOLTAGE COMPENSATED ECL DESCRIPTION - The F10166/F10566 are high-speed expandable 5-Bit Comparators for comparing the magnitude of two binary words. Two outputs are provided: A>B and A<B. A = B can be obtained by NORing the two outputs with an additional gate. A HIGH level on the

Contextual Info: 67C4502-35/50/65/80 a Deep First-in First-out FIFO 1024x9 C M O S Memory o> O .u cn DISTINCTIVE CHARACTERISTICS M Retransmit capability Expandable in both width an djtepth Increased noise immunity for XI • CMOS threshold Functional and pin compatible with industry

MC14556

Abstract: CD4556B Types CD4556BH 15-V CD4555B CD4556B MC14555 CD45B5B RCA-CD4555B CD4556BE
Contextual Info: CD4555B, CD4556B Types CMOS Dual Binary to 1 of 4 D ecoder/D em ultiplexers High-Voltage Types 20-V olt Rating CD4555B: Outputs High on Select CD4556B: Outputs Low on Select Features: • Expandable with multiple packages ■ Standard, symmetrical output characteristics

74ACT461

Abstract: PAL20X8 8bit synchronous counter
Contextual Info: Zero Power CMOS Hard Array Logic ZHAL"24A Series ZHAL24A Evaluation #4 Features/Benefits Logic Symbol • Demonstration pattern tor Z H A L24A Series ZHAL20X8A • 8-blt counter • Three-state output ZHAL20X8A • Expandable in 8-blt increments • Equivalent to 74ACT461

Z80 FIO

Abstract: Z8038
Contextual Info: Z8038 FIO; Z8038(F!0 128 Byte FIFO I/O Port DISTINCTIVE CHARACTERISTICS Asynchronous FIFO Interface — 128-byte FIFO provides bidirectional CPU to CPU or peripheral interface. Expandable In Length and Width — FlOs can be connected in parallel for wider words,

Contextual Info: r h o le x FEATURES • The expandable elastomer diaphragm has NEMA 4X sealing and adapts to a wide range of cable diameters ■ The Stainless Steel strain relief spring has an extraordi­ nary strain relief without the use of tools or hardware Spirit cable back shells achieve extraordinary sealing and

am2764

Contextual Info: 6086ZUIV/9086ZUJV Am29806/Am29809 6-Bit Chip Select Decoder 9-Bit Equal-to-Comparator DISTINCTIVE CHARACTERISTICS • • High-speed, expandable, 9-bit "equal-to" comparator Am29809 High-speed comparator with chip select decoder (Am29806) Multibus compatible, open-collector acknowledge

HR04

Abstract: 67C4033
Contextual Info: 67C 4033 First-In First-Out FIFO 64x5 Memory 1 0 /1 5 MHz (Cascadable) CMOS Features • Zero standby power Orderinfg Inform ation PART NUMBER PKG TEMP DESCRIPTION • TTL-compatible Inputs and outputs 67C4033-10 N,J,NL Com 10 MHz in/out • Readily expandable In word width and depth

Contextual Info: 67C4503-35/50/65/80 Deep First-in First-out FIFO 2048x9 C M O S Memory DISTINCTIVE CHARACTERISTICS Retransmit capability Expandable in both width an djlepth Increased noise immunity for XI-CMOS threshold RAM based FIFO 2048x9 organization Cycle tim es of 45/65/80/100 nanoseconds

Contextual Info: m o le x * 12.30mm .484" Pitch COMPODRE Wire-to-Wire, Wire-to-Board Pod, Plug and Receptacle Features and Benefits Electrical • Fully customizable and expandable to meet your application needs ■ One connector system to meet both your power and signal needs

74s482

Abstract: 74S48 54S482
Contextual Info: TYPES SN54S482, SN74S482 4-BIT-SLICE EXPANDABLE CONTROL ELEMENTS D 211 2, M A R C H 1976 - R E V I S E D O C T O B E R 1980 • 4-Bit Slice is Cascadable to N-Bits SN 54S482 . . . J P A C K A G E SN 74S482 . . . J O R N P A C K A G E TO P V IE W • Designed Specifically for Microcontroller/

Contextual Info: 32K/64K X 9 CMOS PARALLEL IN-OUT FIFO MODULE FEATURES: First-In/First-Out memory module 64K x 9 IDT7M208 or 32K x 9 (IDT7M207) High speed: 20ns (max.) access time Asynchronous and sim ultaneous read and write Fully expandable: depth and/or width MASTER/SLAVE multiprocessing applications

Contextual Info: i" &;< CMOS PARALLEL SyncFIFO CLOCKED FIFO 5 1 2 X 18-BIT & 1024 X 18-BIT FEATURES • • • • • 512 x 18-bit and 1024 x 18-bit memory array structures 20ns read / write cycle time Easily expandable in width Read and write clocks can be independent or coincident