EQUIVALENT FOR 74LS13 Search Results

neural network

Abstract: application of feed back amplifier block diagram of 74LS138 3 to 8 decoder block diagram for neural network connection diagram of ic 74ls138 74LS138 decoder neural network chips
Contextual Info: > NEURAL NETWORK ANALOG CMOS CIRCUITS DENDROST“-1 FEED-FORWARD/FEED-BACK CONNECTION CIRCUIT ARRAY Features: • Performs the equivalent of 4.3 MFLOPS using analog computation • Designed for competitive-type, non-supervised, multi-layer networks • Incorporates sleep-refreshed memory retention mechanism

Contextual Info: January 1988 MM54HCT138/MM74HCT138 3-to-8 Line Decoder General Description the 54LS138/74LS138. All inputs are protected from dam­ age due to static discharge by diodes to Vcc and ground. MM54HCT/MM74HCT devices are intended to interface be­ tween TTL and NMOS components and standard CMOS

block diagram of 74LS138 3 to 8 decoder

Abstract: 74LS138 3 to 8 decoder notes block diagram of 74LS138 1 line to 16 line MM74HCT138N mm54hct138/mm74hct138 54LS138 74HCT 74LS138 C1995 MM54HCT138
Contextual Info: MM54HCT138 MM74HCT138 3-to-8 Line Decoder General Description the 54LS138 74LS138 All inputs are protected from damage due to static discharge by diodes to VCC and ground MM54HCT MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS

Contextual Info: s e m i c o n d u c t o r Revised February 1999 MM74HCT138 3-to-8 Line Decoder the 74LS138. All inputs are protected from damage due to static discharge by diodes to Vc c and ground. General Description The MM74HCT138 decoder utilizes advanced silicon-gate

74LS139

Abstract: M16A M16D MM74HC139 MM74HC139M MM74HC139MTC MM74HC139SJ MTC16 diode D254
Contextual Info: Revised February 1999 E M IC O N D U C T O R T M MM74HC139 Dual 2-To-4 Line Decoder General Description equivalent to the 74LS139. All inputs are protected from dam age due to static discharge by diodes to V qq and T he M M 74H C 139 d ecoder utilizes advanced silicon-gate

74HCT138N

Contextual Info: A I R C H I L D Revised February 1999 S E M I C D N D U C T D R tm MM74HCT138 3-to-8 Line Decoder General Description the 74LS138. All inputs are protected from dam age due to static discharge by diodes to V c c and ground. The M M 74H C T138 deco d e r utilizes advanced silicon-gate

Contextual Info: LS TTL DN74LS Series DN74LS132 DN74LS132 Km ^ Quad 2 - input P ositive NAND Schm itt-T riggers • Description P-1 DN 74LS132 contains four 2-input positive-logic NAND gate circuits w ith S chm itt triggers. ■ Features • • Ideal for waveform shaping

DN74LS132

Contextual Info: DN74LS132 LS TTL DN74LS Series DN74LS132 Quad 2 - input P o sitiv e NAND S ch m itt-T rig g ers P-1 • Description DN 74LS132 contains four 2-input positive-logic NAND gate circuits w ith Schm itt triggers. ■ Features • • • • • Ideal for waveform shaping

Contextual Info: A I R EM I C O C H S eptem ber 1983 I L D N D U G Revised February 1999 T O R TM MM74HC139 Dual 2-To-4 Line Decoder equivalent to the 74LS139. All inputs are protected from dam age due to static discharge by diodes to V qq and General Description The M M 74H C 139 deco d e r utilizes advanced silicon-gate

pin diagram of ic 74ls139

Abstract: LS 74LS139 74LS139 74ls139 decoder 74ls139 decoder pin configuration decoders 3*8
Contextual Info: 7 4 LS1 3 9 , S139 Decoders/Demultiplexers S ig n e t ic s Dual 1-of-4 Decoder/Demultiplexer Product Specification Logic Products FEATURES TYPICAL PROPAGATION DELAY ENABLE AT 2 LOGIC LEVELS TYPICAL SUPPLY CURRENT (TOTAL) 74LS139 19ns 6.8mA 74S139 6ns 60mA

LOGIC OF 74LS138

Abstract: 74LS138 3 to 8 decoder notes 74LS138 pin configuration 74LS138 pin for 74LS138 74LS138 3 to 8 decoder Pin 74LS138 3 to pin configuration
Contextual Info: Signetics 74LS138, S138 Decoders/Demultiplexers 1-Of-8 Decoder/Demultiplexer Product Specification Logic Products FEATURES • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Direct replacement for Intel 3205 TYPICAL PROPAGATION

74LS139

Abstract: S139
Contextual Info: 74LS139, S139 Signetìcs Decoders/Demultiplexers Dual 1-of-4 D e c o d e r/D e m u ltip le x er Product Specification Logic Products FEA TUR ES • Demultiplexing capability • Two independent 1-of-4 decoders • Multifunction capability • Replaces 9321 and 93L21 for

pin diagram of ic 74ls138

Abstract: 74LS138 pin configuration ic 74ls138 74LS138 pin diagram 74ls138 function 74LS138 LOGIC OF 74LS138 74LS138 3 to 8 decoder Pin pin for 74LS138 74ls138 3-8
Contextual Info: 74LS138, S138 Signetics Decoders/Demultiplexers 1-Of-8 Decoder/Demultiplexer Product Specification Logic Products FEATURES • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Direct replacement for Intel 3205 74LS138

pin diagram of ic 74ls139

Abstract: 74LS139 74LS
Contextual Info: Signetics 74LS139, S139 Decoders/Demultiplexers Dual 1-of-4 Decoder/Demultiplexer Product Specification Logic Products FEATURES • Demultiplexing capability • Two independent 1-of-4 decoders • Multifunction capability • Replaces 9321 and 93L21 for higher performance

LOGIC OF 74LS138

Abstract: pin for 74LS138 74LS138 3 to 8 decoder notes 74LS138 74LS138 pins 74l5138 of 74LS138 3 to 8 decoder 74ls138 function TTL 74ls138 74LS138 3 to 8 decoder Pin
Contextual Info: 74LS138, S138 Signetics Decoders/Dem ultiplexers 1-Of-8 D e co d e r/D e m u ltip le xe r Product Specification L o g ic P rod ucts FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory chip select decoding

74LS139

Abstract: 74l513 demultiplexer 74ls 74ls signetics pin diagram of 74LS 74LS 74S139 93L21 N74LS139D N74LS139N
Contextual Info: 74LS139, S139 Signetics Decoders/Demultiplexers Dual 1-of-4 D e c o d e r/D e m u ltip le x e r Product Specification Logic Products FEATURES • Demultiplexing capability • Two independent 1-of-4 decoders • Multifunction capability • Replaces 9321 and 93L21 for

Ic 74hc138 logic diagram

Contextual Info: Revised February 1999 S E M IC Q N D U C T O R T M MM74HC138 3-to-8 Line Decoder The decoder’s outputs can drive 10 low power Schottky TTL equivalent loads, and are functionally and pin equiva­ lent to the 74LS138. All inputs are protected from damage due to static discharge by diodes to V qq and ground.

74HCT138

Abstract: 74HCT138 DIP 20 PIN LEADLESS CHIP CARRIER EQUIVALENT 74HCT138 IDT74HCT138 54HCT138
Contextual Info: h ig h s p e e d CMOS 1-OF-8 DECODER IDT54/74HCT138 IDT72T33&J FEATURES • • • • • • • • • High speed, comparable to bipolar: 11ns typ. CMOS low power levels: 50 typ. Inputs and outputs directly TTL-compatible Standard 54/74LS138 pinouts Proprietary option 72T338 allows larger memory array

74HC139M

Abstract: 74hc139n
Contextual Info: A s e m I R C i c o n H d u S eptem ber 1983 I L D Revised February 1999 c t o r MM74HC139 Dual 2-To-4 Line Decoder equivalent to the 74LS139. All inputs are protected from dam age due to static discharge by diodes to V qq and General Description The M M 74H C 139 deco d e r utilizes advanced silicon-gate

toshiba tc110g

Abstract: 74LS82 74ls150 74LS514 toshiba tc140g 74ls150 pin configuration 74LS273 SC11C1 diode sr45 74LS194 internal circuit diagram
Contextual Info: SIEMENS AKTIEN6ESELLSCHAF 47E » • BS3SbOS 0037405 7 » S I E G General Description Our Sea-of-Gates concept is based on a highperformance CMOS technology, in either 1.5 micron or 1.0 micron transistor gate length. This is equivalent to 1.1 or 0.8 micron effective

74LS82

Abstract: 74245 BIDIRECTIONAL BUFFER IC ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 advantages for ic 7473 4 BIT COUNTER 74669 la 4508 ic schematic diagram XF107 74295 random number generator by using ic 4011 and 4017
Contextual Info: General Features The SCxD4 series of high performance CMOS gate arrays offers the user the ability to realise customised VLSI inte­ grated circuits featuring the speed performance previously obtainable only with bipolar technologies whilst retaining all the advantages of CMOS technology; low power consum p­

Contextual Info: 5QE D 44^503 G01341Q 5 HITACHI/ L0GIC/ARRAYS/MÉÎ1 0 H IT A C H I S e p t e m b e r , 1985 CMOS GATE ARRAYS i HD61 SERIES DESIGNER'S MANUAL AND PRODUCT SPECIFICATION HITACHI/ LOGIC/ARR'A YS/MEM SQE D • 4 4TLS03 0G13411 4 T -42-11-09 CMOS GATE ARRAYS HD61 SERIES

8088 motherboard schematics

Abstract: CI 74LS08 PC xt MOTHERBOARD ic dma 8237 8088 computer schematics 8088 IBM computer schematics 8088 FE2010 Faraday motherboard 8088 c8087 ic 8237 dma controler
Contextual Info: FARADAY 3486347 E L E C T R O N I C S INC A4 FARADAY ELECTRONICS 0 0 D 0 2 0 1 h *|~- Í>F 34flL,3M7 CORP 84D 00201 D T- » '33 -03 T -5 2 -3 3 -1 5 FE2010 PC BUS CPU & PERIPHERAL CONTROLLER IC * 100% Hardware & Software compatible to the IBM-PC * Keyboard Port

8088 motherboard schematics

Abstract: Faraday motherboard 8088 PC XT MOTHERBOARD IBM computer schematics 8088 intel 8284 clock generator computer schematics 8088 c8087 ic 8237 dma controler 8088 ram 256K ic dma 8237 8088
Contextual Info: FARADAY 3486347 ELECTRONICS FARADAY INC A4 ELECTRONICS 00D0201 Í>F 34flL,3M7 CORP 84D 00201 h *|~D T- » '33 -03 T -5 2 - 3 3 -1 5 FE2010 PC BUS CPU & PERIPHERAL CONTROLLER IC * 100% Hardware & Software compatible to the IBM-PC * Keyboard Port * 8284 Clock Generator