ECL TO TTL TRANSLATOR Search Results

CY101E383

Abstract: E383 R2170 ecl 84
Contextual Info: E383 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Features • BiCMOS for optimum speed/power • High speed max. — 3.0 ns tPD TTL-to-ECL Functional Description The CY101E383 is a new-generation TTL-to-ECL and ECL-to-TTL logic level translator designed for high-perfor-

Contextual Info: MC10H604 MC100H604 MOTOROLA Product Preview REGISTERED HEX TTL TO ECL TRANSLATOR Registered Hex TTL/ECL Translator The MC1 OH/100H604 is a 6-bit, registered, dual supply TTL to ECL translator. The de­ vice features differential ECL outputs as well as a choice between either a differential ECL

H604

Abstract: MC100H604 MC100H604FN MC10H604 MC10H604FN
Contextual Info: MC10H604, MC100H604 Registered Hex TTL to ECL Translator The MC10H/100H604 is a 6–bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL

PLCC-28

Abstract: H604 MC100H604 MC10H604 MC10H604FN
Contextual Info: MC10H604, MC100H604 Registered Hex TTL to ECL Translator Description The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock

H604

Abstract: MC100H604 MC100H604FN MC10H604 MC10H604FN
Contextual Info: MC10H604, MC100H604 Registered Hex TTL to ECL Translator The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock

H604

Abstract: MC100H604 MC10H604 MC10H604FN
Contextual Info: MC10H604, MC100H604 Registered Hex TTL to ECL Translator Description The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock

H604

Abstract: MC100H604 MC10H604 MC10H604FN
Contextual Info: MC10H604, MC100H604 Registered Hex TTL to ECL Translator Description The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock

Contextual Info: MC10H604, MC100H604 Registered Hex TTL to ECL Translator Description The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock

H604

Contextual Info: MC10H604, MC100H604 Registered Hex TTL to ECL Translator The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock

Contextual Info: SY10H600 SY100H600 FINAL 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs

Contextual Info: * 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 SEMICONDUCTOR FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs

H600

Abstract: SY100H600 SY10H600 SY10H600JC SY10H600JCTR MECL10KH
Contextual Info: 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE FEATURES SY10H600 SY100H600 DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ ECL and TTL enable inputs ■ Dual supply

Contextual Info: CY10E383 CY101E383 a CYPRESS ~ SEMICONDUCTOR ~ ECL/TTL/ECL Translator and High-Speed Bus Driver Features Functional D escription • BiCMOS for optimum speed/power • High speed max. — 2.5 ns tpD TTL-to-ECL — 3.5 ns tpD ECL-to-TTL • Low skew < ± 1 ns

XEL25

Abstract: code Z8
Contextual Info: DIFFERENTIAL ECL-to-TTL TRANSLATOR FEATURES • ■ ■ ■ ■ DESCRIPTION 2.6ns typical propagation delay Differential ECL inputs 24mA TTL outputs Flow-through pinouts Available in 8-pin SOIC package The SY100ELT25 is a differential ECL-to-TTL translator. Because ECL levels are used, a +5V, –5.2V

CY101E383

Abstract: E383 E1472
Contextual Info: fax id: 5000 i , *" : :V:V:V:V:V:g:-v- : : ^ :^ ; ^3»* i ; : M m : M : i : m : CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Features • BiCMOS for optimum speed/power • High speed max. — 3.0 ns tpQ TTL-to-ECL — 4 ns tpQ ECL-to-TTL

ELT25

Abstract: SY100ELT25 SY100ELT25ZC SY100ELT25ZCTR
Contextual Info: DIFFERENTIAL ECL-to-TTL TRANSLATOR FEATURES • ■ ■ ■ ■ SY100ELT25 FINAL DESCRIPTION 2.6ns typical propagation delay Differential ECL inputs 24mA TTL outputs Flow-through pinouts Available in 8-pin SOIC package The SY100ELT25 is a differential ECL-to-TTL

ELT25

Abstract: SY100ELT25 SY100ELT25ZC SY100ELT25ZCTR
Contextual Info: DIFFERENTIAL ECL-to-TTL TRANSLATOR FEATURES • ■ ■ ■ ■ SY100ELT25 DESCRIPTION 2.6ns typical propagation delay Differential ECL inputs 24mA TTL outputs Flow-through pinouts Available in 8-pin SOIC package The SY100ELT25 is a differential ECL-to-TTL

Contextual Info: 100324 100324 Low Power Hex TTL-to-ECL Translator Literature Number: SNOS128A 100324 Low Power Hex TTL-to-ECL Translator General Description Features The 100324 is a hex translator, designed to convert TTL logic levels to 100K ECL logic levels. The inputs are compatible

5D6 diode

Abstract: Power PQFP 64 10e383 Q809
Contextual Info: CY10E383 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Features Functional Description • BiCMOS for optimum speed/power • High speed max. — 2.5 ns tpj) TTL-to-ECL — 3.5 ns tpj) ECL-to-TTL • Low skew < ± 1 ns • Can operate on single +5V supply

Contextual Info: DP8480A DP8480A 10k ECL to TTL Level Translator with Latch Literature Number: SNOSBN8A DP8480A 10k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs

Contextual Info: DP8482A DP8482A 100k ECL to TTL Level Translator with Latch Literature Number: SNOSBO0A DP8482A 100k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs

Contextual Info: CY10E383 CY101E383 CYPRESS SEMICONDUCTOR ECL/TTL/ECL Translator and High-Speed Bus Driver Features Functional Description • BiCMOS for optimum speed/power • High speed max. — 2.5 ns tpu TTL-to-ECL — 3.5 ns tpu ECL-to-TTL • Low skew < ± 1 ns • Can operate on single +5V supply

ELT24

Abstract: SY100ELT24 SY100ELT24ZC SY100ELT24ZCTR
Contextual Info: TTL-to-DIFFERENTIAL ECL TRANSLATOR FEATURES • ■ ■ ■ ■ SY100ELT24 DESCRIPTION 500ps typical propagation delay Differential ECL output PNP TTL input for minimal loading Flow-through pinouts Available in 8-pin SOIC package The SY100ELT24 is a TTL-to-differential ECL

Contextual Info: MC10H605, MC100H605 Registered Hex ECL to TTL Translator Description The MC10/100H605 is a 6−bit, registered, dual supply ECL to TTL translator. The device features differential ECL inputs for both data and clock. The TTL outputs feature balanced 24 mA sink/source