ECL LOGIC Search Results

Contextual Info: TNETA1545 DUAL DIFFERENTIAL PSEUDO-ECL TO ECL TRANSLATORS AND DUAL DIFFERENTIAL ECL TO PSEUDO-ECL TRANSLATORS SDNS005B - SEPTEMBER 1993 - REVISED OCTOBER 1995 • Dual ECL to Pseudo-ECL and Pseudo-ECL to ECL Translators • Single 5-V Power Supply • Advanced BiCMOS Technology

TNETA1545

Contextual Info: TNETA1545 DUAL DIFFERENTIAL PSEUDO-ECL TO ECL TRANSLATORS AND DUAL DIFFERENTIAL ECL TO PSEUDO-ECL TRANSLATORS SDNS005B – SEPTEMBER 1993 – REVISED OCTOBER 1995 D D D D D DW PACKAGE TOP VIEW Dual ECL to Pseudo-ECL and Pseudo-ECL to ECL Translators Single 5-V Power Supply

CY101E383

Abstract: E383 R2170 ecl 84
Contextual Info: E383 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Features • BiCMOS for optimum speed/power • High speed max. — 3.0 ns tPD TTL-to-ECL Functional Description The CY101E383 is a new-generation TTL-to-ECL and ECL-to-TTL logic level translator designed for high-perfor-

b765

Abstract: PAL 008 PAL10016RD8 PAL1016RD8
Contextual Info: PRELIMINARY September 1986 ECL Registered and Latched Programmable Array Logic PAL Family General Description The registered and latched ECL PAL devices are the latest additions to National Semiconductor's ECL PAL family. The ECL PAL family utilizes National Semiconductor's advanced

SG86A

Abstract: SG53A sg72a LVEP17 MC100ELxxx EP809 LVEL40 SLVS TR30 AND8020
Contextual Info: AN1568/D Interfacing Between LVDS and ECL Prepared by: Paul Lee Logic Applications Engineer ON Semiconductor http://onsemi.com APPLICATION NOTE ECL levels Today’s applications typically use ECL devices in the PECL mode. PECL Positive ECL is nothing more than

CAN split termination

Abstract: SG86A SG53A AN1568
Contextual Info: AN1568/D Interfacing Between LVDS and ECL Prepared by: Paul Lee Logic Applications Engineer ON Semiconductor http://onsemi.com APPLICATION NOTE ECL levels Today’s applications typically use ECL devices in the PECL mode. PECL Positive ECL is nothing more than

Contextual Info: TIEPAL10016ET6C ECL-TO-TTLIMPACT-X" PAL TRANSLATOR CIRCUIT D3352, OCTOBER 1989 • ECL 100K Programmable Logic with ECL-to-TTL Translation JT PACKAGE TOP VIEW • ECL Control Inputs vcc[ '[ l[ l[ l[ l[ '[ '[ • 3-State TTL Outputs • IMPACT-X“ Process with Reliable

TL 2272 R

Abstract: PAL1016RM4AJC
Contextual Info: ECL PAL10/10016RM4A r% \ ÆM National Semiconductor PAL10/10016RM4A ECL Registered Programmable Array Logic General Description The PAL10/10016RM4A is a member of the National Semi­ conductor ECL PAL family. The ECL PAL Series-A is char­ acterized by 4 ns maximum propagation delays combinato­

PAL chip manufactures

Abstract: pal 002
Contextual Info: ECL PAL10/10016RM4A National dt!A Semiconductor PAL10/10016RM4A ECL Registered Programmable Array Logic General Description The PAL10/10016RM4A is a member of the National Semi­ conductor ECL PAL family. The ECL PAL Series-A is char­ acterized by 4 ns maximum propagation delays combinato­

Contextual Info: ECL PAL10/10016RM4A m National ÆM Semiconductor PAL10/10016RM4A ECL Registered Programmable Array Logic General Description The PAL10/10016RM4A is a member of the National Semi­ conductor ECL PAL family. The ECL PAL Series-A is char­ acterized by 4 ns maximum propagation delays combinato­

Contextual Info: SPST ECL Switches With Drivers 2662 Series V2.00 Features ● ● ● Broadband Frequency Ranges Environmentally Sealed ECL Compatible Description M/A-COM’s Emitter Coupled Logic ECL PIN diode switches offer multi-octave bands from UHF to Ku-band. Advantages of an ECL switch are narrow pulse width

Contextual Info: TIEPAL10H16ET6C ECL-TO-TTLIMPACT-X PAL TRANSLATOR CIRCUIT D3283, OCTOBER 1989 JT P A C K A G E • ECL10KH Programmable Logic with ECL-to-TTL Translation ECL Control Inputs

Contextual Info: MC10H604 MC100H604 MOTOROLA Product Preview REGISTERED HEX TTL TO ECL TRANSLATOR Registered Hex TTL/ECL Translator The MC1 OH/100H604 is a 6-bit, registered, dual supply TTL to ECL translator. The de­ vice features differential ECL outputs as well as a choice between either a differential ECL

Contextual Info: ECL PAL10/10016P8 National Semiconductor PAL10/10016P8 ECL Programmable Array Logic General Description The PAL1016P8/10016P8 is the first member of an ECL programmable logic device family possessing common electrical characteristics, utilizing an easily accommodated

10H645

Abstract: E211 MC10E111 MPC973 AN1405
Contextual Info: AN1405/D ECL Clock Distribution Techniques Prepared by Todd Pearson ECL Applications Engineering http://onsemi.com APPLICATION NOTE This application note provides information on system design using ECL logic technologies for reducing system clock skew over

Contextual Info: PAL10/10016P8 ECL Programmable Array Logic ECL PAL10/10016P8 National Semiconductor General Description The PAL1016PB/10016P8 is the first member of an ECL programmable logic device family possessing common electrical characteristics, utilizing an easily accommodated

Hex schmitt trigger ecl

Abstract: 100325DMQB 5962-9153101MXA 5962-9153101MYA CERQUAD fmqb 100325J-QMLV 100325WFQMLV 5962-9153101VXA 5962
Contextual Info: National P/N 100325 - Low Power Hex ECL-to-TTL Translator Products > Military/Aerospace > Logic > ECL > 100325 100325 Product Folder Low Power Hex ECL-to-TTL Translator General Description Features Package & Models Datasheet Samples & Pricing Datasheet Title

Contextual Info: AN1405 Application Note ECL Clock Distribution Techniques Prepared by Todd Pearson ECL Applications Engineering This application note provides information on system design using ECL logic technologies for reducing system clock skew over the alternative CMOS and TTL

Contextual Info: TYPES ECL2536, ECL2537 HLL-TO-ECL AND ICL-TO-HLL CONVERTERS ECL INTEGRATED CIRCUITS to H c< r "D I- m m ECL2500 SERIES EMITTER-COUPLED-LOGIC ECL LEVEL CONVERTERS FOR APPLICATION IN ULTRA-HIGH-SPEED D IG ITA L SYSTEMS O' description r* m ¿»2 The ECL2500 series is a compatible family of ECL functions

EIA-644

Abstract: PECL-to-SN64LVDS33
Contextual Info: Interface Data Transmission Texas Instruments Incorporated The SN65LVDS33/34 as an ECL-to-LVTTL converter By Chris Sterzik Applications Specialist, Interface Products Introduction Figure 1. ECL characteristic load Emitter-coupled logic (ECL) has often been the physical

Contextual Info: ECL Surface-Mount Delay Modules ► 10k ECL logic levels. 10k ECL Programmable Delay Modules Part No. GECLPG301MX GECLPG302MX GECLPG303MX GECLPG304MX GECLPG305MX GEGLPG306MX GECLPG307MX GECLPG308MX GECLPG309MX GECLPG310MX Step Delay ns ± ns Max. Delay ns ± ns

10H645

Abstract: AN1405 E211 MC10E111 MPC973
Contextual Info: AN1405 Application Note ECL Clock Distribution Techniques Prepared by Todd Pearson ECL Applications Engineering This application note provides information on system design using ECL logic technologies for reducing system clock skew over the alternative CMOS and TTL

TTL Logic Family list

Contextual Info: PAL10/10016P8 ECL Programmable Array Logic ECL PAL10/10016P8 jg fl National Semiconductor General Description The PAL1016P8/10016P8 is the first member of an ECL programmable logic device family possessing common electrical characteristics, utilizing an easily accommodated

AN-1405

Contextual Info: A N 1405 Application Note ECL Clock Distribution Techniques Prepared by Todd Pearson ECL Applications Engineering This application note provides information on system design using ECL logic technologies for reducing system clock skew over the alternative CMOS and TTL