EDS2732CABH
Abstract: No abstract text available
Text: DATA SHEET 256M bits SDRAM EDS2732CABH 8M words x 32 bits Description Pin Configurations The EDS2732CA is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.
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Original
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PDF
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EDS2732CABH
EDS2732CA
90-ball
133MHz/100MHz
M01E0107
E0397E40
EDS2732CABH
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EDS2732CABH
Abstract: No abstract text available
Text: DATA SHEET 256M bits SDRAM EDS2732CABH 8M words x 32 bits Pin Configurations The EDS2732CA is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. It is packaged in 90-ball FBGA.
|
Original
|
PDF
|
EDS2732CABH
EDS2732CA
90-ball
133MHz/100MHz
M01E0107
E0397E40
EDS2732CABH
|