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    resistor bank

    Abstract: EDS2532CABH
    Text: DATA SHEET 256M bits SDRAM EDS2532CABH 8M words x 32 bits Description Pin Configurations The EDS2532CABH is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.


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    PDF EDS2532CABH EDS2532CABH 90-ball 133MHz/100MHz M01E0107 E0395E40 resistor bank