DW MARKING CODE Search Results

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 17-May-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) UC2906DW ACTIVE SOIC DW 16

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) SN74S1052DW ACTIVE SOIC DW

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 2-Jun-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) UC2906DW ACTIVE SOIC DW 16 40 Green (RoHS

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) UC2638DW NRND SOIC DW 20 25

25 f 606

Abstract: CJSE069
Contextual Info: -^ Sm M M tLK -o n c u s t . dw g PRODUCT SPECIFICATION +6 VOLT REGULATOR TYPE NC. 2% Si OOC to +70OC General Pur pos e - NPN Ge PNP TO- 3 CLASS REV STANDARD [7] OE VICE MARKING CJ SE 069 N OTES: 1 b> C JSE069 .c) DATE CODE 2) 3) Ca s e i s V i n P i n 2 i s Grour id

green cap capacitor code marking

Contextual Info: ADS7809 7809 ADS SBAS017C – NOVEMBER 1996 – REVISED OCTOBER 2006 16-Bit 10µs Serial CMOS Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● 100kHz SAMPLING RATE ● 86dB SINAD WITH 20kHz INPUT ● ±2LSB INL ● DNL: 16 Bits No Missing Codes

kvt22

Abstract: KVL11 KPT23 ON Semiconductor marking k1648 KLT20 HEL16 KEL32 KEL01 xaa9646
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite and ECLinPS Plus Device Type and Date Code Marking Guide Gary Richards, ECL Logic Product Engineering http://onsemi.com APPLICATION NOTE need ON Semiconductor’s marking spec 12MON00232D and S.O.P. 7–19 ID of Products to Location of

Contextual Info: ADS7809 7809 ADS SBAS017C – NOVEMBER 1996 – REVISED OCTOBER 2006 16-Bit 10µs Serial CMOS Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● 100kHz SAMPLING RATE ● 86dB SINAD WITH 20kHz INPUT ● ±2LSB INL ● DNL: 16 Bits No Missing Codes

TI BINARY DATE CODE

Contextual Info: ADS7809 7809 ADS SBAS017B – NOVEMBER 1996 – REVISED SEPTEMBER 2003 16-Bit 10µs Serial CMOS Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● 100kHz SAMPLING RATE ● 86dB SINAD WITH 20kHz INPUT ● ±2LSB INL ● DNL: 16 Bits No Missing Codes

ca2dk22

Abstract: CA2-DK22 CA2-DN 122 telemecanique CA2 CA2-dN31 ca2dn31 CA2-DN40 ca2-Dn22 ca2dn22 Telemecanique TYPE CA2 AS
Contextual Info: Control relays CA2-D and CA3-D Control circuit : a.c. c References Control circuit : a.c. Type Number of contacts 1 Composition Basic reference. Complete with code indicating control circuit voltage 2 Weight kg CA2-DK22ii Instantaneous 4 4 – 3 1 2 2 2

Contextual Info: SN54LS640 THRU SN54LS642, SN54LS644, SN54LS645 SN74LS640 THRU SN74LS642, SN74LS644, SN74LS645 OCTAL BUS TRANSCEIVRS SDLS189 – APRIL 1979 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 22-Feb-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 84151012A ACTIVE LCCC FK 20

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) 84151012A ACTIVE LCCC FK 20 1

Contextual Info: SN54LS640 THRU SN54LS642, SN54LS644, SN54LS645 SN74LS640 THRU SN74LS642, SN74LS644, SN74LS645 OCTAL BUS TRANSCEIVRS SDLS189 – APRIL 1979 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

Contextual Info: CY54FCT240T, CY74FCT240T 8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCCS017A – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D D CY54FCT240T . . . D PACKAGE CY74FCT240T . . . Q OR SO PACKAGE TOP VIEW OEA DA0 OB0 DA1 OB1 DA2 OB2 DA3 OB3 GND 1 20 2

JM38510/01405BEA

Abstract: M38510
Contextual Info: SN54LS540, SN54LS541, SN74LS540, SN74LS541 OCTAL BUFFERS AND LINE DRIVERS WITH 3ĆSTATE OUTPUTS SDLS180 − AUGUST 1979 − REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

Contextual Info: CY54FCT240T, CY74FCT240T 8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCCS017A – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D D CY54FCT240T . . . D PACKAGE CY74FCT240T . . . Q OR SO PACKAGE TOP VIEW OEA DA0 OB0 DA1 OB1 DA2 OB2 DA3 OB3 GND 1 20 2

pin diagram of SN74LS244N

Contextual Info: SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 Memory Address Registers D PNP Inputs Reduce DC Loading

Contextual Info: SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 Memory Address Registers D PNP Inputs Reduce DC Loading

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 84151012A ACTIVE LCCC FK 20

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 26-Aug-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) 5962-9203101M2A OBSOLETE LCCC

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 23-Jan-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-9203101M2A OBSOLETE LCCC

Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) 5962-87809012A ACTIVE LCCC FK

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS074A – Revised June 2003 The CD4514B and CD4515B types are supplied in 16-lead hermetic dual-in-line ceramic packages F3A suffix , 16-lead dual-in-line plastic packages (E suffix), and 16-lead small-outline packages (M and M96 suffixes).