DV74ALS1 Search Results

ls123

Contextual Info: AVG Semiconductors_DDi Technical Data 123 DV74LS123 DV74ALS123 Dual Monostable Multivibrators with Clear These DC triggered multivibrators feature pulse width control by three methods. The basic pulse width is programmed by selection

Contextual Info: AVG DDi Semiconductors Technical Data DV74LS190 DV74ALS190 DV74LS191 DV74ALS191 Synchronous Up/Down Decade and Binary Counters The 74LS/ALS 190 is a synchronous UP/DOWN BCD Decade counter 8421 The 74LS/ALS 191 is a synchronous UP/DOWN Modulo-16 Binary Counter. State changes of the counters are

Contextual Info: 1011A AVG DDiT Semiconductors Technical Data DV74ALS1011A Triple 3-Input AND Buffers This device contains three independent buffers, each of which per­ forms the logic AND function. • AVG's ALS has guaranteed DC and AC specification over full temperature and Vcc range

Contextual Info: AVG Semiconductors DDi 1002 Technical Data DV74ALS1002A Quad 2-Input Positive-NOR Buffer N Suffix Plastic DIP AVG-001 Case This device contains four independent 2-input buffers, each of which performs the logic NOR function. • AVG’s ALS has guaranteed DC and AC specification over

Contextual Info: 1008 AVG DDiT Semiconductors Technical Data DV74ALS1008A Quad 2-Input AND Buffers This device contains four independent 2-input buffers, each of which performs the logic AND function. • AVG’s ALS has guaranteed DC and AC specification over full temperature and Vcc range

Contextual Info: AVG Semiconductors DDiT Technical Data DV74LS10 DV74ALS10A Triple 3-Input NAND Gates N Suffix Plastic DIP AVG-001 Case This device contains three independent gates, each of which performs the logic NAND function. AVG’s LS operates over extended Vcc from 4.5 to 5.5 V

LS109A

Contextual Info: AVG Semiconductors DDi Technical Data 109 A Dual JK Positive Edge-Triggered Flip-Flops DV74LS109A DV74ALS109A This device is_a dual edge-triggered flip-flop. Each flip-flop has individual J, K, clock, reset and preset inputs, and also com­ plementary Q and Q outputs.

Contextual Info: 1035 AVG Semiconductors DDiT Technical Data DV74ALS1035 Hex Non-Inverting Drivers with Open Collector Outputs N Suffix Plastic DIP AVG-001 Case This device contains six independent drivers, each of which performs the logic identity function. The Outputs require

als1005

Abstract: DV74ALS1005 ALS100-5
Contextual Info: 1005 AVG Semiconductors DDiT Technical Data Hex Inverting Drivers with Open Collector Outputs DV74ALS1005 This device contains six independent drivers, each of which performs the logic INVERT/Complement function. The Outputs require external pull-up resistors

LS11

Contextual Info: AVG DDT Sem iconductors Technical Data DV74LS11 DV74ALS11A Triple 3-Input AND Gate This device contains three independent gates, each of which performs the logic AND function. • • • • N Suffix Plastic DIP AVG-001 Case AVG’s LS operates over extended Vcc from 4.5 to 5.5 V

Contextual Info: DDi" DV74LS145 DV74ALS145 Available Q 2 ,1995 1 of 10 Decoder/Driver with Open Collector Outputs N Suffix Plastic DIP AVG-001 Case This 1 of 10 decoder driver is designed to accept BCD inputs and to provide appropriate outputs to drive incandescent displays. Outputs remain off for invalid input conditions. It is

Contextual Info: 1010 AVG Semiconductors DDiT Technical Data DV74ALS1010A Triple 3-Input NAND Buffers This device contains three independent buffers, each of which per­ forms the logic NAND function. • • • • • N Suffix Plastic DIP AVG-001 Case AVG’s ALS has guaranteed DC and AC specification over full

Contextual Info: AVG Semiconductors DDi Technical Data 175 DV74LS175 DV74ALS175 Quad D Flip-Flop with Master Reset This device is useful for general flip-flop requirements featuring common clock and clear inputs, and both complementary and true outputs. The information on the D inputs is stored during

Contextual Info: AVG Semiconductors DDiT Technical Data DV74LS125 A DV74ALS125 Quad Bus Buffer Gate 3 State ro cn N Suffix Plastic DIP A V G -001 Case This Quad 3-State Buffer contains four independent gates, each of which performs a non-inverting buffer function. Buffer

Contextual Info: 1000 AVG Semiconductors DDiT Technical Data DV74ALS1000A Quad 2-Input NAND Buffer This device contains four independent 2-input buffers, each of which performs the logic NAND function. N Suffix Plastic DIP AVG-001 Case AVG’s ALS has guaranteed DC and AC specification

Contextual Info: DDi AVG Semiconductors Technical Data Dual JK Negative Edge-Triggered Flip-Flops with SET, common CLEAR and common CLOCK DV74LS114A DV74ALS114A N Suffix Plastic DIP AVG-001 Case The circuity in this device contains common clock and common clear inputs. When the clock goes HIGH, the inputs are enabled

Contextual Info: 1034 AVG Semiconductors DDiT Technical Data DV74ALS1034 Hex Driver This device contains six independent drivers, each of which performs the logic identity function. • AVG’s ALS has guaranteed DC and AC specification over full temperature and Vcc range

Contextual Info: 164 AVG Semiconductors DDiT Technical Data DV74LS164 DV74ALS164 8-Bit Serial-ln Parallel-Out Shift Register N Suffix Plastic D IP A V G -001 C ase This device is a high speed 8-Bit Serial-ln-Parallel-Out Shift Register. Serial data is entered through a 2-Input AND gate synchronous with the

Contextual Info: AVG Semiconductors DDi Technical Data DV74LS12 DV74ALS12A Triple 3-Input NAND Gate with Open Collector Outputs This device contains three independent 3-input gates with open-collector outputs. These perform the logic NAND function in positive logic. The open-collector outputs require pull-up

Contextual Info: AVG Semiconductors DDi Technical Data 113 Dual JK Negative Edge-Triggered Flip-Flops with PRESET DV74LS113A DV74ALS113A N Suffix Plastic DIP AVG-001 Case This device contains individual J, K, set, and clock inputs. When the clock goes HIGH, the inputs are enabled and data

Contextual Info: AVG Semiconductors DDi Technical Data DV74ALS1004 Hex Inverting Driver This device contains six independent drivers, each of which performs the logic inverter/complement function. N Suffix Plastic DIP A V G -001 C ase • AVG’s ALS has guaranteed DC and AC specification over full

ALS136

Abstract: ls136
Contextual Info: 136 AVG Sem iconductors DDT Technical Data DV74LS136 DV74ALS136 Quad 2-Input Exclusive OR Gate with Open Collector Outputs N Suffix Plastic DIP AVG-001 Case This device contains four independent gates, each of which performs the exclusive OR function. D Suffix

LS112A

Abstract: ALS112A
Contextual Info: DOT A VG Semiconductors 112 Technical Data Dual JK Negative Edge-Triggered Flip-Flops DV74LS112A DV74ALS112A N Suffix Plastic DIP AVG -003 Case This device contains two individual J. K, clock, and asynchronous set and clear inputs to each flip-flop. When the clock pulse goes

LS175

Abstract: ALS175
Contextual Info: AVG Semiconductors DDT Technical Data 175 DV74LS175 DV74ALS175 Quad D Flip-Flop with Master Reset This device is useful for general flip-flop requirements featuring common clock and clear inputs, and both complementary and true outputs. The information on the D inputs is stored during