DSC56 Search Results

Contextual Info: Freescale Semiconductor Document Number: AN4816 Rev 0, 09/2013 Application Note Introduction to DSC56800EX Quick Start Development Environment 1 Introduction The DSC56800EX Quick Start is a software environment for the embedded applications development. It provides fully debugged

DSC-544

Abstract: DSC-526
Contextual Info: D A T A S H E E T DSC-5 SERIES D-SUB H.D. FEMALE SOLDER TYPE Specification: 1 2) 3) 4) 5) 6) 7) 8) Series No. DSC-515 DSC-526 DSC-544 DSC-562 DSC-578 Insulator: Thermoplastic UL94V-0) Contact: Copper Alloy, Gold Plated Shell: Copper Alloy Storage Temperature: -20°C ~ 70°C

IC51-1324-828

Abstract: IDT723652 IDT723662 IDT723672
Contextual Info: CMOS SyncBiFIFOTM 2,048 x 36 x 2 4,096 x 36 x 2 8,192 x 36 x 2 FEATURES: PRELIMINARY IDT723652 IDT723662 IDT723672 Select IDT Standard timing using EFA EFA, EFB EFB, FFA and FFB flags functions or First Word Fall Through timing (using ORA, ORB, IRA and IRB flag functions)

723674

Abstract: IDT723654 IDT723664 IDT723674
Contextual Info: CMOS SyncBiFIFOTM WITH BUS-MATCHING 2,048 x 36 x 2, 4,096 x 36 x 2, 8,192 x 36 x 2 FEATURES: PRELIMINARY IDT723654 IDT723664 IDT723674 ♦ Port B bus sizing of 36 bits long word , 18 bits (word) and 9 bits (byte) ♦ Big- or Little-Endian format for word and byte bus sizes

Contextual Info: IDT70V9169/59L HIGH-SPEED 3.3V 16/8K X 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9ns max.

Contextual Info: CMOS SyncFIFOTM WITH BUS-MATCHING 2,048 x 36 4,096 x 36 8,192 x 36 • • • FEATURES • • • • • • • Memory storage capacity: IDT723653 – 2,048 x 36 IDT723663 – 4,096 x 36 IDT723673 – 8,192 x 36 Clock frequencies up to 83 MHz 8 ns access time

70T34

Contextual Info: HIGH-SPEED 2.5V 8/4K x 18 DUAL-PORT 8/4K x 16 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access IDT70T35/34L IDT70T25/24L – Commercial: 20/25ns (max.)

IDT70T659

Contextual Info: HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE Features ◆ ◆ ◆ ◆ ◆ ◆ Busy and Interrupt Flags On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port

A12L

Abstract: A13L IDT70T9159
Contextual Info: HIGH-SPEED 2.5V 16/8K X 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial:7.5/9/12ns max.

IDT70T659

Abstract: 9S12 CAN 9S12
Contextual Info: Š Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT70T651/9S HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE ◆ On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port

BY100

Abstract: Power Diode BY100 A12L IDT70P247
Contextual Info: VERY LOW POWER 1.8V 8K/4K x 16 DUAL-PORT STATIC RAM IDT70P257/247L Features ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Industrial: 55ns max. Low-power operation IDT70P257/247L

IDT70T3319

Abstract: IDT70T3399
Contextual Info: HIGH-SPEED 2.5V 512/256/128K X 18 IDT70T3339/19/99S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Š Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

IDT70T631

Abstract: A18L
Contextual Info: Š Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT70T633/1S HIGH-SPEED 2.5V 512/256K x 18 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed access – Commercial: 8/10/12/15ns max.

70P24

Abstract: 70P25
Contextual Info: Š VERY LOW POWER 1.8V 8K/4K x 16 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Industrial: 55ns max. Low-power operation IDT70P258/248L

KX18

Abstract: IDT70V5378
Contextual Info: 3.3V 64/32K X 18 SYNCHRONOUS FOURPORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ True four-ported memory cells which allow simultaneous access of the same memory location Synchronous Pipelined device – 64/32K x 18 organization Pipelined output mode allows fast 200MHz operation

IDT70T659

Contextual Info: HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed access – Commercial: 10/12/15ns max.

IDT723653

Abstract: IDT723663 IDT723673 723653
Contextual Info: CMOS SyncFIFOTM WITH BUS-MATCHING 2,048 x 36, 4,096 x 36, 8,192 x 36 FEATURES: • • • • • • • • • • Memory storage capacity: IDT723653 – 2,048 x 36 IDT723663 – 4,096 x 36 IDT723673 – 8,192 x 36 Clock frequencies up to 83 MHz 8 ns access time

A12L

Abstract: A13L IDT709159
Contextual Info: PRELIMINARY IDT709169/59L HIGH-SPEED 16/8K x 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9ns max.

CA 5668

Abstract: 5L25 A12L A13L
Contextual Info: HIGH-SPEED 2.5V 16/8K x 8 DUAL-PORT STATIC RAM Features PRELIMINARY IDT70T06/5L u M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave u Interrupt Flag u On-chip port arbitration logic u Full on-chip hardware support of semaphore signaling

IDT70T631

Abstract: 70T633
Contextual Info: Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT70T633/1S HIGH-SPEED 2.5V 512/256K x 18 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed access – Commercial: 8/10/12/15ns max.

AXM-0337

Abstract: AN3312 programming 56F83xx can bootloader FlexCAN tera term jtag rs232 AN331 Programming Bootloader 56F8346
Contextual Info: Freescale Semiconductor Application Note Document Number: AN3312 Rev. 0, 10/2006 CAN Bus Bootloader for DSC 56F83xx Family by: Charlie Wu TSPG — DSPO Application Engineering Kenny Lam APTSPG — 8/16 Bit Application Engineering 1 Overview This document describes how to use a Freescale DSC

Contextual Info: CMOS SyncBiFIFOTM 2,048 x 36 x 2 4,096 x 36 x 2 8,192 x 36 x 2 FEATURES: PRELIMINARY IDT723652 IDT723662 IDT723672 Select IDT Standard timing using EFA EFA, EFB EFB, FFA and FFB flags functions or First Word Fall Through timing (using ORA, ORB, IRA and IRB flag functions)

CA 5668

Contextual Info: HIGH-SPEED 2.5V 16/8K x 8 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial: 20/25ns max. – Industrial: 25ns (max.) Low-power operation

tube 5670

Abstract: 5670 tube IDT70T631 IDT BGA256
Contextual Info: Š Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT70T633/1S HIGH-SPEED 2.5V 512/256K x 18 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed access