Untitled
Abstract: No abstract text available
Text: 2.5V QUADMUX DDR FLOW-CONTROL DEVICE WITH MUX/DEMUX/BROADCAST FUNCTIONS 8,192 x 40 x 4 16,384 x 40 x 4 32,768 x 40 x 4 • FEATURES • • • Choose from among the following memory organizations: IDT72T55248 - 8,192 words, 40-bits/word maximum, 4 Sequential
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IDT72T55248
40-bits/word
IDT72T55258
IDT72T55268
BB324-1)
72T55248
72T55258
72T55268
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Untitled
Abstract: No abstract text available
Text: ADVANCE INFORMATION 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 16 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits • • • FEATURES: • • • • • • • • • • • • Choose from among the following memory density options:
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IDT72T51433
IDT72T51443
IDT72T51453
72T51433
72T51443
72T51453
drw39
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Untitled
Abstract: No abstract text available
Text: CMOS SyncFIFOTM WITH BUS-MATCHING 2,048 x 36 4,096 x 36 8,192 x 36 • • • FEATURES • • • • • • • Memory storage capacity: IDT723653 – 2,048 x 36 IDT723663 – 4,096 x 36 IDT723673 – 8,192 x 36 Clock frequencies up to 83 MHz 8 ns access time
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IDT723653
IDT723663
IDT723673
PK128-1)
drw25
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Untitled
Abstract: No abstract text available
Text: ADVANCE INFORMATION IDT72T51333 IDT72T51343 IDT72T51353 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES 8 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits • • • • FEATURES: • • • • • • • • • • • Choose from among the following memory density options:
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IDT72T51333
IDT72T51343
IDT72T51353
72T51333
72T51343
72T51353
drw36
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IDT72V223
Abstract: IDT72V233 IDT72V243 IDT72V253 IDT72V263 IDT72V273 IDT72V283 IDT72V293 72V273
Text: PRELIMINARY 3.3 VOLT HIGH-DENSITY SUPERSYNC II NARROW BUS FIFO IDT72V223, IDT72V233 IDT72V243, IDT72V253 IDT72V263, IDT72V273 IDT72V283, IDT72V293 512 x 18/1,024 x 9, 1,024 x 18/2,048 x 9 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9 8,192 x 18/16,384 x 9, 16,384 x 18/32,768 x 9
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IDT72V223,
IDT72V233
IDT72V243,
IDT72V253
IDT72V263,
IDT72V273
IDT72V283,
IDT72V293
IDT72V223
IDT72V223
IDT72V233
IDT72V243
IDT72V253
IDT72V263
IDT72V273
IDT72V283
IDT72V293
72V273
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IDT72V36100
Abstract: IDT72V36110 IDT72V3640 IDT72V3650 IDT72V3660 IDT72V3670 IDT72V3680 IDT72V3690
Text: PRELIMINARY IDT72V3640, IDT72V3650 IDT72V3660, IDT72V3670 IDT72V3680, IDT72V3690 3.3V HIGH-DENSITY SUPERSYNC II 36-BIT FIFO 1,024 x 36, 2,048 x 36 4,096 x 36, 8,192 x 36 16,384 x 36, 32,768 x 36 FEATURES: • • • • • • • • Choose among the following memory organizations:Commercial
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IDT72V3640,
IDT72V3650
IDT72V3660,
IDT72V3670
IDT72V3680,
IDT72V3690
36-BIT
IDT72V3640
IDT72V3660
IDT72V36100
IDT72V36110
IDT72V3640
IDT72V3650
IDT72V3660
IDT72V3670
IDT72V3680
IDT72V3690
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72T36125
Abstract: IDT72T36105 IDT72T36115 IDT72T36125 IDT72T3645 IDT72T3655 IDT72T3665 IDT72T3675 IDT72T3685 IDT72T3695
Text: PRELIMINARY 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS IDT72T3645, IDT72T3655, IDT72T3665, IDT72T3675, IDT72T3685, IDT72T3695, IDT72T36105, IDT72T36115, IDT72T36125 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 and 262,144 x 36
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36-BIT
IDT72T3645,
IDT72T3655,
IDT72T3665,
IDT72T3675,
IDT72T3685,
IDT72T3695,
IDT72T36105,
IDT72T36115,
IDT72T36125
72T36125
IDT72T36105
IDT72T36115
IDT72T36125
IDT72T3645
IDT72T3655
IDT72T3665
IDT72T3675
IDT72T3685
IDT72T3695
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Untitled
Abstract: No abstract text available
Text: 2.5 VOLT HIGH-SPEED TeraSync FIFO IDT72T1845, IDT72T1855 18-BIT/9-BIT CONFIGURATIONS IDT72T1865, IDT72T1875 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9, 8,192 x 18/16,384 x 9, IDT72T1885, IDT72T1895 16,384 x 18/32,768 x 9, 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9,
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IDT72T1845,
IDT72T1855
18-BIT/9-BIT
IDT72T1865,
IDT72T1875
IDT72T1885,
IDT72T1895
IDT72T18105,
IDT72T18115
IDT72T18125
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Untitled
Abstract: No abstract text available
Text: CMOS BUS-MATCHING SyncFIFOTM 256 x 36, 512 x 36, 1,024 x 36 FEATURES: • • • • • • • • • Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 Clocked FIFO buffering data from Port A to Port B Clock frequencies up to 83 MHz 8 ns access time
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IDT723623
IDT723633
IDT723643
PK128-1)
drw22
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IDT72T3645
Abstract: 72T36125
Text: 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 36-BIT CONFIGURATIONS 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 and 262,144 x 36 FEATURES: • • • • • • • • • • • • • Choose among the following memory organizations:
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36-BIT
IDT72T3645
IDT72T3655
IDT72T3665
IDT72T3675
IDT72T3685
IDT72T3695
IDT72T36105
IDT72T36115
IDT72T36125
IDT72T3645
72T36125
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723674
Abstract: No abstract text available
Text: 3.3 VOLT CMOS SyncBiFIFOTM WITH BUS-MATCHING 2,048 x 36 x 2 4,096 x 36 x 2 8,192 x 36 x 2 • • • FEATURES • • • • • • • Memory storage capacity: IDT72V3654 – 2,048 x 36 x 2 IDT72V3664 – 4,096 x 36 x 2 IDT72V3674 – 8,192 x 36 x 2 Clock frequencies up to 100 MHz 6.5ns access time
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IDT72V3654
IDT72V3664
IDT72V3674
2V3674
drw36
723674
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IDT70T659
Abstract: No abstract text available
Text: HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE Features ◆ ◆ ◆ ◆ ◆ ◆ Busy and Interrupt Flags On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port
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256/128K
100mV)
150mV
256-ball
208-pin
208-ball
IDT70T659
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IDT723624
Abstract: IDT723634 IDT723644
Text: CMOS SyncBiFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 FEATURES: • • • • • • • Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 Clock frequencies up to 83 MHz 8 ns access time
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IDT723624
IDT723634
IDT723644
36-bits
drw32
IDT723624
IDT723634
IDT723644
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IDT72V3656
Abstract: IDT72V3666 IDT72V3676 723666
Text: 3.3 VOLT CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 2,048 x 36 x 2 4,096 x 36 x 2 8,192 x 36 x 2 IDT72V3656 IDT72V3666 IDT72V3676 FEATURES • • • • • • • • • • • Memory storage capacity: IDT72V3656 – 2,048 x 36 x 2 IDT72V3666 – 4,096 x 36 x 2
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IDT72V3656
IDT72V3666
IDT72V3676
36-bit
18-bit
18-bit
drw38
IDT72V3656
IDT72V3666
IDT72V3676
723666
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OE33
Abstract: bel 188 transistor IDT72V73263
Text: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH WITH RATE MATCHING 16,384 X 16,384 CHANNELS FEATURES: • • • • • • • • • • • • • • • • Up to 64 serial input and output streams Maximum 16,384 x 16,384 channel non-blocking switching
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048Mb/s,
096Mb/s,
192Mb/s,
384Mb/s
768Mb/s
D8-15
drw19
BB208-1)
DR208-1)
OE33
bel 188 transistor
IDT72V73263
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IDT72V3623
Abstract: IDT72V3653 IDT72V3663 IDT72V3673
Text: 3.3 VOLT CMOS SyncFIFOTM WITH BUS-MATCHING 2,048 x 36 4,096 x 36 8,192 x 36 FEATURES • • • • • • • • • • Memory storage capacity: IDT72V3653 – 2,048 x 36 IDT72V3663 – 4,096 x 36 IDT72V3673 – 8,192 x 36 Clock frequencies up to 100 MHz 6.5 ns access time
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IDT72V3653
IDT72V3663
IDT72V3673
IDT72V3623
IDT72V3653
IDT72V3663
IDT72V3673
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IDT72V51433
Abstract: IDT72V51443 IDT72V51453
Text: 3.3V MULTI-QUEUE FLOW-CONTROL DEVICES 16 QUEUES 18 BIT WIDE CONFIGURATION 589,824 bits 1,179,648 bits 2,359,296 bits • • • • FEATURES: • • • • • • • • • • Choose from among the following memory density options: IDT72V51433 Total Available Memory = 589,824 bits
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IDT72V51433
IDT72V51443
IDT72V51453
-IDT72Vrol
drw34
IDT72V51433
IDT72V51443
IDT72V51453
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D1825
Abstract: d1833 AN-265 D1531
Text: APPLICATION NOTE AN-265 BUS MATCHING WITH IDT FIFOs BUS MATCHING The following diagrams show how an external byte-oriented bus should be mapped to the 9-bit oriented FIFO. The Bus Matching feature offered in the SuperSync II family is a powerful feature designed to eliminate external MUXes. When used in applications where
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AN-265
36-bit
16-bit
32-bit
IDT72V263
IDT72V273
IDT72V283
IDT72V293
IDT72V2103
IDT72V2113
D1825
d1833
AN-265
D1531
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IDT72T55248
Abstract: IDT72T55258 IDT72T55268
Text: 2.5V QUADMUX DDR FLOW-CONTROL DEVICE WITH MUX/DEMUX/BROADCAST FUNCTIONS 8,192 x 40 x 4 16,384 x 40 x 4 32,768 x 40 x 4 FEATURES • • • • Choose from among the following memory organizations: IDT72T55248 - 8,192 words, 40-bits/word maximum, 4 Sequential
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IDT72T55248
40-bits/word
IDT72T55258
IDT72T55268
BB324-1)
72T55248
72T55258
72T55268
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D22-R2
Abstract: 72T4088 IDT72T40108 IDT72T40118 IDT72T4088 IDT72T4098
Text: 2.5 VOLT HIGH-SPEED TeraSync DDR/SDR FIFO 40-BIT CONFIGURATION 16,384 x 40, 32,768 x 40, 65,536 x 40, 131,072 x 40 IDT72T4088, IDT72T4098 IDT72T40108, IDT72T40118 FEATURES • • • • • • • • • • • • • • Choose among the following memory organizations:
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40-BIT
IDT72T4088,
IDT72T4098
IDT72T40108,
IDT72T40118
IDT72T4088
IDT72T40108
250MHz
D22-R2
72T4088
IDT72T40108
IDT72T40118
IDT72T4088
IDT72T4098
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IDT72T54242
Abstract: IDT72T54252 IDT72T54262 72T54242
Text: 2.5V QUAD/DUAL TeraSync DDR/SDR FIFO x10 QUAD FIFO or x10/x20 DUAL FIFO CONFIGURATIONS 32,768 x 10 x 4/16,384 x 20 x 2 65,536 x 10 x 4/32,768 x 20 x 2 131,072 x 10 x 4/65,536 x 20 x 2 FEATURES • • • • • • • Choose from among the following memory organizations:
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x10/x20
IDT72T54242
IDT72T54252
IDT72T54262
10-bit
drw41
72T54242
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D39-0
Abstract: No abstract text available
Text: 2.5V MULTI-QUEUE DDR FLOW-CONTROL DEVICES 40 BITS WIDE WITH FIXED 4 QUEUES 8,192 x 40 x 4, 16,384 x 40 x 4 and 32,768 x 40 x 4 • • • FEATURES • • • • • • • • • • • The multi-queue DDR flow-control device contains 4 Queues each queue has a fixed size of:
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IDT72T51248
IDT72T51258
IDT72T51268
200MHz
100MHz
Da72T51268
6159drw45
D39-0
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Untitled
Abstract: No abstract text available
Text: Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT70T651/9S HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE ◆ On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port
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IDT70T651/9S
256/128K
100mV)
150mV
256-ball
208-pin
208-ball
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IDT723653
Abstract: IDT723663 IDT723673 723653
Text: CMOS SyncFIFOTM WITH BUS-MATCHING 2,048 x 36, 4,096 x 36, 8,192 x 36 FEATURES: • • • • • • • • • • Memory storage capacity: IDT723653 – 2,048 x 36 IDT723663 – 4,096 x 36 IDT723673 – 8,192 x 36 Clock frequencies up to 83 MHz 8 ns access time
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IDT723653
IDT723663
IDT723673
PK128-1)
drw25
IDT723653
IDT723663
IDT723673
723653
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