Untitled
Abstract: No abstract text available
Text: L6207Q DMOS dual full bridge driver Datasheet - production data Description The L6207Q device is a DMOS dual full bridge driver designed for motor control applications, realized in BCDmultipower technology, which combines isolated DMOS power transistors with
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L6207Q
L6207Q
VFQFPN48
DocID018993
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DN3145
Abstract: DN3145N8 DATE CODE FOR SUPERTEX
Text: DN3145 Initial Release N-Channel Depletion-Mode Vertical DMOS FETs Features Advanced DMOS Technology ❏ High input impedance These depletion-mode normally-on transistors utilize an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces
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DN3145
100mA,
100mA
DN3145
DN3145N8
DATE CODE FOR SUPERTEX
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LDMOS
Abstract: No abstract text available
Text: POLYFET RF DEVICES LDMOS Lateral Double Diffuse MOS Transistor The Next Generation polyfet rf devices 1 DMOS Technology • Vertical DMOS 9 Lateral DMOS • Bottom Side Drain • Source bond wire reducing gain • Higher Crss • BEO isolation • High Package Cost
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L88081
L88082
L88013
L88012
L88008
L88007
L88016
L88026
1000Mhz
LDMOS
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DN2640
Abstract: DN2640N3 DN2640ND
Text: DN2640 Preliminary N-Channel Depletion-Mode Vertical DMOS FETs Ordering Information BVDSX / BVDGX RDS ON (max) IDSS (min) 400V 6.0Ω 300mA Order Number / Package TO-92 Die DN2640N3 DN2640ND Advanced DMOS Technology Features These depletion-mode (normally-on) transistors utilize an advanced vertical DMOS structure and Supertex’s well-proven
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DN2640
300mA
DN2640N3
DN2640ND
200mA,
200mA
DN2640
DN2640N3
DN2640ND
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TN0702N3
Abstract: TN0702
Text: TN0702 Low Threshold N-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information Order Number / Package BVDSS / RDS ON ID(ON) VGS(th) BVDGS (max) (min) (max) TO-92 20V 1.3Ω 0.5A 1.0V TN0702N3 7 Features Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven
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TN0702
TN0702N3
500mA
200pF
TN0702N3
TN0702
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Untitled
Abstract: No abstract text available
Text: TB62003,004,006~009P/F TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TB62003P,TB62003F,TB62004P,TB62004F TB62006P,TB62006F,TB62007P,TB62007F TB62008P,TB62008F,TB62009P,TB62009F 8CH DMOS TRANSISTOR ARRAY WITH GATE TB62003P, TB62003F INVERTER & DMOS DRIVER
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TB62003
009P/F
TB62003P
TB62003F
TB62004P
TB62004F
TB62006P
TB62006F
TB62007P
TB62007F
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Untitled
Abstract: No abstract text available
Text: TB62003,004,006~009P/F TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TB62003P,TB62003F,TB62004P,TB62004F TB62006P, TB62006F,TB62007P,TB62007F TB62008P,TB62008F, TB62009P,TB62009F 8CH DMOS TRANSISTOR ARRAY WITH GATE TB62003P, TB62003F INVERTER & DMOS DRIVER
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TB62003
006009P/F
TB62003P
TB62003F
TB62004P
TB62004F
TB62006P,
TB62006F
TB62007P
TB62007F
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Untitled
Abstract: No abstract text available
Text: TP2502 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s wellproven silicon-gate manufacturing process. This combination
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TP2502
125pF
DSFP-TP2502
A022309
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DN2640
Abstract: DN2640N3 DN2640ND
Text: – E T E L O S B O – DN2640 Preliminary N-Channel Depletion-Mode Vertical DMOS FETs Ordering Information BVDSX / BVDGX RDS ON (max) IDSS (min) 400V 6.0Ω 300mA Order Number / Package TO-92 Die DN2640N3 DN2640ND Advanced DMOS Technology Features These depletion-mode (normally-on) transistors utilize an advanced vertical DMOS structure and Supertex’s well-proven
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DN2640
300mA
DN2640N3
DN2640ND
200mA,
200mA
DN2640
DN2640N3
DN2640ND
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Untitled
Abstract: No abstract text available
Text: TP5322 TP5322 Initial Release P-Channel Enhancement-Mode Vertical DMOS FET Features General Description ! ! ! ! ! ! ! ! These low threshold enhancement-mode normally-off transistors utilize an advanced vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing
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TP5322
110pFmax.
-100mA
-200mA
DSFP-TP5322
NR041105
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Untitled
Abstract: No abstract text available
Text: TP5322 TP5322 Initial Release P-Channel Enhancement-Mode Vertical DMOS FET General Description Features These low threshold enhancement-mode normally-off transistors utilize an advanced vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing
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TP5322
110pFmax.
-100mA
-200mA
DSFP-TP5322
NR011905
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Untitled
Abstract: No abstract text available
Text: Supertex inc. VP2450 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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VP2450
DSFP-VP2450
B082613
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2N6661
Abstract: No abstract text available
Text: Supertex inc. 2N6661 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description The Supertex 2N6661 is an enhancement-mode normallyoff transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing
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2N6661
2N6661
DSFP-2N6661
C042711
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Untitled
Abstract: No abstract text available
Text: Supertex inc. TN2640 N-Channel Enhancement-Mode Vertical DMOS FETs Features General Description This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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TN2640
DSFP-TN2640
C071913
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Untitled
Abstract: No abstract text available
Text: Supertex inc. VN10K N-Channel Enhancement-Mode Vertical DMOS FET Features General Description This enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicongate manufacturing process. This combination produces a
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VN10K
DSFP-VN10K
B031411
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marking oc diode sot89
Abstract: No abstract text available
Text: Supertex inc. VP3203 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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VP3203
DSFP-VP3203
B082613
marking oc diode sot89
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transistor s70
Abstract: Marking S70 pin
Text: DMOS Transistors N-Channel Enhancement-Mode DMOS Transistors =TO-92 Plastic Package Type Pin Config. Maximum Drain-Source Voltage Maximum Continuous Drain Current Max. Power Dissipation at Tc = 25 °C Drain-Source ON Resistance ') Gate Threshold Voltage
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OCR Scan
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BS108
BS123
BS170
2N7000
O-236
BS850
transistor s70
Marking S70 pin
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Untitled
Abstract: No abstract text available
Text: DN2530 N-Channel Depletion-Mode Vertical DMOS FETs Features General Description The DN2530 is a low threshold depletion-mode normally-on transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process.
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DN2530
DN2530
DSFP-DN2530
A103108
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voltage drop circuit from 220V to 10V
Abstract: SOT89 FET marking diode p3c TP5322 TP5322K1 TP5322K1-G TP5322N8 FAST DMOS FET Switches MOS P-Channel SOT23 fet sot-89 marking code
Text: TP5322 TP5322 Initial Release P-Channel Enhancement-Mode Vertical DMOS FET Features General Description ! ! ! ! ! ! ! ! These low threshold enhancement-mode normally-off transistors utilize an advanced vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This
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TP5322
110pFmax.
-100mA
-200mA
DSFP-TP5322
A042005
voltage drop circuit from 220V to 10V
SOT89 FET marking
diode p3c
TP5322
TP5322K1
TP5322K1-G
TP5322N8
FAST DMOS FET Switches
MOS P-Channel SOT23
fet sot-89 marking code
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Untitled
Abstract: No abstract text available
Text: Supertex inc. 2N6660 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description The Supertex 2N6660 is an enhancement-mode normallyoff transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process.
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2N6660
2N6660
DSFP-2N6660
C031411
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D4710
Abstract: No abstract text available
Text: 100MHz CMOS/DMOS Wideband Quad Analog Switch CORPORATION CWB201 FEATURES DESCRIPTION APPLICATIONS Designed for RF and Video Switching the CWB201 is manufactured using Calogic’s high speed CMOS combined with DMOS transistors in a monolithic design resulting in
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100MHz
CWB201
CWB201
100MHz
D4710
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e041
Abstract: No abstract text available
Text: Supertex inc. DN2540 N-Channel Depletion-Mode Vertical DMOS FETs Features General Description The Supertex DN2540 is a low threshold depletion mode normally-on transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate
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DN2540
DN2540
DSFP-DN2540
B041310
e041
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Untitled
Abstract: No abstract text available
Text: Supertex inc. TN0106 N-Channel Enhancement-Mode Vertical DMOS FET General Description Features This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces
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TN0106
DSFP-TN0106
B080811
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sot 23 x 316
Abstract: fet sot-89 marking code sot-89 MARKING CODE ab TN5325 TN5325K1-G TN5325N3-G TN5325N8-G jedec sot-23
Text: TN5325 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This
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TN5325
DSFP-TN5325
A052009
sot 23 x 316
fet sot-89 marking code
sot-89 MARKING CODE ab
TN5325
TN5325K1-G
TN5325N3-G
TN5325N8-G
jedec sot-23
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