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    DM74LS11 Price and Stock

    onsemi DM74LS11N

    IC GATE AND 3CH 3-INP 14MDIP
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    DigiKey DM74LS11N Tube 25
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    onsemi DM74LS112AN

    IC FF JK TYPE DUAL 1BIT 16DIP
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    DigiKey DM74LS112AN Tube 25
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    Rochester Electronics LLC DM74LS112AM

    J-K FLIP-FLOP
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    DigiKey DM74LS112AM Bulk 2,219
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    Rochester Electronics LLC DM74LS112AMX

    J-K FLIP-FLOP
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    DigiKey DM74LS112AMX Bulk 2,219
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    Fairchild Semiconductor Corporation DM74LS11M

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    Bristol Electronics DM74LS11M 1,420
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    Find more DM74LS11 price and stock on Findchips.com

    DM74LS11 Datasheets (36)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    DM74LS11 Fairchild Semiconductor Triple 3-Input AND Gate Original PDF
    DM74LS11 National Semiconductor Triple 3-Input AND Gates Original PDF
    DM74LS11 Unknown TTL Data Book 1980 Scan PDF
    DM74LS112 Unknown TTL Data Book 1980 Scan PDF
    DM74LS112A Fairchild Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs Original PDF
    DM74LS112A National Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs Original PDF
    DM74LS112ACW Fairchild Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop Original PDF
    DM74LS112AM Fairchild Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop Original PDF
    DM74LS112AM Fairchild Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs Scan PDF
    DM74LS112AM Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    DM74LS112AM National Semiconductor DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET CLEAR and COMPLEMENTARY OUTPUTS Scan PDF
    DM74LS112AM National Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs Scan PDF
    DM74LS112AMX Fairchild Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop Original PDF
    DM74LS112AN Fairchild Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs Original PDF
    DM74LS112AN Fairchild Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs Scan PDF
    DM74LS112AN Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    DM74LS112AN National Semiconductor DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET CLEAR and COMPLEMENTARY OUTPUTS Scan PDF
    DM74LS112AN National Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs Scan PDF
    DM74LS112ANX Fairchild Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Output Original PDF
    DM74LS113 Unknown TTL Data Book 1980 Scan PDF

    DM74LS11 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LS11

    Abstract: MK2870-10N05 DM74LS11 DM74LS11M DM74LS11N M14A MS-001 N14A
    Text: Revised March 2000 DM74LS11 Triple 3-Input AND Gate General Description This device contains three independent gates each of which performs the logic AND function. Ordering Code: Order Number Package Number Package Description DM74LS11M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, 0.150 Narrow


    Original     		PDF DM74LS11 DM74LS11M 14-Lead MS-120, DM74LS11N MS-001, 74LS11 MK2870-10N05 DM74LS11 DM74LS11M DM74LS11N M14A MS-001 N14A

    Untitled

    Abstract: No abstract text available
    Text: 54LS11,DM54LS11,DM74LS11 54LS11 DM54LS11 DM74LS11 Triple 3-Input AND Gates Literature Number: SNOS279A 54LS11 DM54LS11 DM74LS11 Triple 3-Input AND Gates General Description Features This device contains three independent gates each of which performs the logic AND function


    Original     		PDF 54LS11 DM54LS11 DM74LS11 DM74LS11 SNOS279A

    dm74ls112an

    Abstract: 54LS112 54LS112DMQB 54LS112FMQB 54LS112LMQB DM54LS112A DM54LS112AJ DM54LS112AW DM74LS112A DM74LS112AM
    Text: 54LS112 DM54LS112A DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs The J and


    Original     		PDF 54LS112 DM54LS112A DM74LS112A dm74ls112an 54LS112DMQB 54LS112FMQB 54LS112LMQB DM54LS112AJ DM54LS112AW DM74LS112A DM74LS112AM

    74LS112

    Abstract: N16E DM74KS112AM DM74LS112A DM74LS112AN M16A MS-001 DS006382
    Text: Revised March 2000 DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and


    Original     		PDF DM74LS112A DM74LS112A 74LS112 N16E DM74KS112AM DM74LS112AN M16A MS-001 DS006382

    DM74LS11N

    Abstract: 54LS11 54LS11DMQB 54LS11FMQB 54LS11LMQB DM54LS11 DM54LS11J DM54LS11W DM74LS11 DM74LS11M
    Text: 54LS11 DM54LS11 DM74LS11 Triple 3-Input AND Gates General Description Features This device contains three independent gates each of which performs the logic AND function Y Alternate military aerospace device 54LS11 is available Contact a National Semiconductor Sales Office


    Original     		PDF 54LS11 DM54LS11 DM74LS11 54LS11) 54LS11DMQB 54LS11FMQB 54LS11LMQB DM54LS11J DM54LS11W DM74LS11M DM74LS11N 54LS11LMQB

    54LS112

    Abstract: 54LS112DMQB 54LS112FMQB 54LS112LMQB DM54LS112AJ DM54LS112AW DM74LS112A DM74LS112AM DM74LS112AN DM74LS112
    Text: DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the


    Original     		PDF DM74LS112A 54LS112 54LS112DMQB 54LS112FMQB 54LS112LMQB DM54LS112AJ DM54LS112AW DM74LS112A DM74LS112AM DM74LS112AN DM74LS112

    DM74LS11

    Abstract: Fairchild 54LS11 DM74LS11M DM74LS11N 54LS11 54LS11DMQB 54LS11FMQB 54LS11LMQB DM54LS11J DM54LS11W
    Text: DM74LS11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which performs the logic AND function. Features n Alternate military/aerospace device 54LS11 is available. Contact a Fairchild Semiconductor Sales


    Original     		PDF DM74LS11 54LS11) DS006350-1 54LS11DMQB, 54LS11FMQB, 54LS11LMQB, DM54LS11J, DM54LS11W, DM74LS11M DM74LS11N DM74LS11 Fairchild 54LS11 DM74LS11N 54LS11 54LS11DMQB 54LS11FMQB 54LS11LMQB DM54LS11J DM54LS11W

    master slave jk flip flop

    Abstract: ECL D flip flop Flip Flop DIP Flip flop JK cmos 74lvt16374 d flip flop d type flip flop flip flop flip flop circuit flip flop circuit type D
    Text: Logic Products by Function Flip-Flop Products Logic Product Family Product Description Package Voltage Node 74ACT109 FACT ACT Dual JK Positive Edge-Triggered Flip-Flop DIP SOIC TSSOP 5 DM74LS73A Bipolar-LS Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary


    Original     		PDF 74ACT109 DM74LS73A MM74C73 74AC74 74ACT74 74ACTQ74 16-Bit 74VCXH162374 SCAN182374A master slave jk flip flop ECL D flip flop Flip Flop DIP Flip flop JK cmos 74lvt16374 d flip flop d type flip flop flip flop flip flop circuit flip flop circuit type D

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


    Original     		PDF SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N

    74LS112AN

    Abstract: 74LS112AM
    Text: I R C H I L D S E M I C O N D U C T O R TM DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains tw o independent negative-edge-triggered J-K flip-flops w ith com plem entary


    OCR Scan     		PDF DM74LS112A DM74LS112A 74LS112AN 74LS112AM

    dm74 Series

    Abstract: 63821 54LS112 54LS112DMQB 54LS112FMQB DM54LS112AJ DM54LS112AW DM74 DM74LS112AN LS112AM
    Text: LS112A National Semiconductor 54LS112/DM54LS112A/DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS112/DM54LS112A/DM74LS112A dm74 Series 63821 54LS112 54LS112DMQB 54LS112FMQB DM54LS112AJ DM54LS112AW DM74 DM74LS112AN LS112AM

    54LS11

    Abstract: 54LS11DMQB 54LS11FMQB 54LS11LMQB DM54LS11 DM54LS11W DM74LS11 DM74LS11M DM74LS11N E20A
    Text: S E M IC O N D U C T O R tm DM74LS11 Triple 3-Input AND Gates General Description T h is d e v ic e c o n ta in s th re e in d e p e n d e n t g a te s e a c h o f w h ic h p e rfo rm s th e lo g ic A N D fu n c tio n . Features • A lte rn a te m ilita ry /a e ro s p a c e d e v ic e 5 4 L S 1 1 is


    OCR Scan     		PDF DM74LS11 54LS11) 54LS11DMQB, 54LS11FMQB, 54LS11LMQB, DM54LS11 DM54LS11W, DM74LS11M DM74LS11N 54LS11 54LS11DMQB 54LS11FMQB 54LS11LMQB DM54LS11W DM74LS11 E20A

    54LS112

    Abstract: 54LS112DMQB 54LS112FMQB 54LS112LMQB DM54LS112AJ DM54LS112AW DM74LS112A DM74LS112AM DM74LS112AN E20A
    Text: S E M IC O N D U C T O R tm DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains tw o independent negative-edge-triggered J-K flip-flops w ith com plem entary


    OCR Scan     		PDF DM74LS112A 54LS112 54LS112DMQB 54LS112FMQB 54LS112LMQB DM54LS112AJ DM54LS112AW DM74LS112A DM74LS112AM DM74LS112AN E20A

    Untitled

    Abstract: No abstract text available
    Text: LS112A National Semiconductor 54LS112/DM54LS112A/DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description violated. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the


    OCR Scan     		PDF LS112A 54LS112/DM54LS112A/DM74LS112A

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74LS11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which perform s the logic A N D function. Features • Alternate m ilitary/aerospace device 54LS11 is available. C ontact a Fairchild Sem iconductor Sales


    OCR Scan     		PDF DM74LS11 54LS11) DSOO6350-1 54LS11DMQB, 54LS11FMQB, 54LS11LMQB, DM54LS11J, DM54LS11W, DM74LS11M

    54ls11

    Abstract: No abstract text available
    Text: June 1989 54LS11/DM54LS11/DM74LS11 Triple 3-Input AND Gates General Description Features This device contains three independent gates each of which performs the logic AND function. • Alternate military/aerospace device 54LS11 is available. Contact a National Semiconductor Sales Office/


    OCR Scan     		PDF 54LS11/DM54LS11/DM74LS11 54LS11) 54LS11DMQB, 54LS11FMQB, 54LS11LMQB, DM54LS11J, DM54LS11W, DM74LS11M DM74LS11N 54ls11

    Untitled

    Abstract: No abstract text available
    Text: & June 1989 54LS112/DM54LS112A/DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS112/DM54LS112A/DM74LS112A

    Untitled

    Abstract: No abstract text available
    Text: R C H U - P S E M IC O N D U C T O R tm DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary


    OCR Scan     		PDF DM74LS112A

    Untitled

    Abstract: No abstract text available
    Text: LS11 01 National itiI Semiconductor 54LS11/DM54LS11/DM74LS11 Triple 3-Input AND Gates General Description Features This device contains three independent gates each of which performs the logic AND function. • Alternate military/aerospace device 54LS11 is avail­


    OCR Scan     		PDF 54LS11/DM54LS11/DM74LS11 54LS11) 54LS11DMQB, 54LS11FMQB, 54LS11LMQB, DM54LS11J, DM54LS11W, DM74LS11M DM74LS11N

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74LS11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which perform s the logic AN D function. Features • Alternate m ilitary/aerospace device 54LS11 is available. C ontact a Fairchild Sem iconductor Sales


    OCR Scan     		PDF DM74LS11 54LS11) DS006S50-1 54LS11DMQB, 54LS11FMQB, 54LS11LMQB, DM54LS11J, DM54LS11W, DM74LS11M

    54LS11

    Abstract: 54LS11DMQB 54LS11FMQB 54LS11LMQB DM54LS11J DM54LS11W DM74LS11M DM74LS11N E20A
    Text: , June 1989 54LS11/DM54LS11/DM74LS11 Triple 3-Input AND Gates General Description Features This device contains three independent gates each of which performs the logic AND function. • Alternate military/aerospace device 54LS11 is available. Contact a National Semiconductor Sales Office/


    OCR Scan     		PDF 54LS11/DM54LS11/DM74LS11 54LS11) TL/F/6350-1 54LS11DMQB, 54LS11FMQB, 54LS11LMQB, DM54LS11J, DM54LS11W, DM74LS11M DM74LS11N 54LS11 54LS11DMQB 54LS11FMQB 54LS11LMQB DM54LS11J DM54LS11W E20A

    DM54

    Abstract: DM74 DM74LS113A FTHA
    Text: DM54LS113A/DM74LS113A National Semiconductor DM54LS113A/DM74LS113A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset and Complementary Outputs General Description Absolute Maximum Ratings Note d T h is d e vice c o n ta in s tw o in d e p e n d e n t neg a tive -ed g e trig g e re d J-K flip -flo p s w ith c o m p le m e n ta ry o u tp u ts .


    OCR Scan     		PDF DM54LS113A/DM74LS113A 25Vand 25Vfor DM54 DM74 DM74LS113A FTHA

    O406

    Abstract: 54LS112 54LS112DMQB 54LS112FMQB 54LS112LMQB DM54LS112AJ DM54LS112AW DM74LS112AM DM74LS112AN E20A
    Text: June 1989 54LS112/DM54LS112A/DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS112/DM54LS112A/DM74LS112A O406 54LS112 54LS112DMQB 54LS112FMQB 54LS112LMQB DM54LS112AJ DM54LS112AW DM74LS112AM DM74LS112AN E20A

    dm8130

    Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
    Text: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408


    OCR Scan     		PDF 54H00 54L00 54LS00 54H01 54L01 54LS01 54L02 54LS02 54L03 54LS03 dm8130 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76