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    DECODER 4081 Search Results

    DECODER 4081 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    HC9P55564-5 Rochester Electronics LLC CVSD Codec, CVSD, 1-Func, PDSO16, Visit Rochester Electronics LLC Buy
    HC1-55564-9 Rochester Electronics LLC CVSD Codec, CVSD, 1-Func, CDIP14, Visit Rochester Electronics LLC Buy
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    9317CDC Rochester Electronics LLC 9317 - Decoder/Driver, TTL, CDIP16 Visit Rochester Electronics LLC Buy
    AM25LS2548DM/R Rochester Electronics LLC AM25LS2548 - Chip Select Address Decoder with Acknowledge Visit Rochester Electronics LLC Buy

    DECODER 4081 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    HD74AC139

    Abstract: HD74ACT139 Hitachi DSA00348
    Text: HD74AC139/HD74ACT139 Dual 1-of-4 Decoder/Demultiplexer Description The HD74AC139/HD74ACT139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually-exclusive active-Low


    Original     		PDF HD74AC139/HD74ACT139 HD74AC139/HD74ACT139 HD74ACT139 HD74AC139 Hitachi DSA00348

    DECODER

    Abstract: HD74AC138 HD74ACT138 Hitachi DSA00395
    Text: HD74AC138/HD74ACT138 1-of-8 Decoder/Demultiplexer Description The HD74AC138/HD74ACT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow


    Original     		PDF HD74AC138/HD74ACT138 HD74AC138/HD74ACT138 1-of-24 1-of-32 HD74ACT138 DECODER HD74AC138 Hitachi DSA00395

    HD74AC538

    Abstract: Hitachi DSA00396
    Text: HD74AC538 1-of-8 Decoder with 3-State Output Description The HD74AC538 decoder/demultiplexer accepts three Address A0 to A2 input signal and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the


    Original     		PDF HD74AC538 HD74AC538 1-of-32 1-of-16 Hitachi DSA00396

    rfu20

    Abstract: fds 4916 IC 7490 pin configuration internal diagram of 7490 IC ic 7490 pin diagram HITACHI cofdm RFU-21 decode counter 7490 Philips ECG 152 IC 7490
    Text: SH7490 DAB Digital Baseband Decoder ADE-202-077A Rev. 1.0 18 Mar. 1999 Overview The SH7490 is a digital audio broadcasting DAB digital baseband decoder providing a low cost, highly integrated solution for consumer DAB receivers, according to the ETS 300 401 standard [1].


    Original     		PDF SH7490 ADE-202-077A SH7490 001\DESKTOP\H1HTD0 rfu20 fds 4916 IC 7490 pin configuration internal diagram of 7490 IC ic 7490 pin diagram HITACHI cofdm RFU-21 decode counter 7490 Philips ECG 152 IC 7490

    LT 735

    Abstract: HD74HC4511 Hitachi DSA00389
    Text: HD74HC4511 BCD-to-Seven Segment Latch/Decoder/Driver Description The HD74HC4511 provides the functions of a 4-bit storage latch, a BCD-to-seven-segment decoder, and an output driver. Lamp test LT , blanking (BI), and latch enable (LE) inputs are used to test the display, to


    Original     		PDF HD74HC4511 HD74HC4511 LT 735 Hitachi DSA00389

    HD74HC4515

    Abstract: d3s9
    Text: HD74HC4515 4-bit Latch/4-to-16-line Decoder Description This device presents 4-to-16 line decoder with latched inputs. The HD74HC4515 presents a low level at the selected output. This device consists of four storage latches with common strobe and inhibit G inputs. When a low signal


    Original     		PDF HD74HC4515 Latch/4-to-16-line 4-to-16 HD74HC4515 d3s9

    HD74HCT137

    Abstract: Hitachi DSA00395
    Text: HD74HCT137 3-to-8-line Decoder/Demultiplexer with Address Latch Description The HD74HCT137 implements a three-to-eight line decoder with latches on the three address inputs. When GL goes from low to high, the address present at the select inputs A, B and C is stored in the


    Original     		PDF HD74HCT137 HD74HCT137 Hitachi DSA00395

    HD74HC4543

    Abstract: Hitachi DSA00396
    Text: HD74HC4543 BCD-to-Seven Segment Latch/Decoder/Driver Description This circuit contains a 4-bit latch, BCD-to-7 segment decoder, and 7 outpt drivers. Data on the input pins flow through to the output when the Latch Disable LE is high and is latched on the high to low transition


    Original     		PDF HD74HC4543 HD74HC4543 Hitachi DSA00396

    HD74HC137

    Abstract: Hitachi DSA00395
    Text: HD74HC137 3-to-8-line Decoder/Demultiplexer with Address Latch Description The HD74HC137 implements a three-to-eight line decoder with latches on the three address inputs. When GL goes from low to high, the address present at the select inputs A, B and C is stored in the latches. As


    Original     		PDF HD74HC137 HD74HC137 Hitachi DSA00395

    HD74HC4514

    Abstract: Hitachi DSA00333
    Text: HD74HC4514 4-bit Latch/4-to-16-line Decoder Description This device presents a 4-to-16 line decoder with latched in puts. The HD74HC4514 presents a high level at the selected output. This device consists of four storage latches with common strobe and inhibit G inputs. When a low signal


    Original     		PDF HD74HC4514 Latch/4-to-16-line 4-to-16 HD74HC4514 Hitachi DSA00333

    HD74AC4514

    Abstract: HD74HC4514 s01114 Hitachi DSA00385
    Text: HD74AC4514 4-bit Latch/4-to-16-Line Decoder Description This device presents a 4 to 16 line decoder with latched inputs. The HD74AC4514 presents a high level at the selected output. This device consists of four storage latches with common strobe and inhibit G inputs. When a low signal


    Original     		PDF HD74AC4514 Latch/4-to-16-Line HD74AC4514 HD74HC4514 s01114 Hitachi DSA00385

    HD74AC539

    Abstract: Hitachi DSA00333
    Text: HD74AC539 Dual 1-of-4 Decoder with 3-State Output Description The HD74AC539 contains two inpedendent decoders. Each accepts two Address A 0, A1 input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P) determines


    Original     		PDF HD74AC539 HD74AC539 Hitachi DSA00333

    HD74HCT238

    Abstract: DSA003728
    Text: HD74HCT238 3-to-8-line Decoder/Demultiplexer Description The HD74HCT238 has 3 binary select inputs A, B, and C . If the device is enabled these inputs determined which one of the eight normally high outputs will go low. Two active low and one active high


    Original     		PDF HD74HCT238 HD74HCT238 DSA003728

    HD74LV138A

    Abstract: Hitachi DSA00398
    Text: HD74LV138A 3-to-8 line Decoder / Demultiplexers ADE-205-261 Z 1st Edition March 1999 Description The HD74LV138A is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. The conditions at the binary-select inputs and


    Original     		PDF HD74LV138A ADE-205-261 HD74LV138A 24-line 32-line Hitachi DSA00398

    HD74HCT137

    Abstract: HD74HCT237 Hitachi DSA003733
    Text: HD74HCT237 3-to-8-line Decoder/Demultiplexer with Address Latch Description The HD74HCT237 decodes a three-bit Address to one-of-eight active-high outputs. The device has a transparent latch for storage of the Address. Two Chip Selects, one active-low and one active-high, are


    Original     		PDF HD74HCT237 HD74HCT237 HD74HCT137. HD74HCT137 Hitachi DSA003733

    HD74HC137

    Abstract: HD74HC237 Hitachi DSA00387
    Text: HD74HC237 3-to-8-line Decoder/Demultiplexer with Address Latch Description The HD74HC237 decodes a three-bit Address to one-of-eight active-high outputs. The device has a transparent latch for storage of the Address. Two Chip Selects, one active-low and one active-high, are


    Original     		PDF HD74HC237 HD74HC237 HD74HD237 HD74HC137. HD74HC137 Hitachi DSA00387

    HD74HCT138

    Abstract: No abstract text available
    Text: HD74HCT138 3-to-8-line Decoder/Demultiplexer Description The HD74HCT138 has 3 binary select inputs A, B, and C . If the device is enabled these inputs determine which one of the eight normally high outputs will go low. Two active low and one active high enables (G1,


    Original     		PDF HD74HCT138 HD74HCT138

    HD74HC138

    Abstract: Hitachi DSA003745
    Text: HD74HC138 3-to-8-line Decoder/Demultiplexer Description The HD74HC138 has 3 binary select inputs A, B and C . If the device is enabled these inputs determine which one of the eight normally high outputs will go low. Two active low and one active high enables (G1,


    Original     		PDF HD74HC138 HD74HC138 Hitachi DSA003745

    HD74HC238

    Abstract: Hitachi DSA00397
    Text: HD74HC238 3-to-8-line Decoder/Demultiplexer Description The HD74HC238 has 3 binary select inputs A, B and C . If the device is enabled these inputs determine which one of the eight normally high outputs will go low. Two active low and one active high enables (G1,


    Original     		PDF HD74HC238 HD74HC238 Hitachi DSA00397

    HD74LV139A

    Abstract: DSA003634
    Text: HD74LV139A Dual 2-to-4 line Decoder / Demultiplexers ADE-205-262 Z 1st Edition March 1999 Description The HD74LV139A is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. The active-low enable input can be used as a


    Original     		PDF HD74LV139A ADE-205-262 HD74LV139A DSA003634

    HD74HC131

    Abstract: DSA003716
    Text: HD74HC131 3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers Description The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs A,B,C and D type register. Address select data store to D type registers, during the positive going transition of the clock pulse.


    Original     		PDF HD74HC131 HD74HC131 DSA003716

    HD74HC42

    Abstract: Hitachi DSA00396
    Text: HD74HC42 BCD-to-Decimal Decoder Description Data on the four input pins select one of the 10 outputs corresponding to the value of the BCD number on the inputs. An output will go low when selected, otherwise it remains high. If the input data is not a valid


    Original     		PDF HD74HC42 HD74HC42 Hitachi DSA00396

    Untitled

    Abstract: No abstract text available
    Text: SH7490 DAB Digital Baseband Decoder ADE-202-077A Rev. 1.0 18 Mar. 1999 Overview The SH7490 is a digital audio broadcasting DAB digital baseband decoder providing a low cost, highly integrated solution for consumer DAB receivers, according to the ETS 300 401 standard [1],


    OCR Scan     		PDF SH7490 ADE-202-077A SH7490 scanning730

    MX335L

    Abstract: 8s38
    Text: MX335 MX335L A/VX* COM, INC. DATA BULLETIN CTCSS Preliminary Aoril 1984 ENCODER/DECODER Fea t u r e s : CTCSS * Encodes & Decodes * On-Chip HPF * Meets * Programmable * Choice ElA of 38 CTCSS Attenuates RS220A Tones Tones USA , MPT Tones, Quadpack Crystal


    OCR Scan     		PDF MX335 MX335L RS220A MX335L 8s38