DDXXXXX Search Results

Contextual Info: Standard Products ACT 7000ASC 64-Bit Superscaler Microprocessor January 24, 2005 FEATURES • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance

Contextual Info: ID T 7 9 R 4 7 0 0 6 4 -B it RISC M icro p ro cesso r FEATURES * * Low-power operation 3.3V power supply, forthe “RV” part 5Vpower supply, for the “R” part Dynamic power management Standby mode reduces internal power True 64-bit microprocessor 64-bit integer operations

Contextual Info: System Interface Protocols Chapter 11 Introduction The following sections contain a cycle-by-cycle description of the system interface protocols for each type of R5000 processor and external request. Address and Data Cycles Cycles in which the SysAD bus contains a valid address are called

Contextual Info: LOW-COST EMBEDDED ORION RISC MICROPROCESSOR FEATURES • High-performance embedded 64-bit microprocessor - 64-bit integer operations - 64-bit registers - 100MHz, 133MHz, 150 MHz and 180MHz operation frequency • High-performance DSP capability - 75 Million Integer Multiply-Accumulate Operations/sec

RC64475

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  ◆ Implements MIPS-III Instruction Set Architecture ISA 3.3V I/O ◆ Software compatible with entire RISController Series of Embedded Microprocessors

IDT79RV4700

Abstract: R3051 R3052 R3081 R36100 R4650 R5000
Contextual Info: Integrated Device Technology, Inc. IDT79RV4700 RISC Processor Hardware User’s Manual Version 2.1 December 1997 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 492-8674 Printed in U.S.A. 1997 Integrated Device Technology, Inc.

RM5261

Abstract: R4000 R4650 R5000 RM5200 RM5231
Contextual Info: RM5261 Microprocessor with 64-Bit System Bus Data Sheet Released RM5261 RM5261™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Issue 1, March 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

R4000

Abstract: RM5200 RM5261A
Contextual Info: RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary RM5261A™ RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Preliminary Issue 1, March 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

R4000

Abstract: RM5200 RM5261A
Contextual Info: RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary RM5261A™ RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Preliminary Issue 2, September 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

qed rm5200

Contextual Info: RM5271 Microprocessor with External Cache Interface Document Rev. 1.3 Date: 02/2000 FEATURES • High-performance floating point unit - up to 700 MFLOPS — Single cycle repeat rate for common single precision operations and some double precision operations

zHM003

Abstract: RC32364 RC4640 RC4650 RC5000 RC64474 RC64475 RC64575 PQFP-128 footprint 0464c
Contextual Info: RC64574 RC64575™ Advanced 64-bit Microprocessors Product Family Preliminary Information* Featur tures ◆ Big- or Little-endian capability RC5000 compatible memory management – On-chip 48-entry, 96-page TLB, for advanced operating system support – Compatible with major operating systems:

79RC64

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 ◆ Implements MIPS-III Instruction Set Architecture ISA 3.3V with 5V tolerant I/O ◆ Software compatible with entire RISController Series of

MA2810

Abstract: idt79rc64t575 PQFP-128 footprint
Contextual Info: 79RC64574 79RC64575™ Advanced 64-bit Microprocessors Product Family Features Big- or Little-endian capability RC5000 compatible memory management – On-chip 48-entry, 96-page TLB, for advanced operating system support – Compatible with major operating systems:

74FCT520

Abstract: IDT79R4000 IDT73200 MIPS R4000 R3000 R3051 R3052 R3081 R4000 mips r4000 block diagram
Contextual Info: DESIGNING READ AND WRITE BUFFERS FOR THE R4000 SYSTEM INTERFACE APPLICATION NOTE AN-114 Integrated Device Technology, Inc. By Andrew Ng INTRODUCTION THE R4000 MICROPROCESSOR This article describes the basic concepts behind designing with the IDT79R4000 System Interface. The System Interface

Contextual Info: RC64474 RC64475™ Prelim inary RISController™ Embedded 64-bit Microprocessor, based on RISCore4000™ Features Implements MIPS-III Instruction Set Architecture ISA 3.3V I/O * High performance 64-bit microprocessor, based on the RISCore4000 Minimized branch and load delays, through streamlined

Contextual Info: RC64474 RC64475™ Prelim inary RISController™ Embedded 64-bit Microprocessor, based on RISCore4000™ Features * Im plem ents M IP S -III Instruction S e t A rch ite cture ISA 3 .3 V I/O High p e rfo rm a n ce 6 4 -b it m icroprocessor, b a se d on the

MIPS R4X00 16-bit

Contextual Info: ORÏON EMBEDDED 64-BIT RISC ORION MICROPROCESSOR FEATURES: IDT79R4650 Preliminary • Low-power operation - Less than 2W peak internal power at 100MHz - Active power management powers-down inactive units - Standby mode power consumption <200mW • Upward software compatible with IDT RISController Family

RC64475

Abstract: RC32364 RC4640 RC4650 RC64474 RC64575 pinout socket 754
Contextual Info: RC64474 RC64475™ RISControllerTM Embedded 64-bit Microprocessor, based on RISCore4000TM Features Software compatible with entire RISController Series of Embedded Microprocessors ◆ Industrial temperature range support ◆ Active power management – Powers down inactive units, through sleep-mode feature

ACT7000ASC

Contextual Info: ACT-7000ASC 64-Bit Superscaler Microprocessor Features • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance ● ● ■ ● ● ●

uPD30412L

Abstract: UPD30412LRJ250
Contextual Info: CHAPTER 1 1.1 G EN ERA L Introduction The /j PD30412, 30412L V r4400MC processor supports interfaces to secondary cache, system interlace, and boot time mode control. This document describes the connection and operation of each of these interfaces. Remark

Contextual Info: CHAPTER 4 SYSTEM INTERFACE The system interface allows the processor access to external resources required to satisfy cache misses while also allowing an external agent access to certain processor internal resources. In the Vr4400MC, the system interface also provides the processor mechanisms with which to maintain the cache coherency of shared data, while providing

Contextual Info: DATA SH EET MOS INTEGRATED CIRCUIT ¿¿PD 3 0 4 1 2 , 30412L VR4400M C 64-BIT M ICRO PRO CESSO R The Vr4400MC is one of the NEC's Vr series™ RISC Reduced Instruction Set Computer type micro­ processors. It is a high-performance 64-bit microprocessor which uses the RISC architecture developed by

4000SC

Contextual Info: UPD30401 V R 4000SC 64-Bit Microprocessor Preliminary Hardware User's Manual Publication ID: IEU-1331 Publication Date: December 1, 1992 Company: N E C ELECTRONICS INC Th is title page is provided as a service by Inform ation Handling S ervices and displays

79R3051

Abstract: IDT79R3000 IDT79R4700 R3052 R3081 R4700
Contextual Info: IDT79R4700 64-Bit RISC Microprocessor Features Available at 80-200MHz, with mode bit dependent output clock frequencies ◆ 64GB physical address space ◆ Processor family for a wide variety of embedded applications – LAN switches – Routers – Color printers