SS14 DIODE schottky
Abstract: smb diode ss14 SS14 melf battery charger ss14 UPS5817 MCC01 SK12 SK14 SS14 UPS5819
Text: Winter 1997-1998 continued BIAS 1 ANTENNA BIAS 2 RFC DCB DCB TX RX D1 Figure 2 Broadband Antenna Switch R handset applications where battery power management is an extremely critical issue with circuit designers. The UPP 1000 series PIN diodes are available with Reverse Breakdown
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UPP1000
UPS5817
UPS5819
MCC01
SS14 DIODE schottky
smb diode ss14
SS14 melf
battery charger ss14
UPS5817
SK12
SK14
SS14
UPS5819
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CBC819-DF-9-dcb
Abstract: dcb 940 CBC819-DF
Text: Product Specifications CBC819-DF-9-DCB Material ID: CBC819-DF-9-DCB Crossband Coupler, Cellular/PCS CHARACTERISTICS Electrical Specifications 3rd Order IMD Test Method Two +43 dBm carriers 3rd Order IMD, typical 107 dBm dc Passthrough
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CBC819-DF-9-DCB
CBC819-DF-9-DCB
dcb 940
CBC819-DF
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M5 DIODE 22-35
Abstract: 150-04DA fred module
Text: Fast Recovery Epitaxial Diode FRED Module MEK 150-04 DA VRRM = 400 V IFAV = 150 A trr = 300 ns Preliminary data 3 VRSM VRRM V V 400 400 Symbol 1 Type 2 3 TO-240 AA 2 1 MEK 150-04DA Conditions Maximum Ratings Features International standard package with DCB ceramic base plate
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150-04DA
O-240
D-68623
M5 DIODE 22-35
fred module
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IXFd50n20
Abstract: IXGD32N60B IXFD75N10 IXTD5N100 IXTH40N25 91x0 IXGH25N120A IXTD5N100-5T IXGD32N60B-5X IXGD8N100-2L
Text: Chips and DCB Ceramic Substrates Contents Page General Information for Chips IGBT Chips J-2 VCES IC VCE sat G-Series, Low VCE(sat) type G-Series, High Speed type 600 - 1200 V 600 - 1200 V 10 - 60 A 10 - 100 A 1.8 - 3.5 V 2.5 - 4.0 V J-3 S-Series, Low VCE(sat) type
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MAX9213ETM
Abstract: No abstract text available
Text: 19-2828; Rev 1; 7/03 Programmable DC-Balanced 21-Bit Serializers Features ♦ Programmable DC-Balanced or Non-DC-Balanced Operation ♦ DC Balance Allows AC-Coupling for Ground-Shift Tolerance ♦ As Low as 8MHz Operation Two frequency ranges and two DC-balance default
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21-Bit
MAX9209/MAX9211/MAX9213/MAX9215
MAX9210/
MAX9212/MAX9214/MAX9216
T4877-1
MAX9213ETM
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UTP cat 6 cable
Abstract: No abstract text available
Text: 19-2828; Rev 5; 3/12 KIT ATION EVALU E L B A IL AVA Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9213 serialize 21 bits of LVTTL/ LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides
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21-Bit
DS90CR215
DS90CR217
785Gbps
TIA/EIA-644
48-Lead
3AX9215.
UTP cat 6 cable
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MAX9242EUM
Abstract: MAX9242 MAX9246
Text: 19-3954; Rev 2; 6/07 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance Features The MAX9242/MAX9244/MAX9246/MAX9254 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs. A separate parallel-rate LVDS clock
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21-Bit
MAX9242/MAX9244/MAX9246/MAX9254
MAX9242/
MAX9244/MAX9246/MAX9254
32kHCE
MAX9242EUM
MAX9242
MAX9246
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direct sequence spread spectrum
Abstract: 150pf 6kv MAX9209 MAX9213 MAX9242 MAX9246
Text: 19-3954; Rev 0; 1/06 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance The MAX9242/MAX9244/MAX9246 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs. A separate parallel-rate LVDS clock provides the timing for deserialization. The MAX9242/
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21-Bit
MAX9242/MAX9244/MAX9246
MAX9242/
MAX9244/MAX9246
MAX9242/MAX9244/
MAX9246
32kHz
33MHz
direct sequence spread spectrum
150pf 6kv
MAX9209
MAX9213
MAX9242
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Untitled
Abstract: No abstract text available
Text: 19-3954; Rev 4; 7/09 KIT ATION EVALU E L B A AVAIL 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance Features The MAX9242/MAX9244/MAX9246/MAX9254 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A separate parallel-rate LVDS clock
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21-Bit
MAX9242/MAX9244/MAX9246/MAX9254
MAX9242/
MAX9244/MAX9246/MAX9254
MAX9242/MAX9244/MAX9246/MAX9254
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Untitled
Abstract: No abstract text available
Text: 19-3954; Rev 1; 10/06 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance Features The MAX9242/MAX9244/MAX9246/MAX9254 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs. A separate parallel-rate LVDS clock
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21-Bit
MAX9242/MAX9244/MAX9246/MAX9254
MAX9242/
MAX9244/MAX9246/MAX9254
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PDF
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Untitled
Abstract: No abstract text available
Text: 19-2828; Rev 5; 3/12 KIT ATION EVALU E L B A IL AVA Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9213 serialize 21 bits of LVTTL/ LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides
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21-Bit
MAX9209/MAX9213
MAX9210/MAX9214
21-bit
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DS90CR215
Abstract: DS90CR217 MAX9209 MAX9209ETM MAX9209EUM MAX9210 MAX9211 MAX9213ETM
Text: 19-2828; Rev 0; 4/03 Programmable DC-Balance 21-Bit Serializers Features ♦ Programmable DC-Balanced or Non-DC-Balanced Operation ♦ DC Balance Allows AC-Coupling for Ground-Shift Tolerance ♦ As Low as 8MHz Operation Two frequency ranges and two DC-balance default
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21-Bit
785Gbps
MAX9209/MAX9211/MAX9213/MAX9215
DS90CR215
DS90CR217
NonDC1-0144
MAX9209/MAX9211/MAX9213/MAX9215
DS90CR217
MAX9209
MAX9209ETM
MAX9209EUM
MAX9210
MAX9211
MAX9213ETM
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DS90CR216A
Abstract: DS90CR218A MAX9210 MAX9215 MAX9222
Text: 19-2864; Rev 4; 3/05 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.
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21-Bit
MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/
MAX9222
MAX9209/MAX9211/MAX9213/
MAX9215
MAX9210/MAX9212/MAX9214/MAX9216
DS90CR216A
DS90CR218A
MAX9210
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MAX9220EUM
Abstract: No abstract text available
Text: 19-2864; Rev 1; 10/03 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 feature programmable DC balance, which allows isolation between a serializer and deserializer using AC-coupling. A deserializer decodes data transmitted by a MAX9209/MAX9211/MAX9213/MAX9215
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MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/
MAX9222
MAX9209/MAX9211/MAX9213/MAX9215
MAX9210/MAX9212/MAX9214/MAX9216
DS90CR216A
DS90CR218A.
MAX9220/MAX9222
non-DC-balanMAX9220/MAX9222
MAX9220EUM
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DS90CR215
Abstract: DS90CR217 MAX9209 MAX9209ETM MAX9209EUM MAX9209GUM MAX9213 marking code 56l MAX9213ETM
Text: 19-2828; Rev 4; 10/07 Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9213 serialize 21 bits of LVTTL/ LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization.
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MAX9209/MAX9213
MAX9210/MAX9214
21-bit
DS90CR215
DS90CR217.
MAX9211
MAX9215.
DS90CR217
MAX9209
MAX9209ETM
MAX9209EUM
MAX9209GUM
MAX9213
marking code 56l
MAX9213ETM
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DS90CR215
Abstract: DS90CR217 MAX9209 MAX9209ETM MAX9209EUM MAX9209GUM MAX9213 marking aaa MAX9213ETM
Text: 19-2828; Rev 4; 10/07 KIT ATION EVALU E L B AVAILA Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9213 serialize 21 bits of LVTTL/ LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides
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21-Bit
MAX9209/MAX9213
MAX9210/MAX9214
21-bit
MAX9211
MAX9215.
MAX9209/MAX9213
DS90CR215
DS90CR217
MAX9209
MAX9209ETM
MAX9209EUM
MAX9209GUM
MAX9213
marking aaa
MAX9213ETM
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DS90CR216A
Abstract: DS90CR218A MAX9210 MAX9222 MAX9220EUM
Text: 19-2864; Rev 1; 8/03 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 feature programmable DC balance, which allows isolation between a serializer and deserializer using AC-coupling. A deserializer decodes data transmitted by a MAX9209/MAX9211/MAX9213/MAX9215
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MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/
MAX9222
MAX9209/MAX9211/MAX9213/MAX9215
MAX9210/MAX9212/MAX9214/MAX9216
DS90CR216A
DS90CR218A.
MAX9220/MAX9222
0/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222
DS90CR218A
MAX9210
MAX9220EUM
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DS90CR216A
Abstract: DS90CR218A MAX9210ETM MAX9210EUM MAX9212ETM
Text: 19-2864; Rev 0; 4/03 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216 feature programmable DC balance, which allows isolation between serializer and deserializer using AC-coupling. A deserializer decodes data transmitted by a
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MAX9210/MAX9212/MAX9214/MAX9216
MAX9209/MAX9211/MAX9213/MAX9215
DS90CR216A
DS90CR218A.
MAX9210/MAX9212)
MAX9210/MAX9212/MAX9214/MAX9216
DS90CR218A
MAX9210ETM
MAX9210EUM
MAX9212ETM
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DS90CR216A
Abstract: DS90CR218A MAX9210EUM
Text: 19-2864; Rev 5; 11/07 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9214/MAX9220/MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing
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21-Bit
MAX9210/MAX9214/MAX9220/MAX9222
MAX9209/MAX9213
MAX9210/MAX9214
MAX9212/MAX9216
MAX9210/MAX9214/MAX9220/MAX9222
DS90CR216A
DS90CR218A
MAX9210EUM
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PDF
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Untitled
Abstract: No abstract text available
Text: 19-2864; Rev 5; 11/07 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9214/MAX9220/MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing
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21-Bit
MAX9210/MAX9214/MAX9220/MAX9222
MAX9209/MAX9213
MAX9210/MAX9214
MAX9212/MAX9216
MAX9210/MAX9214/MAX9220/MAX9222
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150pf 6kv
Abstract: MAX9242 MAX9242EUM MAX9246
Text: 19-3954; Rev 3; 2/09 KIT ATION EVALU E L B A AVAIL 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance Features The MAX9242/MAX9244/MAX9246/MAX9254 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs. A separate parallel-rate LVDS clock
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Original
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21-Bit
MAX9242/MAX9244/MAX9246/MAX9254
MAX9242/
MAX9244/MAX9246/MAX9254
MAX9242/MAX9244/MAX9246/MAX9254
150pf 6kv
MAX9242
MAX9242EUM
MAX9246
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PDF
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150pf 6kv
Abstract: MAX9242 MAX9242EUM MAX9246
Text: 19-3954; Rev 4; 7/09 KIT ATION EVALU E L B A AVAIL 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance Features The MAX9242/MAX9244/MAX9246/MAX9254 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs. A separate parallel-rate LVDS clock
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Original
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21-Bit
MAX9242/MAX9244/MAX9246/MAX9254
MAX9242/
MAX9244/MAX9246/MAX9254
MAX9242/MAX9244/MAX9246/MAX9254
150pf 6kv
MAX9242
MAX9242EUM
MAX9246
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PDF
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DS90CR215
Abstract: DS90CR217 MAX9209 MAX9209ETM MAX9209EUM MAX9210 MAX9211 MAX9213ETM
Text: 19-2828; Rev 2; 2/04 Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9211/MAX9213/MAX9215 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization.
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21-Bit
MAX9209/MAX9211/MAX9213/MAX9215
MAX9210/
MAX9212/MAX9214/MAX9216
DS90CR215
DS90CR217
MAX9209
MAX9209ETM
MAX9209EUM
MAX9210
MAX9211
MAX9213ETM
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Power MOSFET Wafer
Abstract: No abstract text available
Text: Chips and DCB Ceramic Substrates Power Semiconductor Chips The most important features of the planar technology are: IXYS has a wide range of chips for many electronic circuits: IGBTs, MOSFETs, FREDs, Rectifiers and Thyristors: - no PN junction term ination in the
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