escc 3201
Abstract: dbit 70 4s DBIT Microspire SMD Microspire Microspire dbit 70 4s Microspire transformer MIL-STD-1553 dbit P400 S400
Text: 21 MIL-STD 1553 Interface Transformers - DBIT x 3 S ECSS-Q-ST-70-02C Applied standards : ESCC 3201 generic specification for space products • Open-circuit impedance greater than 3 kΩ 4 kΩ typical value from 75 KHz to 1 MHz • Frequency range 75 KHz to 1 MHz
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ECSS-Q-ST-70-02C
escc 3201
dbit 70 4s
DBIT
Microspire SMD
Microspire
Microspire dbit 70 4s
Microspire transformer
MIL-STD-1553 dbit
P400
S400
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MIL-STD-1553 dbit
Abstract: dbit 70 4s DBIT 49/Microspire dbit 70 4s DBIT 70 7P400 smd code marking LP Microspire dbit 70 4s
Text: 21 MIL-STD 1553 Interface Transformers - DBIT x 3 S • • • • ECSS-Q-70-02 Open-circuit impedance greater than 3 kΩ 4 kΩ typical value from 75 KHz to 1 MHz Frequency range 75 KHz to 1 MHz Operating temperature range : - 55 °C to + 125 °C Weight : 3 to 3.5 grams
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ECSS-Q-70-02
UL94V0
MIL-STD-1553 dbit
dbit 70 4s
DBIT
49/Microspire dbit 70 4s
DBIT 70
7P400
smd code marking LP
Microspire dbit 70 4s
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Microspire transformer
Abstract: Microspire MTLM-2056 Transformers MSCI 10000 SESI 91 MPCI 233 100 000 G 10 en61558 Microspire SMD SMD Transistor dj rm ct08 series smd marking m11
Text: lo o n Wound Magnetics Experts ch d u e T ro l P ia r to t n s u sig d e n D I m d o n a Fr e d ra G gh i H ace p S Aer s e i g io ct tics u a on ® e nc efe D ys a ailw R g Oil in rill ry st ndu D I al c edi M www.microspire.c m n +HDG2IÀFH0LFURVSLUH
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IC SUBSTITUTION
Abstract: RBS 6601
Text: Lucent Technologies Bell Labs Innovations T7631 Dual T1/E1 Long-Haul Terminator Advance Data Sheet November 1997 m i c r o e l e c t r o n i c s gr o up Lucent Technologies Bell Labs Innovations T7631 DualT1/E1 Long-Haul Terminator Features Short-Haul Features
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T7631
IC SUBSTITUTION
RBS 6601
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sb3ca
Abstract: RBS 6601
Text: microelectronics Lucent Technologies Bell Labs Innovations T7630 Dual T1/E1 Short-Haul Terminator Terminator-ll group Preliminary Data Sheet October 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7630 DualT1/E1 Short-Haul Terminator (Terminator-ll)
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T7630
TBR12
TBR13
TR-TSY000009
TSY-000170
GR-253CORE
GR-499-CORE
GR-820CORE
GR-1244-CORE
sb3ca
RBS 6601
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet October 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7630 DualT1/E1 Short-Haul Terminator Terminator-ll Features • Two independent T1/E1 channels each consisting of aT1/E1 short-haul line interface and aT1/E1
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T7630
TR-TSY-000194
005002b
0Q2fl71fl
ZCS47
0050G2b
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Intel i860
Abstract: No abstract text available
Text: INTEL CORP UP/PRPHLS bflE » • 4ñ2bl7S Dia^flSb in te i i860 XR 64-BIT MICROPROCESSOR ■ Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per
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64-BIT
128-Bit
32-Bit
32/64-Bit
80860XR
Intel i860
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T7252
Abstract: No abstract text available
Text: Advance Data Sheet 0 A T & T T7250B User-Network Interface with Enhanced Features for ISDN Terminal Endpoints Enhanced Features Standard Features • Power-down mode of operation less than 7 mW • Supports CCITT I.430/ANSI T1.605 Standard for ISDN 2B+D Basic Access at the S/T reference point
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T7250B
430/ANSI
16-byte
3-02A/04
DS89-083SMOS
T7252
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APC UPS es 500 CIRCUIT DIAGRAM
Abstract: POWER SUPPLY BOARD KL 803 52/B APC Back ES 500 UPS CIRCUIT APC Back ES 500 UPS APC be 500 UPS CIRCUIT DIAGRAM APC Back ES 500 UPS circuit diagram ha 13627 APC UPS CIRCUIT DIAGRAM es 725 SAE Capacitor filter Controlled area network P80CE598
Text: Product specification Philips Semiconductors 8-bit microcontroller with on-chip CAN CONTENTS 1 FEATURES 2 GENERAL DESCRIPTION 2 .1 2 .2 Electromagnetic Compatibility EMC Recommendation on ALE 3 ORDERING INFORMATION 4 BLOCK DIAGRAM 5 PINNING 6 FUNCTIONAL DESCRIPTION
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P8xCE598
APC UPS es 500 CIRCUIT DIAGRAM
POWER SUPPLY BOARD KL 803 52/B
APC Back ES 500 UPS CIRCUIT
APC Back ES 500 UPS
APC be 500 UPS CIRCUIT DIAGRAM
APC Back ES 500 UPS circuit diagram
ha 13627
APC UPS CIRCUIT DIAGRAM es 725
SAE Capacitor filter Controlled area network
P80CE598
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itt capacitor
Abstract: OT112 P8XC552 BST72A CROSS itt canon CB/CA P83CE598FFB 80C51 P80CE598 Clk16MHZ P80CE598FHB
Text: NAPC/PHILIPS SEMICON» bûE D • bbS3T5H O G W i l 31 0 « S I C B Philips Preliminary specification 8-bit microcontroller with on-chip CAN CONTENTS 1 FEATURES 2 GENERAL DESCRIPTION 3 ORDERING INFORMATION
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P8xCE598
itt capacitor
OT112
P8XC552
BST72A CROSS
itt canon CB/CA
P83CE598FFB
80C51
P80CE598
Clk16MHZ
P80CE598FHB
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SA4-13
Abstract: SA5-27 RHS25
Text: Device Advisory October 1999 TFRA08C13 Device Advisory for Version 2.0 of the Device Introduction This advisory refers to version 2.0 of the TFRA08C13 Octal T1/E1 Framer. This advisory addresses the timing issue of the microprocessor interface when FDL registers are accessed. This advisory also introduces guidelines for interfacing TFRA08C13 with processors of the Motorola* M68000 family.
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TFRA08C13
M68000
DS99-039T1E1
DS98-282TIC)
SA4-13
SA5-27
RHS25
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SA4-13
Abstract: AUB-13 EFL 231 m25c22
Text: Lucent Technologies Bell Labs Innovations TFRA08C13 Octal T1/E1 Framer Preliminary Data Sheet November 1998 microelectronics group Lucent Technologies Bell Labs Innovations TFRA08C13 Octal T1/E1 Framer Features Facility Data Link Features • Eight independent T1/E1 transmit and receive
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TFRA08C13
DS99-039T1E1
DS98-282TIC)
SA4-13
AUB-13
EFL 231
m25c22
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V110
Abstract: AM2110
Text: a Preliminary Advanced Micro Devices A m 2110 ISDN Terminal Adapter Circuit ITAC DISTINCTIVE CHARACTERISTICS *• ■ ■ Universal adapter for ISDN R reference point ■ Support of async and sync interfaces: X.21, X.21 bis, V.24, RS232C Automatic calling/answering with on-chip
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Am2110
RS232C
V110
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M25C22
Abstract: SA5-27 SA4-13 SA517 Y32-Y33 Y08-Y09 SA515 SA519 Y18-Y19 Y10-Y11
Text: Preliminary Data Sheet September 2000 TFRA08C13 OCTAL T1/E1 Framer Features • Eight independent T1/E1 transmit and receive framers. ■ Internal DS1 transmit clock synthesis—no external oscillator necessary. ■ Comprehensive alarm reporting and performance
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TFRA08C13
352-pin
DS00-190PDH
DS99-039T1E1)
M25C22
SA5-27
SA4-13
SA517
Y32-Y33
Y08-Y09
SA515
SA519
Y18-Y19
Y10-Y11
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RBS 2202
Abstract: Lucent SLC 2000 4558 X data sheet SA4-13 data sheet ic 7495 B20-B2E HDB3 CODING DECODING FPGA SA5-27 5N26 FRM8 relay datasheet
Text: Preliminary Data Sheet October 2000 TFRA08C13 OCTAL T1/E1 Framer Features • Eight independent T1/E1 transmit and receive framers. ■ Internal DS1 transmit clock synthesis—no external oscillator necessary. ■ Comprehensive alarm reporting and performance
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TFRA08C13
DS00-190PDH
DS99-039T1E1)
RBS 2202
Lucent SLC 2000
4558 X data sheet
SA4-13
data sheet ic 7495
B20-B2E
HDB3 CODING DECODING FPGA
SA5-27
5N26
FRM8 relay datasheet
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M25C22
Abstract: SA4-13 SA5-27
Text: Preliminary Data Sheet April 2002 TFRA08C13 OCTAL T1/E1 Framer Features • Eight independent T1/E1 transmit and receive framers. ■ Internal DS1 transmit clock synthesis—no external oscillator necessary. ■ Comprehensive alarm reporting and performance
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TFRA08C13
352-pin
tran7000
DS00-190PDH
DS99-039T1E1)
M25C22
SA4-13
SA5-27
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M25C22
Abstract: SA4-13 SA5-27 T7115a Y18-Y19 RHS25
Text: Data Sheet February 2003 TFRA08C133BAL3 OCTAL T1/E1 Framer Features • Eight independent T1/E1 transmit and receive framers. ■ Internal DS1 transmit clock synthesis—no external oscillator necessary. ■ Comprehensive alarm reporting and performance monitoring:
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TFRA08C133BAL3
DS03-055MPIC
DS02-240BBAC)
M25C22
SA4-13
SA5-27
T7115a
Y18-Y19
RHS25
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RBS 2202
Abstract: SA4-13 SA5-27 LC1 D09 10 PR70 SR10 SR12 T7633 TFRA08C13 AMI encoding circuit diagram
Text: Preliminary Data Sheet May 2002 TFRA08C13 OCTAL T1/E1 Framer Features • Eight independent T1/E1 transmit and receive framers. ■ Internal DS1 transmit clock synthesis—no external oscillator necessary. ■ Comprehensive alarm reporting and performance
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TFRA08C13
DS02-240BBAC
DS00-190PDH)
RBS 2202
SA4-13
SA5-27
LC1 D09 10
PR70
SR10
SR12
T7633
AMI encoding circuit diagram
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Untitled
Abstract: No abstract text available
Text: in te * MILITARY i860 64-BIT MICROPROCESSOR Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per Clock • Compatible with Industry Standards — ANSI/IEEE Standard 754-1985 for
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64-BIT
/i486TM
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Untitled
Abstract: No abstract text available
Text: microelectronics Preliminary Data Sheet November 1998 group Lucent Technologies Bell Labs Innovations TFRA08C13 Octal T1/E1 Framer Features Facility Data Link Features • Eight independent T1/E1 transmit and receive framers. m Internal DS1 transmit clock synthesis—no external
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TFRA08C13
DS99-039T1E1
DS98-282TÃ
005002b
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wv3 transistor
Abstract: TRANSISTOR wv4 WV5 43 M68000 MC68060 ba3109 free mbus master pst 39
Text: Freescale Semiconductor, Inc. TABLE OF CONTENTS Paragraph Number Title Page Number Section 1 Introduction Freescale Semiconductor, Inc. 1.1 Why ColdFire! .1-7 Section 2
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motorola v3
Abstract: wv3 transistor M68000 MC68060 verilog code for 8 bit shift register theory verilog code for BIST state machine for 16-byte SRAM
Text: TABLE OF CONTENTS Paragraph Number Title Page Number Section 1 Introduction 1.1 Why ColdFire! .1-7 Section 2 Architectural Overview Section 3 Version 3 Core 3.1 3.2 3.3 3.3.1
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Untitled
Abstract: No abstract text available
Text: SIEMENS Extended Line Card Interface Controller ELIC 1 PEB 20550 PEF 20550 Features Switching EPIC®-1 • Non-blocking switch for 32 digital (e.g. ISDN) or 64 voice subscribers - Bandwidth 16, 32, or 64 kbit/s - Two consecutive 64-bit/s channels can be
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64-bit/s
128-kbit/s
IA-BIDfCl80x
1A-BID180x
0235b05
54CC2
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RBS 6601
Abstract: intel 80188 Lucent SLC 96 block diagram rbs 6601 SESCO
Text: Preliminary Data Sheet June 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7230A Primary Access Framer/Controller Features • Framing formats — DS1 extended superframe ESF — DS1 superframe (SF): D4; SLd -96; T 1DM DDS; T 1DM DDS with FDL access
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T7230A
96-007T
DS91-225SM
RBS 6601
intel 80188
Lucent SLC 96
block diagram rbs 6601
SESCO
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