D9 TO D15 Search Results
D9 TO D15 Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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DAC5571IDBVT |
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Low-power, 8-Bit DAC with high-speed I2C Input 6-SOT-23 -40 to 105 |
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V62/06638-02XE |
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Enhanced-Product Dual-Channel, 10-Bit, 275-MSPS Digital-to-Analog Converter (DAC) 48-TQFP -55 to 125 |
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DAC5662MPFBREP |
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Enhanced product 12-bit 200-Msps dual digital-to-analog converter 48-TQFP -55 to 125 |
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DAC5674IPHPG4 |
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14-Bit, 400-MSPS, 2x-4x Interpolating Digital-to-Analog Converter (DAC) 48-HTQFP -40 to 85 |
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V62/05619-02XE |
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Enhanced Product 14-Bit 400-Msps Digital-To-Analog Converter 48-HTQFP -55 to 125 |
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D9 TO D15 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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U198
Abstract: U5149 u225 U229 diode u1331 u218 MG11A U1401 A1355 U224D
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U1916 U198 U5149 u225 U229 diode u1331 u218 MG11A U1401 A1355 U224D | |
Contextual Info: Under development This document is under development and its contents are subject to change. M16C/6N4 Group Overview Pin Configuration Figures 1.1.3 shows the pin configuration top view . P10/D8 P11/D9 P12/D10 P13/D11 P14/D12 P15/D13/INT3 P16/D14/INT4 P17/D15/INT5 |
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M16C/6N4 P10/D8 P11/D9 P12/D10 P13/D11 P14/D12 P15/D13/INT3 P16/D14/INT4 P17/D15/INT5 P20/AN20/A0/ | |
Contextual Info: Under development This document is under development and its contents are subject to change. M16C/6N5 Group Overview Pin Configuration Figures 1.1.3 shows the pin configuration top view . P10/D8 P11/D9 P12/D10 P13/D11 P14/D12 P15/D13/INT3 P16/D14/INT4 P17/D15/INT5 |
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M16C/6N5 P10/D8 P11/D9 P12/D10 P13/D11 P14/D12 P15/D13/INT3 P16/D14/INT4 P17/D15/INT5 P20/AN20/A0/ | |
Contextual Info: Renesas microcomputers M16C / 62P Group Overview SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Pin Configuration Figures 1.1.3 to 1.1.5 show the pin configurations top view . P10/D8 P11/D9 P12/D10 P13/D11 P14/D12 P15/D13/INT3 P16/D14/INT4 P17/D15/INT5 P20/AN20/A0(/D0/-) |
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16-BIT P10/D8 P11/D9 P12/D10 P13/D11 P14/D12 P15/D13/INT3 P16/D14/INT4 P17/D15/INT5 P20/AN20/A0 | |
Contextual Info: Under development This document is under development and its contents are subject to change. M16C/6N Group M16C/6NL, M16C/6NN 1. Overview P1_1/D9 P1_2/D10 P1_3/D11 P1_4/D12 P1_5/D13/INT3 P1_6/D14/INT4 P1_7/D15/INT5 P2_0/AN2_0/A0(/D0/-) P2_1/AN2_1/A1(/D1/D0) |
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M16C/6N M16C/6NL, M16C/6NN) 2/D10 3/D11 4/D12 5/D13/INT3 6/D14/INT4 7/D15/INT5 2/A10 | |
PLQP0100KB-AContextual Info: Under development Preliminary specification Specifications in this manual are tentative and subject to change. M32C/8B Group 1. Overview D10 / P1_2 D9 / P1_1 D8 / P1_0 D7 / AN0_7 / P0_7 D6 / AN0_6 / P0_6 D5 / AN0_5 / P0_5 D4 / AN0_4 / P0_4 D3 / AN0_3 / P0_3 |
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M32C/8B 100-pin REJ03B0242-0050 PLQP0100KB-A | |
Contextual Info: Under development This document is under development and its contents are subject to change. M16C/6N Group M16C/6NK, M16C/6NM 1. Overview P1_1/D9 P1_2/D10 P1_3/D11 P1_4/D12 P1_5/D13/INT3 P1_6/D14/INT4 P1_7/D15/INT5 P2_0/AN2_0/A0(/D0/-) P2_1/AN2_1/A1(/D1/D0) |
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M16C/6N M16C/6NK, M16C/6NM) 2/D10 3/D11 4/D12 5/D13/INT3 6/D14/INT4 7/D15/INT5 2/A10 | |
Contextual Info: SN65LVDS95ĆQ1 LVDS SERDES TRANSMITTER SGLS207A − OCTOBER 2003 − REVISED MAY 2008 D Qualified for Automotive Applications D 21:3 Data Channel Compression at up to DGG PACKAGE TOP VIEW 1.36 Gigabits per Second Throughput D4 VCC D5 D6 GND D7 D8 VCC D9 |
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SN65LVDS95Ä SGLS207A LVDS95 | |
65LVDS95Q
Abstract: DS90CR215 SN65LVDS95 SN65LVDS95DGGRQ1 SN65LVDS96 SN65LVDS95Q1
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SN65LVDS95Q1 SGLS207A LVDS95 65LVDS95Q DS90CR215 SN65LVDS95 SN65LVDS95DGGRQ1 SN65LVDS96 SN65LVDS95Q1 | |
Contextual Info: SN65LVDS95ĆQ1 LVDS SERDES TRANSMITTER SGLS207A − OCTOBER 2003 − REVISED MAY 2008 DGG PACKAGE TOP VIEW D Qualified for Automotive Applications D 21:3 Data Channel Compression at up to 1.36 Gigabits per Second Throughput D4 VCC D5 D6 GND D7 D8 VCC D9 |
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SN65LVDS95Ä SGLS207A LVDS95 | |
Contextual Info: M16C/30P Group 1.5 1. Overview Pin Configuration Figures 1.5 to 1.6 show the pin configurations top view . P1_0/D8 P1_1/D9 P1_2/D10 P1_3/D11 P1_4/D12 P1_5/D13/INT3 P1_6/D14/INT4 P1_7/D15 P2_0/A0 P2_1/A1 P2_2/A2 P2_3/A3 P2_4/A4 P2_5/A5 P2_6/A6 P2_7/A7 VSS |
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M16C/30P 2/D10 3/D11 4/D12 5/D13/INT3 6/D14/INT4 7/D15 2/A10 3/A11 4/A12 | |
d20 diode
Abstract: 2SJ497
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OCR Scan |
2SK198 2SK621 XN1871 XN1872 2SB970) 2SD1328) d20 diode 2SJ497 | |
MIL-STD-1553
Abstract: HI-1575PQI
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HI-1575 MIL-STD-1553 HI-1575 16-bit HI-1575, 32PTQS 0055R HI-1575PQI | |
DSP56001AFC33
Abstract: DSP56001A DSP56001AFE33 hack br mark
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DSP56001AFC33 88-pin DSP56001A DSP56001AFC33 DSP56001AFE33 hack br mark | |
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AT45DB321D-SU
Abstract: header 17x2 MA3X152K0L NLP-5x LP8340CDT-5.0 mic diode M7 CN1021 header 7x2 LP8345CDT NLP 5x
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HCPL-060L USBDR93 FMMT449 3300pF AT45DB321D-SU header 17x2 MA3X152K0L NLP-5x LP8340CDT-5.0 mic diode M7 CN1021 header 7x2 LP8345CDT NLP 5x | |
P100
Abstract: P101 P102 P103 P104 P105 P106 P107
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M32C/80 100P6S-A P100 P101 P102 P103 P104 P105 P106 P107 | |
lh534y
Abstract: 44-PIN D9 TO D14 A1739
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LH534Y00 40-PIN 44QFJ-1 44-pin, 650-mil 40-pin, 600-mil DIP040-P-0600) lh534y 44-PIN D9 TO D14 A1739 | |
D1437
Abstract: QFJ044-P-0650 44-PIN LH532048 561 A7
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LH532048 40-PIN 40-pin, 600-mil 44QFJ-2 44-pin, 650-mil D1437 QFJ044-P-0650 44-PIN LH532048 561 A7 | |
44-PIN
Abstract: LH532048 QFJ044-P-0650
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LH532048 40-PIN 44QFJ-2 44-pin, 650-mil 40-pin, 600-mil DIP040-P-0600) 44-PIN LH532048 QFJ044-P-0650 | |
73D12
Abstract: qfp128 IO769 120 QFP 128p30
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PD7/D15 PD6/D14 PD5/D13 PD4/D12 PD3/D11 PD2/D10 P81/TxD3 P83/RxD3 TFP-120 P85/SCK3 73D12 qfp128 IO769 120 QFP 128p30 | |
50-pin* cf
Abstract: smd a5 gnd a5gnd A09 smd cf card diagram A05 smd A08 smd A08 smd transistor NC7WZ125 smd a10
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80-pin 50-pin NC7WZ125 220uF 16-BIT) 50-pin* cf smd a5 gnd a5gnd A09 smd cf card diagram A05 smd A08 smd A08 smd transistor NC7WZ125 smd a10 | |
SCK D54
Abstract: BGA256 QFP208 SH7750 SH7750R SH7750S HD-36 D2156 VDDRTC
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BGA256 264-Pin SCK D54 BGA256 QFP208 SH7750 SH7750R SH7750S HD-36 D2156 VDDRTC | |
Contextual Info: 1.2 Block Diagram P47/D7 P46/D6 P45/D5 P44/D4 P43/D3 P42/D2 P41/D1 P40/D0 D15 D14 D13 D12 D11 D10 D9 D8 VCL VCC VCC VSS VSS VSS Figure 1.1 shows an internal block diagram of the HD6413078F20. Data bus MD2 MD1 MD0 EXTAL XTAL RES NMI AS RD HWR Address bus P95/A19/IRQ5 |
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P47/D7 P46/D6 P45/D5 P44/D4 P43/D3 P42/D2 P41/D1 P40/D0 HD6413078F20. P95/A19/IRQ5 | |
PLQP0100KB-AContextual Info: M32C/8A Group 1. Overview A9 / D9 ] [ A10 / D10 [ A11 / D11 [ A12 / D12 [ A13 / D13 [ A14 / D14 [ A15 / D15 A9 , A10 A11 A12 A13 A14 A15 A16 A17 [ , , , , , , A8 , [ A8 / D8 ] ] ] ] ] ] ] D2 D3 D4 D5 D6 D7 / / / / / / A2 A3 A4 A5 A6 A7 [ [ [ [ [ [ , , , , |
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M32C/8A PLQP0100KB-A 100P6Q-A) 100-Pin REJ03B0213-0111 PLQP0100KB-A |