D51 SOIC Search Results

DIP CRYSTAL 8 pin

Abstract: video genlock pll soic 8
Contextual Info: Special Purpose IC Products Guide Product Applications ICS Device Type Description Package Types Page M otherboard ICS1694A Single Crystal Generates Three Low-Jitter Clocks. 8-Pin DIP, SOIC D-3 Disk Drive or Video AV9110 User-Programmable “On-the-Fly” ;

Contextual Info: Off-Line PWM Controllers with Integrated Power MOSFET STR4A100 Series Application Note General Descriptions Package The STR4A100 series are power ICs for switching power supplies, incorporating a sense MOSFET and a current mode PWM controller IC. The low standby power is accomplished by the

Contextual Info: Off-Line PWM Controllers with Integrated Power MOSFET STR4A100 Series Application Note General Descriptions Package The STR4A100 series are power ICs for switching power supplies, incorporating a sense MOSFET and a current mode PWM controller IC. The low standby power is accomplished by the

Contextual Info: Off-Line PWM Controllers with Integrated Power MOSFET STR4A100 Series Application Note General Descriptions Package The STR4A100 series are power ICs for switching power supplies, incorporating a sense MOSFET and a current mode PWM controller IC. The low standby power is accomplished by the

marking r55

Contextual Info: Off-Line PWM Controllers with Integrated Power MOSFET STR4A100 Series General Descriptions Package The STR4A100 series are power ICs for switching power supplies, incorporating a sense MOSFET and a current mode PWM controller IC. The low standby power is accomplished by the

Contextual Info: FT61256 High Speed 32Kx8 Static CMOS Ram FEATURES High Speed Equal Access and Cycle Times – 12/15/20/25/35 ns (Commercial) – 15/20/25/35/45 ns (Industrial) – 20/25/35/45/55/70 ns (Military) Low Power Single 5V±10% Power Supply Easy Memory Expansion Using CE and OE Inputs

Contextual Info: 4 PACKAGE CODES PKG COSE a C S C B iP T IO N PAG E# C5 S ID E B R A Z E D , 3 0 0 M ILS , 2 8 PIN S D1 C E R D IP , 3 0 0 M ILS , 18 P IN S 164 D2 C E R D IP , 3 0 0 M ILS , 2 0 P IN S 1 64 163 D3 C E R D IP , 3 0 0 M ILS , 22 P IN S 164 D3-1 C E R D IP , 4 0 0 M ILS , 22 P IN S

B6051

Abstract: a5 gnd
Contextual Info: DUAL 8K x 64 DATA/ INSTRUCTION CACHE MODULE FOR IDT79R3000 CPU (MULTIPROCESSOR) ADVANCE INFORMATION IDT 7MB6051 FEATURES: DESCRIPTION: • High-speed CMOS static RAM module constructed to support the IDT79R3000 RISC CPU in a multi-processor system as a complete data and Instruction cache (Dual 8K x

Contextual Info: A d v a n c e In fo r m a t io n S p e c if ic a t io n < £ > Z i l 0 5 Z86117/717 CMOS Z8 2K ROM/OTP 8-BlT MICROCONTROLLER FEATURES Z8® Core • 8-Bit CMOS M icrocontroller ■ 20-Pin SOIC and SSOP Style Packages ■ 144 Bytes O n-Chip RAM ■ 2 Kbytes O n-Chip OTP/Masked ROM

P4C1256

Abstract: P4C1256L
Contextual Info: P4C1256 HIGH SPEED 32K x 8 STATIC CMOS RAM FEATURES High Speed Equal Access and Cycle Times – 12/15/20/25/35 ns (Commercial) – 15/20/25/35/45 ns (Industrial) – 20/25/35/45/55/70 ns (Military) Low Power Single 5V±10% Power Supply Easy Memory Expansion Using CE and OE Inputs

Contextual Info: P4C1256 HIGH SPEED 32K X 8 STATIC CMOS RAM FEATURES High Speed Equal Access and Cycle Times – 12/15/20/25/35 ns (Commercial) – 15/20/25/35/45 ns (Industrial) – 20/25/35/45/55/70 ns (Military) Low Power Single 5V±10% Power Supply Easy Memory Expansion Using CE and OE Inputs

P4C164

Abstract: P4C164L
Contextual Info: P4C164 ULTRA HIGH SPEED 8K X 8 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Common Data I/O High Speed Equal Access and Cycle Times – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial) – 12/15/20/25/35/45/70/100 ns (Military)

Contextual Info: P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS FEATURES Data Retention with 2.0V Supply, 10 µA Typical Current P4C164L Military Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial)

Contextual Info: P4C1256 HIGH SPEED 32K x 8 STATIC CMOS RAM FEATURES High Speed Equal Access and Cycle Times – 12/15/20/25/35 ns (Commercial) – 15/20/25/35/45 ns (Industrial) – 20/25/35/45/55/70 ns (Military) Low Power Single 5V±10% Power Supply Easy Memory Expansion Using CE and OE Inputs

Contextual Info: P4C164 REVISIONS DOCUMENT NUMBER: DOCUMENT TITLE: SRAM115 P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS REV. ISSUE DATE ORIG. OF CHANGE OR 1997 DAB New Data Sheet A Oct-05 JDB Change logo to Pyramid B Jun-06 JDB Added 28-pin ceramic DIP C Aug-06 JDB Added Lead Free Designation

Contextual Info: P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Common Data I/O High Speed Equal Access and Cycle Times – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial) – 12/15/20/25/35/45/70/100 ns (Military)

Contextual Info: P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Common Data I/O High Speed Equal Access and Cycle Times – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial) – 12/15/20/25/35/45/70/100 ns (Military)

100DM

Abstract: 1519B P4C164 P4C164L
Contextual Info: P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Common Data I/O High Speed Equal Access and Cycle Times – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial) – 12/15/20/25/35/45/70/100 ns (Military)

Contextual Info: P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Common Data I/O High Speed Equal Access and Cycle Times – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial) – 12/15/20/25/35/45/70/100 ns (Military)

P4C164

Contextual Info: P4C164 ULTRA HIGH SPEED 8K X 8 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Common Data I/O High Speed Equal Access and Cycle Times – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial) – 12/15/20/25/35/45/70/100 ns (Military)

Contextual Info: P4C164 ULTRA HIGH SPEED 8K X 8 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Common Data I/O High Speed Equal Access and Cycle Times – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial) – 12/15/20/25/35/45/70/100 ns (Military)

bass treble circuit schematic

Abstract: schematic BASS TREBLE CIRCUIT schematic diagram in bass treble MSGEQ7 20 channel GRAPHIC EQUALIZER Schematic Diagram ,schematic BASS TREBLE CIRCUIT serial port interface MSHN1 Wintek 2157F
Contextual Info: S ix C h a n n e l A u d io C o n tro lle r 04/2002 A d v a n c e D a ta S h e e t D eseription . F ea tu res The six channel audio grated co n tro lle r is a single inte­ circu it th a t has the trol and ele ctro n ic volum e sw itch in g fu n ction s for an audio

transistor p710

Abstract: 73D34 AD1871 ADSP-TS101S psdsoft express 8.6 ADSP-TS101 AD1854 rd msh murata msh CT1112
Contextual Info: ADSP-TS101S EZ-KIT Lite Evaluation System Manual Revision 2.1, April 2006 Part Number 82-000635-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2006 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent

Contextual Info: ICS9175 Integrated Circuit Systems, Inc. Low Skew Output Buffer General Description Features The ICS9175 is designed to generate low skew clocks for clock distribution in high performance PCs and workstations. Using a 14.318 MHz crystal and phase-locked loop technology, six