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    D35B 60 74 Search Results

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    D35B 60

    Abstract: D35B D35B 60 37 D35A D10A D11A D12A D15A LH5420 LH543620
    Text: LH5420 256 x 36 × 2 Bidirectional FIFO FEATURES • TTL/CMOS-Compatible I/O • Fast Cycle Times: 25/30/35 ns • Space-Saving PQFP Package • Two 256 × 36-bit FIFO Buffers • PQFP to PGA Package Conversion * • Full 36-bit Word Width • Selectable 36/18/9-bit Word Width


    Original     		LH5420 36-bit 36/18/9-bit 132-pin 132-Pin, PQFP132-P-S950) LH5420P-25 D35B 60 D35B D35B 60 37 D35A D10A D11A D12A D15A LH5420 LH543620 PDF

    D35B

    Abstract: D35B 60 D11A D12A D15A D18A LH5420 LH543601 D-33A
    Text: LH543601 256 x 36 × 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible and Functionally-Compatible The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite


    Original     		LH543601 LH543601 LH5420 36-bit 36/18/9-bit 144TQFP 144-pin D35B D35B 60 D11A D12A D15A D18A LH5420 D-33A PDF

    D35B

    Abstract: D10A D11A D12A D15A LH5420 LH543601 D23B
    Text: LH543601 256 x 36 × 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible and Functionally-Compatible The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite


    Original     		LH543601 LH543601 LH5420 36-bit 36/18/9-bit 144TQFP 144-pin D35B D10A D11A D12A D15A LH5420 D23B PDF

    D35B

    Abstract: D35B 60 D35A D3A transistor datasheet diode A1A 115 16 FIFO error reset full empty D11A D12A D15A LH5420
    Text: LH543611/21 512 x 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Pin-Compatible and Functionally The LH543611 and LH543621 contain two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.


    Original     		LH543611/21 LH543611 LH543621 LH5420 LH543601, LH5420/LH543601 LH543611/21 D35B D35B 60 D35A D3A transistor datasheet diode A1A 115 16 FIFO error reset full empty D11A D12A D15A PDF

    D35B

    Abstract: D35B 60 D35B 60 74 D20A D22A
    Text: ADVANCE INFORMATION LH54V3611/21 FEATURES • Upwards-Compatible with Sharp LH543611/21 • Cycle Time as fast as 15 ns • Two 512 x 36-bit FIFO Buffers LH54V3611 or • • • • • • • • • • • • • • • Two 1024 × 36-bit FIFO Buffers (LH54V3621)


    Original     		LH54V3611/21 LH543611/21 36-bit LH54V3611) LH54V3621) 36/18/9-bit 144TQFP 144-pin D35B D35B 60 D35B 60 74 D20A D22A PDF

    D35B 60

    Abstract: D35B D35B 60 74 D35B 80 D35B 60 89 D11A D12A LH5420 LH543601 LH543611
    Text: LH543611/21 512 x 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Pin-Compatible and Functionally The LH543611 and LH543621 contain two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.


    Original     		LH543611/21 LH543611 LH543621 LH5420 LH543601, 144-pin, TQFP144-P-2020) 132-pin, D35B 60 D35B D35B 60 74 D35B 80 D35B 60 89 D11A D12A LH543601 PDF

    D35B 60

    Abstract: D35B diode A1A 115 16 QS3383 D35A QS32383 D17A-D9A D0B-D35B D35B 60 74
    Text: QS723611, QS723621 PRELIMINARY High-Speed CMOS High Speed CMOS 512Bus x 36Exchange x 2/1K x 36 x 2 Switches FIFO Bi-directional Q QS3383 QS723611 QS32383 QS723621 FEATURES/BENEFITS DESCRIPTION • Fast cycle times: 20/25/30/35 ns 50/40/33/28 MHz • Functionally Upwards-Compatible with


    Original     		QS723611, QS723621 QS3383 QS723611 QS32383 QS723621 QS725420A 36-bit QS723611) D35B 60 D35B diode A1A 115 16 QS3383 D35A QS32383 D17A-D9A D0B-D35B D35B 60 74 PDF

    D35B 60 74

    Abstract: D35B 60 D33A D26A D28B D31A D35B D26B D12A D15A
    Text: ADVANCE INFORMATION LH543611/21 512 x 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible, Deeper 0.7µ-Technology Replacements for Sharp LH5420 and LH543601 • Functionally Upwards-Compatible from LH5420 and


    Original     		LH543611/21 LH5420 LH543601 36-bit 36/18/9-bit LH5420/LH543601 D35B 60 74 D35B 60 D33A D26A D28B D31A D35B D26B D12A D15A PDF

    D35B

    Abstract: D35B 60 D23B D35B 60 74 diode A1A 115 16 fifo buffer empty full flag error reset D10A LH5420 LH543601 QS32383
    Text: QS725420A PRELIMINARY High-Speed CMOS High Speed CMOS x 36 x 2 Bus256 Exchange Switches FIFO Bi-directional Q QS3383 QS32383 QS725420A FEATURES/BENEFITS • • • • • • • Fast cycle times: 20/25/30/35 ns Two 256 x 36-bit FIFO buffers Full 36-bit word width


    Original     		QS725420A QS3383 QS32383 QS725420A 36-bit 36/18/9-bit MDSF-00018-01 132-Pin D35B D35B 60 D23B D35B 60 74 diode A1A 115 16 fifo buffer empty full flag error reset D10A LH5420 LH543601 QS32383 PDF

    LT3973-3.3

    Abstract: LT3971-3.3
    Text: 123456789ABC9DE 9FB33744555 7 !"!# 1234546789A8BC7DCEF8  F3 !"# $%&'#3B9D7 936B62 $9A#!9  3 !"#3


    Original     		123456789ABC9DE 1234546789A8BC7DCEF8 12234567893A758BCD834E3F2 367D3 367D37D, D7D83 -D73A758BC 6E34D3 -D7936 934D25 LT3973-3.3 LT3971-3.3 PDF

    Untitled

    Abstract: No abstract text available
    Text: COVER DATA SHEET 32GB DDR3 SDRAM Load Reduced DIMM EBJ34LH4B6PA 4096M words 72 bits, 4 Ranks Specifications Features • Density: 32GB • Organization — 4096M words  72 bits, 4 ranks • Mounting 36 pieces of 8G bits DDR3 SDRAM with DDP (FBGA)


    Original     		EBJ34LH4B6PA 4096M 240-pin 1866Mbps/1600Mbps/1333Mbps M01E1007 E2050E20 PDF

    d358

    Abstract: D35B pitch 0.4 QFP 256p D20B D22B D24B D268 D28B LH5420 LH543620
    Text: LH5420 256 x 36 x 2 Bidirectional FIFO FEATURES • TTL/CMOS-Compatible I/O • Fast Cycle Times: 25/30/35 ns • Space-Saving PQFP Package • Two 256 x 36-bit FIFO Buffers • PQFP to PGA Package Conversion * • Full 36-bit Word Width FUNCTIONAL DESCRIPTION


    OCR Scan     		LH5420 36-bit 36/18/9-bit 132pqfp 132-pin 001LS73 LH5420 132-Pin, d358 D35B pitch 0.4 QFP 256p D20B D22B D24B D268 D28B LH543620 PDF

    D22A

    Abstract: No abstract text available
    Text: LH5420/ 256 FEATURES X 36 X 2 Bidirectional FIFO FUNCTIONAL DESCRIPTION • Fast Cycle Times: 25/30/35 ns • Two 256 x 36-bit FIFO Buffers • Full 36-bit Word Width • Selectable 36/18/9-bit Word Width on Port B • Fully Asynchronous Port-to-Port Communications


    OCR Scan     		LH5420/ 36-bit 36/18/9-bit Oct91 LH5420 132-Lead. PQFP132-P-S950) 120-Lead, PGA120-C-S1360) D22A PDF

    Untitled

    Abstract: No abstract text available
    Text: LH543601 256 x 36 x 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible and Functionally-Compatible 0.7|x-Technology Replacement for Sharp LH5420 The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite


    OCR Scan     		LH543601 LH5420 36-bit 36/18/9-bit LH543601 132-pin PDF

    aei cr

    Abstract: a04l
    Text: ADVANCE INFORMATION LH54V3611/21 FEATURES • Upwards-Compatible with Sharp LH543611/21 • Cycle Time as fast as 15 ns • Two 512 x 36-bit FIFO Buffers LH54V3611 or Two 1024 x 36-bit FIFO Buffers (LH54V3621) • Selectable 36/18/9-bit Word Width on Port B;


    OCR Scan     		LH54V3611/21 LH543611/21 36-bit LH54V3611) LH54V3621) 36/18/9-bit Almost-Full611/21 144-pin aei cr a04l PDF

    lj26

    Abstract: D35B D35A
    Text: LH5420 256 x 36 x 2 Bidirectional FIFO FEATURES • TTL/CMOS-Compatible I/O • Fast Cycle Times: 25/30/35 ns • Space-Saving PQFP Package • Two 256 x 36-bit FIFO Buffers • PQFP to PGA Package Conversion * • Full 36-bit Word Width FUNCTIONAL DESCRIPTION


    OCR Scan     		LH5420 36-bit 36/18/9-bit 132-pin 0D1L273 132-Pin, PQFP132-P-S950) LH5420P-25 lj26 D35B D35A PDF

    Untitled

    Abstract: No abstract text available
    Text: LH543601 256 x 36 x 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering. FIFO #1 and


    OCR Scan     		LH543601 LH5420 36-bit 36/18/9-bit 132-pin 144-pin LH543601 PDF

    u29a

    Abstract: bd248 MS76542-SSFC
    Text: LH5420 256 x 36 x 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 25/30/35 ns The LH5420 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite direc­ tions, for bidirectional data buffering. FIFO #1 and FIFO


    OCR Scan     		LH5420 36-bit 36/18/9-bit 132-Lead, PQFP132-P-S950) 120-Lead, PGA120-C-S1360) LH5420P-25 u29a bd248 MS76542-SSFC PDF

    D2SB 73

    Abstract: No abstract text available
    Text: LH5420 256 x 36 x 2 Bidirectional FIFO FEATURES • TTL/CMOS-Compatible I/O • Fast Cycle Times: 25/30/35 ns • Space-Saving PQFP Package • Two 256 • PQFP to PGA Package Conversion * x 36-bit FIFO Buffers • Full 36-bit Word Width • Selectable 36/18/9-bit Word Width


    OCR Scan     		LH5420 36-bit 36/18/9-bit 132-pin 132-Pin, PQFP132-P-S950) LH5420P-25 D2SB 73 PDF

    D2SB 73

    Abstract: No abstract text available
    Text: 256 x 36 x 2 /512 x 36 x 2 BiFIFOs FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 15/20/25/30/35 ns The LH543601/11 contain two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering. FIFO #1 and


    OCR Scan     		LH5420 36-bi1/512x 36-bit 18/9-bit LH543601/11 132-Lead, PQFP132-P-S950) 120-Lead, PGA120-C-S1360) D2SB 73 PDF

    d19b

    Abstract: No abstract text available
    Text: QS723611, QS723621 PRELIMINARY Q High-Speed CMOS 5 1 2 X 3 6 X 2 /1 K X 3 6 X 2 Bi-directional FIFO QS723611 QS723621 FEATURES/BENEFITS DESCRIPTION • Fast cycle times: 20/25/30 ns 50/40/33 MHz • Functionally Upwards-Compatible with QS725420A • Two 512 x 36-bit (QS723611) or 1K x 36-bit


    OCR Scan     		QS723611, QS723621 QS723611 QS723621 QS725420A 36-bit QS723611) 36-bit d19b PDF

    2sa 1023

    Abstract: No abstract text available
    Text: QS723611, QS723621 PRELIMINARY Q High-Speed CMOS 5 1 2 X 3 6 X 2 /1 K X 3 6 X 2 Bi-directional FIFO DESCRIPTION FEATURES/BENEFITS Fast cycle times: 20/25/30/35 ns 50/40/33/28 MHz Functionally Upwards-Compatible with QS725420A Two 512 x 36-bit (QS723611) or 1K x 36-bit


    OCR Scan     		QS723611, QS723621 QS723611 QS723621 QS725420A 36-bit QS723611) QS723621) 36-bit 2sa 1023 PDF

    DL2AD

    Abstract: No abstract text available
    Text: LH543601 256 x 36 x 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns The LH543601 contains two FIFO1buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering. FIFO #1 and


    OCR Scan     		LH543601 LH5420 36-bit 36/18/9-bit DL2AD PDF

    tda ic

    Abstract: No abstract text available
    Text: QS725420A PRELIMINARY High-Speed CMOS 256 x 36 x 2 Bi-directional FIFO ô QS725420A FEATURES/BENEFITS • Fast cycle tim es: 20/25/30/35 ns • T w o 256 x 36-bit FIFO buffers • Full 36-bit word width • Selectable 36/18/9-bit word width on port B • Fully asynchronous operation of port A and port B


    OCR Scan     		QS725420A QS725420A 36-bit 36/18/9-bit DSF-00018-01 132-Pin 144-Pin tda ic PDF