D35B 60 Search Results

D35B 60

Abstract: D35B D35B 60 37 D35A D10A D11A D12A D15A LH5420 LH543620
Contextual Info: LH5420 256 x 36 × 2 Bidirectional FIFO FEATURES • TTL/CMOS-Compatible I/O • Fast Cycle Times: 25/30/35 ns • Space-Saving PQFP Package • Two 256 × 36-bit FIFO Buffers • PQFP to PGA Package Conversion * • Full 36-bit Word Width • Selectable 36/18/9-bit Word Width

D35B

Abstract: D35B 60 D35B 60 74 D20A D22A
Contextual Info: ADVANCE INFORMATION LH54V3611/21 FEATURES • Upwards-Compatible with Sharp LH543611/21 • Cycle Time as fast as 15 ns • Two 512 x 36-bit FIFO Buffers LH54V3611 or • • • • • • • • • • • • • • • Two 1024 × 36-bit FIFO Buffers (LH54V3621)

D35B

Abstract: D35B 60 D11A D12A D15A D18A LH5420 LH543601 D-33A
Contextual Info: LH543601 256 x 36 × 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible and Functionally-Compatible The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite

D35B

Abstract: D10A D11A D12A D15A LH5420 LH543601 D23B
Contextual Info: LH543601 256 x 36 × 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible and Functionally-Compatible The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite

D35B 60

Abstract: D35B diode A1A 115 16 QS3383 D35A QS32383 D17A-D9A D0B-D35B D35B 60 74
Contextual Info: QS723611, QS723621 PRELIMINARY High-Speed CMOS High Speed CMOS 512Bus x 36Exchange x 2/1K x 36 x 2 Switches FIFO Bi-directional Q QS3383 QS723611 QS32383 QS723621 FEATURES/BENEFITS DESCRIPTION • Fast cycle times: 20/25/30/35 ns 50/40/33/28 MHz • Functionally Upwards-Compatible with

D35B 60

Abstract: D35B D35B 60 74 D35B 80 D35B 60 89 D11A D12A LH5420 LH543601 LH543611
Contextual Info: LH543611/21 512 x 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Pin-Compatible and Functionally The LH543611 and LH543621 contain two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.

D35B

Abstract: D35B 60 D35A D3A transistor datasheet diode A1A 115 16 FIFO error reset full empty D11A D12A D15A LH5420
Contextual Info: LH543611/21 512 x 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Pin-Compatible and Functionally The LH543611 and LH543621 contain two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.

D35B 60 74

Abstract: D35B 60 D33A D26A D28B D31A D35B D26B D12A D15A
Contextual Info: ADVANCE INFORMATION LH543611/21 512 x 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns • Pin-Compatible, Deeper 0.7µ-Technology Replacements for Sharp LH5420 and LH543601 • Functionally Upwards-Compatible from LH5420 and

D35B

Abstract: D35B 60 D23B D35B 60 74 diode A1A 115 16 fifo buffer empty full flag error reset D10A LH5420 LH543601 QS32383
Contextual Info: QS725420A PRELIMINARY High-Speed CMOS High Speed CMOS x 36 x 2 Bus256 Exchange Switches FIFO Bi-directional Q QS3383 QS32383 QS725420A FEATURES/BENEFITS • • • • • • • Fast cycle times: 20/25/30/35 ns Two 256 x 36-bit FIFO buffers Full 36-bit word width

Contextual Info: AP9A437 semiconductor 256 x 36 x 2 Synchronous BiFlFO Features request, and read/write control signals. At the maximum operating frequency, the clock duty cycle may vary from 40 to 60%. At lower frequencies, the clock waveform may be quite asymmetric, as long as the minimum pulse-width con­

A40B

Abstract: D40B
Contextual Info: DOUGLAS RANDALL, INC Solid State Relays - AC Output AD2540 S eries 6 up to 40 Amps/240 volts Features & General Specifications • Output configuration (Back to Back SCR's) Normally Open, Form A (SPST-NO) Normally Closed, Form B (SPST-NC) • Most models UL and CSA approved.

d358

Abstract: D35B pitch 0.4 QFP 256p D20B D22B D24B D268 D28B LH5420 LH543620
Contextual Info: LH5420 256 x 36 x 2 Bidirectional FIFO FEATURES • TTL/CMOS-Compatible I/O • Fast Cycle Times: 25/30/35 ns • Space-Saving PQFP Package • Two 256 x 36-bit FIFO Buffers • PQFP to PGA Package Conversion * • Full 36-bit Word Width FUNCTIONAL DESCRIPTION

Contextual Info: JUN I S 1992 MOSEL NOVEMBER 1991 MS76542 256 x 36 x 2 Bidirectional FIFO FEATURES DESCRIPTION • Fast cycle times - 25/30/35 ns The MS76542 contains two FIFO buffers which operate in parallel but opposite directions for bidirectional data buffering. The two FIFO buffers are each organized as

D22A

Contextual Info: LH5420/ 256 FEATURES X 36 X 2 Bidirectional FIFO FUNCTIONAL DESCRIPTION • Fast Cycle Times: 25/30/35 ns • Two 256 x 36-bit FIFO Buffers • Full 36-bit Word Width • Selectable 36/18/9-bit Word Width on Port B • Fully Asynchronous Port-to-Port Communications

Contextual Info: 12342566789ABACDEFA8D9 81 1234546789A8BCDE8F 254728E88A8F  F3 !"# $%&$" '3B9D7 936B62 9C26D7 3 !"#3 *

D3052

Abstract: 316b1
Contextual Info: 1234567489ABCDEFDD 636B811 1234546789A8BCDC5E8F 254D72888EA8FF  F3 !" 1#$%$& 3B9D7'936B62 561583 3 !"

bd-9b

Contextual Info: MOSEL- VITELIC MS76542 256x36x2 BIDIRECTIONAL FIFO Features Description • ■ ■ ■ ■ The MS76542 contains two FIFO buffers which operate in parallel but opposite directions for bidirectional data buffering. The two FIFO buffers are each organized as 256 words by 36 bits. The

L2735

Abstract: D-34A i-box
Contextual Info: LH543611/21 512x36x2/1024x36x2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • The LH543611 and LH543621 contain two FIFO buff­ ers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.

aei cr

Abstract: a04l
Contextual Info: ADVANCE INFORMATION LH54V3611/21 FEATURES • Upwards-Compatible with Sharp LH543611/21 • Cycle Time as fast as 15 ns • Two 512 x 36-bit FIFO Buffers LH54V3611 or Two 1024 x 36-bit FIFO Buffers (LH54V3621) • Selectable 36/18/9-bit Word Width on Port B;

lj26

Abstract: D35B D35A
Contextual Info: LH5420 256 x 36 x 2 Bidirectional FIFO FEATURES • TTL/CMOS-Compatible I/O • Fast Cycle Times: 25/30/35 ns • Space-Saving PQFP Package • Two 256 x 36-bit FIFO Buffers • PQFP to PGA Package Conversion * • Full 36-bit Word Width FUNCTIONAL DESCRIPTION

Contextual Info: LH543601 256 x 36 x 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 20/25/30/35 ns The LH543601 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering. FIFO #1 and

F92F

Contextual Info: 123456789 ABCCDEFBEDE 12216 D779E7 !"# $D7D%AF&6' 6C% !"#  F3 !"# $%&'(3B9D7 936B62 $'2)6' 3 !"#3

u29a

Abstract: bd248 MS76542-SSFC
Contextual Info: LH5420 256 x 36 x 2 Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Cycle Times: 25/30/35 ns The LH5420 contains two FIFO buffers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite direc­ tions, for bidirectional data buffering. FIFO #1 and FIFO

D2SB 73

Contextual Info: LH5420 256 x 36 x 2 Bidirectional FIFO FEATURES • TTL/CMOS-Compatible I/O • Fast Cycle Times: 25/30/35 ns • Space-Saving PQFP Package • Two 256 • PQFP to PGA Package Conversion * x 36-bit FIFO Buffers • Full 36-bit Word Width • Selectable 36/18/9-bit Word Width