TDK 78P7200-IH
Abstract: 78P2361 78P2362 78P7200 GR-253-CORE PE-65969 PT5045 signal detection circuit "peak hold" constant vol PEAK DETECTOR CIRCUIT SHORT NOTE
Text: 78P7200 DS-3/E3/STS-1 Line Interface With Receive Equalizer March 1998 DESCRIPTION FEATURES The 78P7200 is a line interface transceiver IC intended for STS-1 51.84 Mbit/s , DS-3 (44.736 Mbit/s) and E3 (34.368 Mbit/s) applications. The receiver has a very wide dynamic range and is
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78P7200
78P7200
28-Pin
78P7200-IH
TDK 78P7200-IH
78P2361
78P2362
GR-253-CORE
PE-65969
PT5045
signal detection circuit "peak hold" constant vol
PEAK DETECTOR CIRCUIT SHORT NOTE
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TDK 78P7200-IH
Abstract: No abstract text available
Text: 78P7200 DS3/E3/STS-1 Line Interface With Receive Equalizer March 1998 DESCRIPTION FEATURES The 78P7200 is a line interface transceiver IC intended for STS-1 51.84 Mbit/s , DS3 (44.736 Mbit/s) and E3 (34.368 Mbit/s) applications. The receiver has a very wide dynamic range and is
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78P7200
TDK 78P7200-IH
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Untitled
Abstract: No abstract text available
Text: XR-T6165 .the analog plus company TM Codirectional Digital Data Processor May 1997–3 FEATURES APPLICATIONS D Low Power CMOS Technology D CCITT G.703 Compliant 64kbps Codirectional Interface D All Receiver and Transmitter Inputs and Outputs are TTL Compatible
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XR-T6165
64kbps
XR-T6164
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TSC 232 CPE
Abstract: RS -12V SDS RELAY RS -24V SDS RELAY RSL -12V SDS RELAY univac DS1 frame synchronization CMI 1990 MS NAS DC standards parts cross reference coded mark inversion 1990 mtbf slc TCP 8026
Text: Philips Semiconductors Acronyms Networking acronyms A B ATM Adaptation Layer, two sublayers concerned with segmenting large PDUs into ATM cells; type 1 = CBR, 2 = VBR. See also SAR. B Bearer channel, a DS–0 for user trafrlc. BCC Block Check Code, a CRC or similarly calculated number
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8 bit 92112
Abstract: Digital Alarm Clock by using ttl t6166cd Transpower Technologies PE-65535 XR-T6166 XR-T6166CD XR-T6166CP XR-T6166ID XR-T6166IP
Text: XR-T6166 .the analog plus company TM Codirectional Digital Data Processor June 1997–3 APPLICATIONS FEATURES D CCITT G.703 Compliant 64kbps Codirectional Interface D Low Power CMOS Technology D All Receiver and Transmitter Inputs and Outputs are TTL Compatible
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XR-T6166
64kbps
8 bit 92112
Digital Alarm Clock by using ttl
t6166cd
Transpower Technologies
PE-65535
XR-T6166
XR-T6166CD
XR-T6166CP
XR-T6166ID
XR-T6166IP
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XRT6166CP-F
Abstract: No abstract text available
Text: XR-T6166 .the analog plus company TM Codirectional Digital Data Processor June 1997–3 APPLICATIONS FEATURES D CCITT G.703 Compliant 64kbps Codirectional Interface D Low Power CMOS Technology D All Receiver and Transmitter Inputs and Outputs are TTL Compatible
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XR-T6166
64kbps
XRT6166
30-Jul-09
XRT6166
XRT6166ID-F
SOIC28
XRT6166IP-F
PDIP28
XRT6166CD-F
XRT6166CP-F
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Untitled
Abstract: No abstract text available
Text: XR-T6165 .the analog plus company TM Codirectional Digital Data Processor May 1997–3 FEATURES APPLICATIONS D Low Power CMOS Technology D CCITT G.703 Compliant 64kbps Codirectional Interface D All Receiver and Transmitter Inputs and Outputs are TTL Compatible
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XR-T6165
64kbps
XRT6165
30-Jul-09
XRT6165
XRT6165ID-F
SOIC24
XRT6165CD-F
SOIC24
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PHASE LOCKED LOOP
Abstract: NCT Group
Text: SSI 78P2361 m m syshtis' STS-1 Line Interface A TDK Group/Company December 1992 DESCRIPTION FEATURES The SSI 78P2361 is a line interface transceiver IC intended for STS-1 51.84 Mbit/s applications. The receiver has a very wide dynamic range and is designed to accept B3ZS-encoded Alternate-Mark
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78P2361
78P2361
28-pin
78P2361-IP
78P2361-IH
292-rev.
PHASE LOCKED LOOP
NCT Group
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78P2362
Abstract: gf 703 NCT Group
Text: SSI 78P2362 wmsitskttis’ 34.368 Mbit/s Line Interface A TDK Group/Company Preliminary Data December 1992 DESCRIPTION FEATURES The SSI 78P2362 is a line interface transceiver 1C intended for 34.368 Mbit/s applications. The receiver has a very wide dynamic range and is designed to
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78P2362
78P2362
292-rev.
gf 703
NCT Group
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Untitled
Abstract: No abstract text available
Text: SSI 78P2362 stmsmbns 34.368 Mbit/s Line Interface A TDK Group/Company Preliminary Data December 1993 DESCRIPTION FEATURES The SSI 78P2362 is a line interface transceiver IC intended for 34.368 Mbit/s applications. The receiver has a very wide dynamic range and is designed to
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78P2362
78P2362
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Untitled
Abstract: No abstract text available
Text: skew swim SSI 78P2361 STS-1 Line Interface A TDK Group/Company December 1993 DESCRIPTION FEATURES The SSI 78P2361 is a line interface transceiver IC intended for STS-1 51.84 Mbit/s applications. The receiver has a very wide dynamic range and is designed to accept B3ZS-encoded Alternate-Mark
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78P2361
78P2361
8P2361-IH
78P2361-IH
78P2361,
28-pin
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Untitled
Abstract: No abstract text available
Text: SSI 78P7200 w im s v d w DS-3 Line Interface with Receive Equalizer s ' A TDK Group/Company December 1992 DESCRIPTION FEATURES The SSI 78P7200 is a line interface transceiver IC intended for DS-3 44.736 Mbit/s applications. The receiver has a very wide dynamic range and is
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78P7200
78P7200
28-pin
78P7200-IH
78P7200,
28-pin
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TR-TSY-000499
Abstract: ANSI T1.102 1987 TDK 78P7200 78P2361 78P2362 78P7200 PE-65969 TDK 78P7200-IH mini equalizer
Text: SSI 78P7200 ¿ é c o n s u s fe m E3/DS-3 Line Interface with Receive Equalizer s 'Company A TDK Group IC Preliminary Data December 1994 DESCRIPTION FEATURES Single chip transmit and receive interface for E3 34.368 Mblt/S or DS-3 (44.736 Mbit/S) applications
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78P7200
78P7200
0013ES7
TR-TSY-000499
ANSI T1.102 1987
TDK 78P7200
78P2361
78P2362
PE-65969
TDK 78P7200-IH
mini equalizer
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CPD 513
Abstract: 6 pin pulse transformer 111 78P7200-IH KSS Crystals 78P2361 78P2362 78P7200 D012 TDK 78P7200-IH mini equalizer
Text: SSI 78P7200 cw m s v s k m E3/DS-3 Line Interface with Receive Equalizer s ’ A TDK Group/Company Preliminary Data November 1994 DESCRIPTION FEATURES The SSI 78P7200 is a line interface transceiver 1C intended lo r DS-3 44.736 Mbit/s and E3 (34.368 Mbit/s) applications. The receiver has a very wide
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78P7200
78P7200
CPD 513
6 pin pulse transformer 111
78P7200-IH
KSS Crystals
78P2361
78P2362
D012
TDK 78P7200-IH
mini equalizer
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78P2361
Abstract: 78P2362 78P7200 GR-253-CORE PE-65969 PT5045 center tapped transformer
Text: SSI 78P7200 S m iM h n s DS-3/E3/STS-1 Line Interface with Receive Equalizer " A TDK Group/Company September 1995 DESCRIPTION FEATURES The SSI 78P7200 is a line interface transceiver IC intended for STS-1 51.84 Mbit/s , DS-3 (44.736 Mbit/s) and E3 (34.368 Mbit/s) applications. The receiver has a
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78P7200
78P7200
78P7200-IP
78P7200-IP
28-pin
78P7200-IH
78P7200-IH
6E531b5
78P2361
78P2362
GR-253-CORE
PE-65969
PT5045
center tapped transformer
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Untitled
Abstract: No abstract text available
Text: SSI 78P7200 mmMbns' E3/DS-3 Line Interface with Receive Equalizer A TDK Group/Company Preliminary Data November 1994 DESCRIPTION FEATURES The SSI 78P7200 is a line interface transceiver 1C intended for DS-3 44.736 Mbit/s and E3 (34.368 Mbit/s) applications. The receiver has a very wide
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78P7200
78P7200
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TDK 78P7200-IH
Abstract: TRW coded digital signals capacitor 12-24 pF Variable pin-compatible replacement
Text: &TDK. TSC 78P7200 DS-3/E3/STS-1 Line Interface with Receive Equalizer TDK SEMICONDUCTOR CORP. October 1996 DESCRIPTION FEATURES The TSC 78P7200 is a line interface transceiver IC intended forSTS-1 51.84 Mbit/s , DS-3 (44.736 Mbit/s) and E3 (34.368 Mbit/s) applications. The receiver has a
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78P7200
78P7200
78P7200-IH
TDK 78P7200-IH
TRW coded digital signals
capacitor 12-24 pF Variable
pin-compatible replacement
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Untitled
Abstract: No abstract text available
Text: XR-T6165 ¿E’ E X q R Codirectional Digital Data Processor .the analog p lu s com pany IP' /äSWSi*1 May 1997-3 FEATURES APPLICATIONS Low Power CMOS Technology CCITT G.703 Compliant 64kbps Codirectional Interface All Receiver and Transmitter Inputs and Outputs are
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XR-T6165
64kbps
XR-T6164
125ns
3422blfl
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Untitled
Abstract: No abstract text available
Text: XR-T6165 C odirectional Digital Data Processor .the a n a lo g p lu s c o m p a n y March 1997-2 APPLICATIONS FEATURES • Low Power CMOS Technology • All Receiver and Transmitter Inputs and Outputs are TTL Compatible • Transmitter Inhibits Bipolar Violation Insertion for
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XR-T6165
125ns
64kbps
1/M23/95
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Untitled
Abstract: No abstract text available
Text: XR-T6166 Ï S T E X A R .the analog plus company TM C odirectional Digital Data Processor March 1997-2 FEATURES APPLICATIONS • Low Power CMOS Technology • All Receiver and Transmitter Inputs and Outputs are TTL Compatible • Transmitter Inhibits Bipolar Violation Insertion for
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XR-T6166
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Untitled
Abstract: No abstract text available
Text: XR-T6166 C 'E X A R .the analog plus company Codirectional Digital Data Processor TM June 1997-3 A PP LIC A TIO N S FEA TUR ES CCITT G.703 Compliant 64kbps Codirectional Interface Low Power CMOS Technology All Receiver and Transmitter Inputs and Outputs are
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XR-T6166
64kbps
XR-T6164
3422blÃ
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telephone main distribution frame
Abstract: RJ48 pin out APDU spec mcl plp
Text: Philips Semiconductors Acronyms Networking acronyms A B ATM Adaptation Layer, two sublayers concerned with segmenting large PDUs into ATM cells; type 1 = CBR, 2 = VBR. See also SAR. B Bearer channel, a D S-0 for user trafrlc. BCC Block Check Code, a CRC or similarly calculated number
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XRT6165ID
Abstract: se819 TX2M
Text: XR- T61 65 X T E X A R [.th e a n a lo g p lu s c o m p a n y Codirectional Digital Data Processor TM May 1997-3 FEATURES APPLICATIONS • Low Power CMOS Technology • • All Receiver and Transmitter Inputs and Outputs are TTL Compatible CCITT G.703 Compliant 64kbps Codirectional
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125fis
64kbps
64kbAR
XRT6165ID
se819
TX2M
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rt6164
Abstract: 1PXF transformer
Text: XR-T61 66 C'EXAR [.the a n a lo g plu s Codirectional Digital Data Processor com pan y J M June 1997-3 APPLICATIONS FEATURES • Low Power CMOS Technology • • All Receiver and Transmitter Inputs and Outputs are TTL Compatible CCITT G.703 Interface •
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XR-T61
125jis
64kbps
rt6164
1PXF transformer
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