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    CML VT 50 OHM TERMINATION Search Results

    CML VT 50 OHM TERMINATION Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CN-DSUB50PIN0-000 Amphenol Cables on Demand Amphenol CN-DSUB50PIN0-000 D-Subminiature (DB50 Male D-Sub) Connector, 50-Position Pin Contacts, Solder-Cup Terminals Datasheet
    CN-DSUBHD62PN-000 Amphenol Cables on Demand Amphenol CN-DSUBHD62PN-000 High-Density D-Subminiature (HD62 Male D-Sub) Connector, 62-Position Pin Contacts, Solder-Cup Terminals Datasheet
    CN-DSUB25SKT0-000 Amphenol Cables on Demand Amphenol CN-DSUB25SKT0-000 D-Subminiature (DB25 Female D-Sub) Connector, 25-Position Socket Contacts, Solder-Cup Terminals Datasheet
    CN-DSUBHD26SK-000 Amphenol Cables on Demand Amphenol CN-DSUBHD26SK-000 High-Density D-Subminiature (HD26 Female D-Sub) Connector, 26-Position Socket Contacts, Solder-Cup Terminals Datasheet
    CN-DSUB15PIN0-000 Amphenol Cables on Demand Amphenol CN-DSUB15PIN0-000 D-Subminiature (DB15 Male D-Sub) Connector, 15-Position Pin Contacts, Solder-Cup Terminals Datasheet

    CML VT 50 OHM TERMINATION Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY Integrated Circuit Systems, Inc. ICS889833 LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-LVDS FANOUT BUFFER W/INTERNAL TERMINATION GENERAL DESCRIPTION FEATURES The ICS889833 is a high speed 1-to-4 Differential-to-LVDS Fanout Buffer w/Internal HiPerClockS


    Original     		ICS889833 200ps 370ps ICS889833 889833AK PDF

    ICS889871

    Abstract: ICS889871AK ICS889871AKLF ICS889871AKLFT ICS889871AKT MO-220 SY89871U
    Text: ICS889871 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL BUFFER/ DIVIDER W/INTERNAL TERMINATION GENERAL DESCRIPTION FEATURES The ICS889871 is a high speed Differential-toICS 3.3V, 2.5V LVPECL Buffer/Divider w/Inter nal HiPerClockS Termination and is a member of the HiPerClockS™


    Original     		ICS889871 ICS889871 199707558G ICS889871AK ICS889871AKLF ICS889871AKLFT ICS889871AKT MO-220 SY89871U PDF

    ICS889875

    Abstract: ICS889875AK ICS889875AKLF ICS889875AKLFT ICS889875AKT MO-220 SY89875U
    Text: PRELIMINARY Integrated Circuit Systems, Inc. ICS889875 DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/ INTERNAL TERMINATION GENERAL DESCRIPTION FEATURES The ICS889875 is a high speed Differential-toLVDS Buffer/Divider w/Internal Termination and HiPerClockS is a member of the HiPerClockS™ family of high


    Original     		ICS889875 ICS889875 889875AK ICS889875AK ICS889875AKLF ICS889875AKLFT ICS889875AKT MO-220 SY89875U PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY Integrated Circuit Systems, Inc. ICS889872 DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/ INTERNAL TERMINATION GENERAL DESCRIPTION FEATURES The ICS889872 is a high speed Differential-toLVDS Buffer/Divider w/Internal Termination and HiPerClockS is a member of the HiPerClockS™ family of high


    Original     		ICS889872 250ps 750ps ICS889872 889872AK PDF

    pecl logic voltage levels

    Abstract: CML Vt 50 Ohm termination
    Text: Termination Techniques for Differential Signals 1 COMPARING AC and DC COUPLING • AC-Coupling Advantages • Easily interface logic of different power supplies • Interfacing different logic • DC-Coupling Advantage • Can tolerate data patterns with long runs without


    Original     		PDF

    ICS889833

    Abstract: ICS889833AK ICS889833AKLF ICS889833AKLFT ICS889833AKT MO-220 SY89833L 833A tube
    Text: ICS889833 LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-LVDS FANOUT BUFFER W/INTERNAL TERMINATION GENERAL DESCRIPTION FEATURES The ICS889833 is a high speed 1-to-4 DifferentialICS to-LVDS Fanout Buffer w/Internal Termination and HiPerClockS is a member of the HiPerClockS™ family of high


    Original     		ICS889833 ICS889833 199707558G ICS889833AK ICS889833AKLF ICS889833AKLFT ICS889833AKT MO-220 SY89833L 833A tube PDF

    833A tube

    Abstract: H-183-4 ICS889833 ICS889833AK MO-220 SMA100A SY89833L
    Text: ICS889833 LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-LVDS FANOUT BUFFER W/INTERNAL TERMINATION GENERAL DESCRIPTION FEATURES The ICS889833 is a high speed 1-to-4 DifferentialICS to-LVDS Fanout Buffer w/Internal Termination and HiPerClockS is a member of the HiPerClockS™ family of high


    Original     		ICS889833 ICS889833 833A tube H-183-4 ICS889833AK MO-220 SMA100A SY89833L PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL40207 Precision 1:8 LVPECL Fanout Buffer with On-Chip Input Termination Data Sheet February 2013 Features Ordering Information ZL40207LDG1 ZL40207LDF1 Inputs/Outputs • Accepts differential or single-ended input • LVPECL, LVDS, CML, HCSL, LVCMOS • On-chip input termination resistors and biasing for


    Original     		ZL40207 ZL40207LDG1 ZL40207LDF1 -40oC PDF

    ZL40203

    Abstract: No abstract text available
    Text: ZL40203 Precision 1:4 LVPECL Fanout Buffer with On-Chip Input Termination Data Sheet February 2013 Ordering Information Features ZL40203LDG1 ZL40203LDF1 Inputs/Outputs • Accepts differential or single-ended input • LVPECL, LVDS, CML, HCSL, LVCMOS • Four precision LVPECL outputs


    Original     		ZL40203 ZL40203LDG1 ZL40203LDF1 -40oC PDF

    FS115

    Abstract: No abstract text available
    Text: ZL40205 Precision 1:6 LVPECL Fanout Buffer with On-Chip Input Termination Data Sheet February 2013 Features Ordering Information ZL40205LDG1 ZL40205LDF1 Inputs/Outputs 32 Pin QFN 32 Pin QFN Trays Tape and Reel Matte Tin Package Size: 5 x 5 mm -40oC to +85oC


    Original     		ZL40205 ZL40205LDG1 ZL40205LDF1 -40oC FS115 PDF

    zl40201

    Abstract: No abstract text available
    Text: ZL40201 Precision 1:2 LVPECL Fanout Buffer with On-Chip Input Termination Data Sheet February 2013 Ordering Information Features ZL40201LDG1 ZL40201LDF1 Inputs/Outputs • Accepts differential or single-ended input • LVPECL, LVDS, CML, HCSL, LVCMOS • On-chip input termination resistors and biasing for


    Original     		ZL40201 ZL40201LDG1 ZL40201LDF1 -40oC PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL40207 Precision 1:8 LVPECL Fanout Buffer with On-Chip Input Termination Data Sheet April 2014 Features Ordering Information ZL40207LDG1 ZL40207LDF1 Inputs/Outputs • Accepts differential or single-ended input • LVPECL, LVDS, CML, HCSL, LVCMOS • On-chip input termination resistors and biasing for


    Original     		ZL40207 ZL40207LDG1 ZL40207LDF1 -40oC PDF

    ZLAN-403

    Abstract: No abstract text available
    Text: ZL40203 Precision 1:4 LVPECL Fanout Buffer with On-Chip Input Termination Data Sheet April 2014 Ordering Information Features ZL40203LDG1 ZL40203LDF1 Inputs/Outputs • Accepts differential or single-ended input • LVPECL, LVDS, CML, HCSL, LVCMOS • Four precision LVPECL outputs


    Original     		ZL40203 ZL40203LDG1 ZL40203LDF1 -40oC ZLAN-403 PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL40205 Precision 1:6 LVPECL Fanout Buffer with On-Chip Input Termination Data Sheet April 2014 Features Ordering Information ZL40205LDG1 ZL40205LDF1 Inputs/Outputs 32 Pin QFN 32 Pin QFN Trays Tape and Reel Matte Tin Package Size: 5 x 5 mm -40oC to +85oC •


    Original     		ZL40205 ZL40205LDG1 ZL40205LDF1 -40oC PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL40225 Precision 2:8 LVPECL Fanout Buffer with Simple Input Reference Switching and On-Chip Input Termination Data Sheet February 2013 Features Ordering Information ZL40225LDG1 ZL40225LDF1 Inputs/Outputs • Accepts two differential or single-ended inputs


    Original     		ZL40225 ZL40225LDG1 ZL40225LDF1 -40oC PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL40211 Precision 2:8 LVPECL Fanout Buffer with Glitchfree Input Reference Switching and On-Chip Input Termination Data Sheet February 2013 Features Ordering Information ZL40211LDG1 ZL40211LDF1 Inputs/Outputs • Accepts two differential or single-ended inputs


    Original     		ZL40211 ZL40211LDG1 ZL40211LDF1 PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL40209 Precision 2:6 LVPECL Fanout Buffer with Glitchfree Input Reference Switching and On-Chip Input Termination Data Sheet February 2013 Features Ordering Information ZL40209LDG1 ZL40209LDF1 Inputs/Outputs • Accepts two differential or single-ended inputs


    Original     		ZL40209 ZL40209LDG1 ZL40209LDF1 -40oC PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL40225 Precision 2:8 LVPECL Fanout Buffer with Simple Input Reference Switching and On-Chip Input Termination Data Sheet April 2014 Features Ordering Information ZL40225LDG1 ZL40225LDF1 Inputs/Outputs • Accepts two differential or single-ended inputs • LVPECL, LVDS, CML, HCSL, LVCMOS


    Original     		ZL40225 ZL40225LDG1 ZL40225LDF1 -40oC PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL40219 Precision 1:8 LVDS Fanout Buffer with On-Chip Input Termination Data Sheet April 2014 Features Ordering Information ZL40219LDG1 ZL40219LDF1 Inputs/Outputs • Accepts differential or single-ended input • LVPECL, LVDS, CML, HCSL, LVCMOS • On-chip input termination and biasing for AC


    Original     		ZL40219 ZL40219LDG1 ZL40219LDF1 -40oC PDF

    Untitled

    Abstract: No abstract text available
    Text: ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION GENERAL DESCRIPTION FEATURES The ICS889474 is a high speed 2-to-1 differential ICS multiplexer with integrated 2 output LVDS fanout HiPerClockS buffer and internal termination and is a member of


    Original     		ICS889474 ICS889474 PDF

    ICS889474

    Abstract: SY89474U ICS889474AK MO-220
    Text: ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION GENERAL DESCRIPTION FEATURES The ICS889474 is a high speed 2-to-1 differential ICS multiplexer with integrated 2 output LVDS fanout HiPerClockS buffer and internal termination and is a member of


    Original     		ICS889474 ICS889474 SY89474U ICS889474AK MO-220 PDF

    50 Ohm Termination pad

    Abstract: 89474A
    Text: PRELIMINARY ICS889474 2:1 LVDS MULTIPLEXER WITH 1:2 FANOUT AND INTERNAL TERMINATION GENERAL DESCRIPTION FEATURES The ICS889474 is a high speed 2-to-1 differential ICS multiplexer with integrated 2 output LVDS fanout HiPerClockS buffer and internal termination and is a member of


    Original     		ICS889474 ICS889474 n1997) 199707558G 50 Ohm Termination pad 89474A PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL40217 Precision 1:6 LVDS Fanout Buffer with On-Chip Input Termination Data Sheet April 2014 Features Ordering Information ZL40217LDG1 ZL40217LDF1 Inputs/Outputs • Accepts differential or single-ended input • LVPECL, LVDS, CML, HCSL, LVCMOS • On-chip input termination and biasing for AC


    Original     		ZL40217 ZL40217LDG1 ZL40217LDF1 -40oC PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL40209 Precision 2:6 LVPECL Fanout Buffer with Glitchfree Input Reference Switching and On-Chip Input Termination Data Sheet April 2014 Features Ordering Information ZL40209LDG1 ZL40209LDF1 Inputs/Outputs • Accepts two differential or single-ended inputs


    Original     		ZL40209 ZL40209LDG1 ZL40209LDF1 -40oC PDF