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    CLOCK GENERATOR 8.448 Search Results

    CLOCK GENERATOR 8.448 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    5V9351PFI-G Rochester Electronics 5V9351 - LVCMOS Clock Generator Visit Rochester Electronics Buy
    2925DM/B Rochester Electronics LLC AM2925A - Clock Generator Visit Rochester Electronics LLC Buy
    D82C284-8 Rochester Electronics LLC Processor Specific Clock Generator, 16MHz, CMOS, CDIP18, CERDIP-18 Visit Rochester Electronics LLC Buy
    D82C284-12 Rochester Electronics LLC Processor Specific Clock Generator, 25MHz, CMOS, CDIP18, CERDIP-18 Visit Rochester Electronics LLC Buy
    TB67S539FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation

    CLOCK GENERATOR 8.448 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    e2 framer g742

    Abstract: HDB3 E2 E2 liu multiplexing e2 frame e3 E2 hdb3 HDB3 to nrz MT90732 MT90732AP G753
    Text: MT90732 CMOS E2/E3 Framer E2/E3F  Advance Information Features ISSUE 1 • Framer for CCITT Recommendations • - G.742 (8448 kbit/s) - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) Line side interface • - Dual rail or NRZ HDB3 codec for dual rail I/O


    Original     		PDF MT90732 MT90732AP MT90732 e2 framer g742 HDB3 E2 E2 liu multiplexing e2 frame e3 E2 hdb3 HDB3 to nrz MT90732AP G753

    e2 framer g742

    Abstract: No abstract text available
    Text: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ MT90732


    Original     		PDF MT90732 MT90732AP e2 framer g742

    8448 clock

    Abstract: MT90732 MT90732AP multiplexing e2 frame e3
    Text: MT90732 CMOS E2/E3 Framer E2/E3F  Advance Information Features • • • • • • • ISSUE 1 Framer for CCITT Recommendations - G.742 (8448 kbit/s) - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) Line side interface - Dual rail or NRZ


    Original     		PDF MT90732 MT90732AP MT90732 753Overhead 8448 clock MT90732AP multiplexing e2 frame e3

    Untitled

    Abstract: No abstract text available
    Text: MT90732 CMOS E2/E3 Framer E2/E3F  Advance Information Features • • • • • • • ISSUE 1 Framer for CCITT Recommendations - G.742 (8448 kbit/s) - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) Line side interface - Dual rail or NRZ


    Original     		PDF MT90732 MT90732AP

    HDB3 E2

    Abstract: nrz to hdb3 E2 hdb3 HDB3 to nrz e2 MT90732 MT90732AP g745
    Text: MT90732 CMOS E2/E3 Framer E2/E3F  Advance Information Features • • • • • • • ISSUE 1 Framer for CCITT Recommendations - G.742 (8448 kbit/s) - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) Line side interface - Dual rail or NRZ


    Original     		PDF MT90732 MT90732AP MT90732 753all HDB3 E2 nrz to hdb3 E2 hdb3 HDB3 to nrz e2 MT90732AP g745

    G753

    Abstract: g745 E2 hdb3 txc-21037
    Text: E2/E3F Device 8-, 34 Mbit/s Framer TXC-03701 DATA SHEET FEATURES DESCRIPTION The E2/E3 Framer E2/E3F is a CMOS VLSI device that provides the functions needed to frame a wideband payload to one of four CCITT Recommendations: G.742, G.745, G.751, or G.753. The E2/E3F interfaces


    Original     		PDF TXC-03701 G753 g745 E2 hdb3 txc-21037

    g742

    Abstract: tsu56
    Text: BACK E2/E3F Device 8-, 34-Mbit/s Framer TXC-03701B DATA SHEET FEATURES DESCRIPTION • Framer for ITU-TSS Recommendations: - G.742 8448 kbit/s - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) The E2/E3 Framer (E2/E3F) is a CMOS VLSI device


    Original     		PDF 34-Mbit/s TXC-03701B 68-pin TXC-03701B-MB g742 tsu56

    G7XX

    Abstract: HDB3 E2 txc-21037 G-745 G753 G7421
    Text: E2/E3F Device 8-, 34-Mbit/s Framer TXC-03701B DATA SHEET FEATURES DESCRIPTION • Framer for ITU-TSS Recommendations: - G.742 8448 kbit/s - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) The E2/E3 Framer (E2/E3F) is a CMOS VLSI device


    Original     		PDF 34-Mbit/s TXC-03701B TXC-03701B-MB G7XX HDB3 E2 txc-21037 G-745 G753 G7421

    ic 4043

    Abstract: 92112 Chip 8 bit 92112 HP3785B PE65415 PE-65415 XR-T5683A XR-T5683AID XR-T5683AIP 045UI
    Text: XR-T5683A .the analog plus PCM Line Interface Chip company TM October 2010 FEATURES D TTL Compatible Interface D Single 5V Supply D Device Can Be Used as a Line Interface Unit Without Clock Recovery D Receiver Input Can Be Either Balanced or Unbalanced APPLICATIONS


    Original     		PDF XR-T5683A 448Mbps XR-T5683A 448Mbps, ic 4043 92112 Chip 8 bit 92112 HP3785B PE65415 PE-65415 XR-T5683AID XR-T5683AIP 045UI

    ic 4043

    Abstract: T5683A t5683aid 8 bit 92112 HP3781B E1995 PE65415 PE-65415 XR-T5683A XR-T5683AID
    Text: XR-T5683A .the analog plus PCM Line Interface Chip company TM June 1997-3 FEATURES D TTL Compatible Interface D Single 5V Supply D Device Can Be Used as a Line Interface Unit Without Clock Recovery D Receiver Input Can Be Either Balanced or Unbalanced APPLICATIONS


    Original     		PDF XR-T5683A 448Mbps XR-T5683A 448Mbps, ic 4043 T5683A t5683aid 8 bit 92112 HP3781B E1995 PE65415 PE-65415 XR-T5683AID

    G753

    Abstract: 74F32 TXC-02021 TXC-06125 TXC-06125-ACPL TXC06125
    Text: XBERT Device Bit Error Rate Generator Receiver TXC-06125 DATA SHEET FEATURES DESCRIPTION • Bit-serial, nibble-parallel, and byte-parallel interface capability, selectable via control bits The Bit Error Rate Generator/Receiver XBERT VLSI device is a microprocessor-programmable multi-rate


    Original     		PDF TXC-06125 TXC-06125-MB G753 74F32 TXC-02021 TXC-06125 TXC-06125-ACPL TXC06125

    Untitled

    Abstract: No abstract text available
    Text: BACK XBERT Device Bit Error Rate Generator Receiver TXC-06125 DATA SHEET FEATURES DESCRIPTION • Bit-serial, nibble-parallel, and byte-parallel interface capability, selectable via control bits The Bit Error Rate Generator/Receiver XBERT VLSI device is a microprocessor-programmable multi-rate


    Original     		PDF TXC-06125 OC-12/STM-4) TXC-06125-MB

    24444

    Abstract: XRT5683AID-F XRT5683AIDf XRT5683AID
    Text: XR-T5683A .the analog plus PCM Line Interface Chip company TM June 1997-3 FEATURES D TTL Compatible Interface D Single 5V Supply D Device Can Be Used as a Line Interface Unit Without Clock Recovery D Receiver Input Can Be Either Balanced or Unbalanced APPLICATIONS


    Original     		PDF XR-T5683A 448Mbps XR-T5683A 448Mbps, XRT5683AIP-F PDIP18 XRT5683AID-F SOIC18 01-Aug-09 XRT5683A 24444 XRT5683AIDf XRT5683AID

    Untitled

    Abstract: No abstract text available
    Text: Advance Data Sheet April 2001 TMXF84622 155/622/2488 Mbits/s Interface SONET/SDH x84/x63 Ultra Mapper Features • Versatile IC supports 622/155 Mbits/s SONET/ SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. PDH Interfaces ■


    Original     		PDF TMXF84622 x84/x63 DS01-207BBAC

    Frame structure for Multiplexing of four E1 streams into E2 stream

    Abstract: multiplexing e1 frame to e3 frame SDB6234 E2 liu Frame structure for Multiplexing of four E2 streams into E3 stream e1 E2 e3 liu transceiver hp3784A G742 HP-3784A LXT332
    Text: Designing an ITU G.742 Compliant PDH Multiplexer with the LXT332 Dual Transceiver Application Note January 2001 Order Number: 249164-001 As of January 15, 2001, this document replaces the Level One document known as AN056. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual


    Original     		PDF LXT332 AN056. LXT332 Frame structure for Multiplexing of four E1 streams into E2 stream multiplexing e1 frame to e3 frame SDB6234 E2 liu Frame structure for Multiplexing of four E2 streams into E3 stream e1 E2 e3 liu transceiver hp3784A G742 HP-3784A

    ITU-T G964

    Abstract: GR253-CORE JT-G704 JT-G706 JTG707 TMXF84622 TR-62411 700-Pin
    Text: Advance Data Sheet, Rev. 2 July 2001 TMXF84622 155 Mbits/s/622 Mbits/s Interface SONET/SDH x84/x63 Ultramapper 1 Features • Versatile IC supports 622 Mbits/s/155 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications.


    Original     		PDF TMXF84622 Mbits/s/622 x84/x63 Mbits/s/155 DS01-245BBAC DS01-207BBAC) ITU-T G964 GR253-CORE JT-G704 JT-G706 JTG707 TR-62411 700-Pin

    Untitled

    Abstract: No abstract text available
    Text: XR-T5683A Ï S T E X A R .the analog plus company PCM Line Interface Chip TM March 1997-2 FEATURES • Single 5V Supply • Receiver Input Can Be Either Balanced or Unbalanced • Up To 8.448Mbps Operation In Both Tx and Rx Directions • TTL Compatible Interface


    OCR Scan     		PDF XR-T5683A 448Mbps XR-T5683A

    Untitled

    Abstract: No abstract text available
    Text: JSf EX4R XR-T5683 PCM Line Interface Chip GENERAL DESCRIPTION PIN ASSIGNMENT The XR-T5683 is a PCM line interface chip. It consists ol both transmit and receive circuitry in a D IL 18 pin package. The maximum bit rate the chip can handle is 8.448 M Bits/s


    OCR Scan     		PDF XR-T5683 -10dB XR-T5683 T148C, 175pF 100pF 048MBPS XRT5683

    Untitled

    Abstract: No abstract text available
    Text: XR-T5683 PCM Line Interface Chip G E N E R A L DE SC R IPTIO N PIN A S SIG N M E N T The XR-T5683 is a P C M line interface chip. It consists of both transmit and receive circuitry in a D IL 18 pin package. The maximum bit rate the chip can handle is 8.448 M Bits/s


    OCR Scan     		PDF XR-T5683 XR-T5683 8448KHz 175pF XRT5683 100pF T5683

    G753

    Abstract: No abstract text available
    Text: CMOS MT90732 E2/E3 Framer E2/E3F M ITEL Advance Information Features _ ISSUE 1_ May 1995 • Framer for CCITT Recommendations • - G .742 (8448 kbit/s) - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s)


    OCR Scan     		PDF MT90732 MT90732AP G753

    Untitled

    Abstract: No abstract text available
    Text: E2/E3F Device 8-, 34-Mbit/s Framer TXC-03701B DATA SHEET FEATURES DESCRIPTION • Framer for ITU-TSS Recommendations: - G.742 8448 kbit/s - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) The E2/E3 Framer (E2/E3F) is a CMOS VLSI device


    OCR Scan     		PDF 34-Mbit/s TXC-03701B TXC-03701

    Untitled

    Abstract: No abstract text available
    Text: E2/E3F Device 8-, 34 Mbit/s Framer TXC-03701 v DATA SHEET W FEATURES DESCRIPTION Framer for CCITT Recommendations: - G.742 8448 kbit/s - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) = The E2/E3 Framer (E2/E3F) is a CMOS VLSI device that provides the functions needed to frame a wideband


    OCR Scan     		PDF TXC-03701

    Untitled

    Abstract: No abstract text available
    Text: IgT Integrated Telecom Technology, Inc. E3 Framer EAC-030-A User’s Manual Copyright 1994 -1 9 9 7 Integrated Telecom Technology, Inc. All Rights Reserved Integrated Telecom Technology, Inc. 18310 Montgomery Village Avenue, Suite 300 Gaithersburg, MD 20879 USA


    OCR Scan     		PDF EAC-030-A

    Untitled

    Abstract: No abstract text available
    Text: XR-T5683A .the analog plus company PCM Line Interface Chip TM June 1997-3 FEATURES TTL Compatible Interface Device Can Be Used as a Line Interface Unit With­ out Clock Recovery Single 5V Supply Receiver Input Can Be Either Balanced or Unbalanced APPLICATIONS


    OCR Scan     		PDF XR-T5683A 448Mbps XR-T5683A 448Mbps,