CLOCK DRIVER Search Results

AN1545

Abstract: MPC9993 MPC99J93
Contextual Info: Freescale Semiconductor Technical Data MPC99J93 DATA Rev 3, SHEET 05/2005 Intelligent Dynamic Clock Switch Intelligent Dynamic Clock Switch IDCS PLL Clock Driver (IDCS) PLL Clock Driver MPC99J93 MPC99J93 The MPC99J93 is a PLL clock driver designed specifically for redundant clock

Contextual Info: DATA SHEET MPC99J93 Freescale Semiconductor Technical Data Rev 3, 05/2005 MPC99J93 Intelligent Dynamic Clock Switch Intelligent Dynamic IDCS PLL Clock Driver Clock Switch MPC99J93 (IDCS) PLL Clock Driver The MPC99J93 is a PLL clock driver designed specifically for redundant clock

Contextual Info: Freescale Semiconductor Technical Data DATAMPC9993 SHEET Rev 3, 06/2005 Intelligent Dynamic Clock Switch Intelligent Dynamic Clock Switch IDCS PLL Clock Driver (IDCS) PLL Clock Driver MPC9993 MPC9993 The MPC9993 is a PLL clock driver designed specifically for redundant clock

AN1545

Abstract: MC88915 MPC9448 MPC9993
Contextual Info: DATA SHEET MPC9993 Freescale Semiconductor Technical Data Rev 3, 06/2005 MPC9993 Intelligent Dynamic Clock Switch Intelligent Dynamic IDCS PLL Clock Driver Clock Switch MPC9993 (IDCS) PLL Clock Driver The MPC9993 is a PLL clock driver designed specifically for redundant clock

ti 6346

Abstract: 440LX CDC9441
Contextual Info: CDC9441 PC CLOCK SYNTHESIZER/DRIVER WITH SDRAM CLOCK SUPPORT SCAS578 – AUGUST 1996 D D D D D D DL PACKAGE TOP VIEW Clock Generation for Intel 440LX Chipset Four CPU Clock Outputs With Programmable Frequency Twelve SDRAM Clock Outputs Seven PCI Clock Outputs

LQFP-32

Abstract: MC100ES6226 MC100ES6226AC MC100ES6226ACR2 MC100ES6226FA MC100ES6226FAR2
Contextual Info: MC100ES6226 2.5V/3.3V DIFFERENTIAL LVPECL 1:9 CLOCK DISTRIBUTION BUFFER AND CLOCK DRIVER The MC100ES6226 is a bipolar monolithic differential clock distribution buffer and clock divider. Designed for most demanding clock distribution systems, the MC100ES6226

CDC9163

Abstract: 430VX
Contextual Info: CDC9163 PC CLOCK SYNTHESIZER/DRIVER WITH SDRAM CLOCK SUPPORT SCAS574 – JULY 1996 D D D D D D D D D Clock Generation for Pentium/430VX Motherboards Twelve Host Clock Outputs With Programmable Frequency Six PCI Clock Outputs One Serial Bus 48-MHz Clock

Contextual Info: xr XRK79993 INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER DECEMBER 2004 REV. 1.0.0 GENERAL DESCRIPTION The XRK79993 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals

Contextual Info: CDC2582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS _SCAS379B - FEBRUARY 1993 - REVISED FEBRUARY 1996 Low Output Skew for Clock-Dlstrlbutlon and Clock-Generatlon Applications Operates at 3.3-V Vcc Distributes Differential LVPECL Clock

XRK7955

Contextual Info: xr XRK7955 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER MARCH 2005 REV. P1.0.1 GENERAL DESCRIPTION The XRK7955 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals

Contextual Info: CDC582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS _ SCAS446B - JULY 1994- REVISED FEBRUARY 1996 Low Output Skew for Clock-Dlstrlbutlon and Clock-Generatlon Applications Operates at 3.3-V Vqc Distributes Differential LVPECL Clock

XRK79993IQ

Contextual Info: xr XRK79993 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER SEPTEMBER 2004 REV. P1.0.0 GENERAL DESCRIPTION The XRK79993 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals

XRK79892

Abstract: XRK79892IQ
Contextual Info: xr XRK79892 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER SEPTEMBER 2004 REV. P1.0.0 GENERAL DESCRIPTION The XRK79892 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals

75MHZ

Abstract: XRK799J93 XRK799J93IQ
Contextual Info: xr XRK799J93 INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER DECEMBER 2006 REV. 1.0.1 GENERAL DESCRIPTION The XRK799J93 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals

XRK7933

Contextual Info: xr XRK7933 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER MARCH 2005 REV. P1.0.1 GENERAL DESCRIPTION The XRK7933 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals

semi catalog

Abstract: j510 Motorola transistor smd marking codes rf choke cross comparison books TTL catalog IC Data-book MPC930 MPC9449 MPC951 MPC952
Contextual Info: Freescale Semiconductor Data Book. Advanced Clock Drivers. DL207 Rev. 2 8/2004 Advanced Clock Drivers Selector Guide 1 Clock Generator Data Sheets 2 QUICCClock Generator Data Sheets 3 Failover or Redundant Clock Data Sheets 4 Clock Synthesizer Data Sheets

XRK79892

Abstract: XRK79892IQ
Contextual Info: xr XRK79892 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER JANAUARY 2005 REV. P1.0.1 GENERAL DESCRIPTION The XRK79892 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals

Contextual Info: CDC582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS _ SCAS446B - JULY 1994 - REVISED FEBRUARY 1996 Low Output Skew for Clock-Dlstrlbutton and Clock-Generatlon Applications Operates at 3.3-V Vcc Distributes Differential LVPECL Clock

transistor x1

Abstract: IDT49FCT805 49FCT805A 49FCT806 AN-82 IDT49FCT805A IDT49FCT806 IDT74FCT244A
Contextual Info: CLOCK DISTRIBUTION SIMPLIFIED WITH IDT GUARANTEED SKEW CLOCK DRIVERS  Integrated Device Technology, Inc. APPLICATION NOTE-82 CLOCK DISTRIBUTION SIMPLIFIED WITH IDT GUARANTEED SKEW CLOCK DRIVERS APPLICATION NOTE AN-82 By Michel Conrad INTRODUCTION WHAT IS CLOCK SKEW ?

Contextual Info: CDC2582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS _SCAS379B- FEBRUARY 1993 - REVISED FEBRUARY 1996 • • Low Output Skew or Clock-Distrlbutlon and Clock-Generatlon Applications Operates at 3.3-V Vcc Distributes Differential LVPECL Clock

Contextual Info: NB100LVEP224 2.5V/3.3V 1:24 Differential ECL/PECL Clock Driver with Clock Select and Output Enable http://onsemi.com Description The NB100LVEP224 is a low skew 1-to-24 differential clock driver, designed with clock distribution in mind, accepting two clock

SN74ABT337

Abstract: d358 D3589
Contextual Info: SN74ABT337 CLOCK DRIVER WITH 3-STATE OUTPUTS _ 03589, MAY 1990 * Low Output Skew, Low Pulse Skew for Clock Distribution and Clock Generation Applications * Four Outputs Toggle at the Clock Frequency, Four Outputs Switch at One-Half the Clock Frequency

405C

Abstract: LVEP224 NB100LVEP224 Socket IC 80 pin LQFP
Contextual Info: NB100LVEP224 2.5V/3.3V 1:24 Differential ECL/PECL Clock Driver with Clock Select and Output Enable http://onsemi.com Description The NB100LVEP224 is a low skew 1−to−24 differential clock driver, designed with clock distribution in mind, accepting two clock

AN1545

Abstract: MPC9993 MPC99J93
Contextual Info: Freescale Semiconductor Technical Data MPC99J93 Rev 3, 05/2005 Intelligent Dynamic Clock Switch IDCS PLL Clock Driver MPC99J93 The MPC99J93 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals from