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    R4383

    Abstract: T400 clock TSWC03622 TSYN01622 TSYN03622 TSWC01622 TSWC02622
    Text: Advisory October 28, 2003 TSWC01622/TSWC02622/TSWC03622/TSYN01622/TSYN03622 Device Version 1.1 Advisory The following data sheets are to be referenced: • TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS03-117HSPL-1 . ■


    Original     		PDF 2/TSWC02622/TSWC03622/TSYN01622/TSYN03622 TSWC01622 DS03-117HSPL-1) TSWC02622 DS03-118HSPL-1) TSWC03622 DS03-120HSPL) TSYN01622 DS03-119HSPL) TSYN03622 R4383 T400 clock

    TRCV0112G

    Abstract: No abstract text available
    Text: Product Brief May 2001 TRCV0112G 12 Gbit/s Limiting Amp, Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ ■ ■ Integrated limiting amplifier with 40 dB of voltage gain. Fully integrated clock recovery, 1:16 data demultiplexer. Supports OC-192/STM-64 standard and multiple


    Original     		PDF TRCV0112G OC-192/STM-64 177-pin TRCV0112G PB01-127HSPL

    GR-253

    Abstract: TTRN0110G
    Text: Data Sheet March 29, 2002 TTRN0110G 10 Gbits/s Clock Synthesizer, 16:1 Data Multiplexer Features Applications Supports standard OC-192/STM-64 data rate of 9.95328 Gbits/s up through forward error correction FEC rate of 10.7092 Gbits/s as well as the Ethernet rate of 10.3125 Gbits/s


    Original     		PDF TTRN0110G OC-192/STM-64 transfe0-712-4106) DS02-062HSPL DS01-236HSPL) GR-253 TTRN0110G

    ck77

    Abstract: CK51 TADM04622
    Text: Data Sheet, Revision 1 August 26, 2003 TSYN03622 SONET/SDH/PDH/ATM Clock Synthesizer 1 Introduction The last issue of this data sheet was June 20, 2003. A revision history is included in 21 Revision History on page 65. Red change bars have been installed on all text, figures,


    Original     		PDF TSYN03622 DS03-130HSPL-1 DS03-130HSPL) ck77 CK51 TADM04622

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Data Sheet May 2002 TSWC03622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Same functionality as TSWC01622 with reduced jitter specifications ■ Fully integrated clock synthesis ■ Clock or system sync protection switching


    Original     		PDF TSWC03622 DS02-239HSPL

    Untitled

    Abstract: No abstract text available
    Text: Data Advisory October 25, 2002 TSWC01622/TSWC02622/TSWC03622/TSYN01622 Device Advisory for Version 1.1 of the Device Reference data sheets October 2002, TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS02-237HSPL, TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection


    Original     		PDF TSWC01622/TSWC02622/TSWC03622/TSYN01622 TSWC01622 DS02-237HSPL, TSWC02622 DS02-238HSPL) TSWC03622 DS02-308HSPL, TSYN01622 DS02-289HSPL) TSWC0x622/TSYN01622

    T400 clock

    Abstract: TSWC01622 TSWC02622 TSWC03622 TSYN01622
    Text: Data Advisory October 25, 2002 TSWC01622/TSWC02622/TSWC03622/TSYN01622 Device Advisory for Version 1.1 of the Device Reference data sheets October 2002, TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS02-237HSPL, TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection


    Original     		PDF TSWC01622/TSWC02622/TSWC03622/TSYN01622 TSWC01622 DS02-237HSPL, TSWC02622 DS02-238HSPL) TSWC03622 DS02-308HSPL, TSYN01622 DS02-289HSPL) TSWC0x622/TSYN01622 T400 clock

    TADM042G5

    Abstract: TDAT042G5 TSOT0410G TSWC02622 TTRN012G5
    Text: Preliminary Product Brief February 2003 TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Fully integrated clock synthesis ■ Clock or system sync protection switching ■ Fast autonomous switching with software override


    Original     		PDF TSWC02622 OC-48 ba2-4106) PB03-022HSPL TADM042G5 TDAT042G5 TSOT0410G TTRN012G5

    TMXF84622

    Abstract: TADM04622 TDAT04622 TMXF28155 TSI-16 TSWC01622 TSWC03622 TSI-16 Card
    Text: Preliminary Product Brief February 2003 TSWC03622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Same functionality as TSWC01622 with looser jitter specifications ■ Fully integrated clock synthesis ■ Clock or system sync protection switching


    Original     		PDF TSWC03622 TSWC01622 OC-12: PB03-023HSPL TMXF84622 TADM04622 TDAT04622 TMXF28155 TSI-16 TSI-16 Card

    10Gb CDR

    Abstract: D14p N4 Amplifier 1 into 12 demultiplexer circuit diagram pin diagram 14 demultiplexer GR-253 TRCV0110G APD-SBSC-101
    Text: Data Sheet March 28, 2002 TRCV0110G 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 8 mV sensitivity at 1 x 10–10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)


    Original     		PDF TRCV0110G OC-192/STM-64 177-ball s-712-4106) DS02-061HSPL DS01-235HSPL) 10Gb CDR D14p N4 Amplifier 1 into 12 demultiplexer circuit diagram pin diagram 14 demultiplexer GR-253 APD-SBSC-101

    T400 clock

    Abstract: ATM machine working circuit diagram TSWC01622 TSWC02622 TSWC03622 TSYN01622 TSYN03622 L2E4
    Text: Advisory October 28, 2003 TSWC01622/TSWC02622/TSWC03622/TSYN01622/TSYN03622 Device Version 1.1 Advisory The following data sheets are to be referenced: • TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS03-117HSPL-1 . ■


    Original     		PDF 2/TSWC02622/TSWC03622/TSYN01622/TSYN03622 TSWC01622 DS03-117HSPL-1) TSWC02622 DS03-118HSPL-1) TSWC03622 DS03-120HSPL) TSYN01622 DS03-119HSPL) TSYN03622 T400 clock ATM machine working circuit diagram L2E4

    CK155

    Abstract: 155.52MHZ
    Text: ClockWorks SY89426 FINAL SONET OC-12/OC-3 CLOCK SYNTHESIZER FEATURES DESCRIPTION • Single chip source for 622.08MHz and 155.52MHz clocks ■ 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/CMOS compatible inputs and reference output


    Original     		PDF SY89426 OC-12/OC-3 08MHz 52MHz 395mW 28-pin SY89426 08MHz, CK155 155.52MHZ

    GR-253

    Abstract: TRCV0110G TRCV0110G-3-XE APD-SBSC-101
    Text: Data Sheet June 7, 2002 TRCV0110G 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 7.5 mV sensitivity at 1e-10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)


    Original     		PDF TRCV0110G 1e-10 OC-192/STM-64 177-Ball DS02-247HSPL DS02-061HSPL) GR-253 TRCV0110G-3-XE APD-SBSC-101

    T400 clock

    Abstract: ck77 diagram TSWC01622 TSWC02622 TSWC03622 TSYN01622 ATM machine working circuit diagram CK51
    Text: Data Advisory October 25, 2002 TSWC01622/TSWC02622/TSWC03622/TSYN01622 Device Advisory for Version 1.1 of the Device Reference data sheets October 2002, TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS02-237HSPL, TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection


    Original     		PDF TSWC01622/TSWC02622/TSWC03622/TSYN01622 TSWC01622 DS02-237HSPL, TSWC02622 DS02-238HSPL) TSWC03622 DS02-308HSPL, TSYN01622 DS02-289HSPL) TSWC0x622/TSYN01622 T400 clock ck77 diagram ATM machine working circuit diagram CK51

    APD-SBSC-101

    Abstract: GR-253 0364a
    Text: Data Sheet September 17, 2002 TRCV0111G2 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 7.5 mV sensitivity at 1e-10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)


    Original     		PDF TRCV0111G2 1e-10 OC-192/STM-64 177-ball DS02-364HSPL APD-SBSC-101 GR-253 0364a

    SY89426

    Abstract: CK155 TA-NWT-000253
    Text: SONET OC-12/OC-3 CLOCK SYNTHESIZER FEATURES ClockWorks SY89426 DESCRIPTION • Single chip source for 622.08MHz and 155.52MHz clocks ■ 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/CMOS compatible inputs and reference output


    Original     		PDF OC-12/OC-3 SY89426 08MHz 52MHz 395mW 28-pin SY89426 08MHz, CK155 TA-NWT-000253

    T400 clock

    Abstract: TADM042G5 TDAT042G5 TSOT0410G TSWC01622 TSWC02622 TTRN012G5
    Text: Data Sheet, Revision 1 August 26, 2003 TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch 1 Features The last issue of this data sheet was June 20, 2003. A revision history is included in 23 Revision History on page 70. Red change bars have been installed on all text, figures,


    Original     		PDF TSWC02622 DS03-118HSPL-1 DS03-118HSPL) T400 clock TADM042G5 TDAT042G5 TSOT0410G TSWC01622 TTRN012G5

    CKT55

    Abstract: No abstract text available
    Text: DESCRIPTION FEATURES • Single chip source for 622.08M Hz and 155.52MHz clocks ■ 622.08M Hz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/C M O S com patible inputs and reference output ■ SONET com pliant jitter perform ance <0.01 Ul


    OCR Scan     		PDF 52MHz 28-pin -12/S T-000253 12kHz OC-12 SY89426JC SY89426JCTR J28-1 CKT55

    Untitled

    Abstract: No abstract text available
    Text: * SO NET/SDH/ATM OC-12 TR A N SC EIVER SYNERGY SEMICONDUCTOR FEATURES PRELIMINARY INFORMATION SY69612A DESCRIPTION • A complete SONET/SDH Transmitter & Receiver ■ Complies with Bellcore, ITU/CCITT and ANSI specifications ■ On-chip PLL for clock generation


    OCR Scan     		PDF OC-12 SY69612A OC-12) 44MHz, 84MHz 76MHz SY87701V PM5355 S/UNI-622 SY69612

    Untitled

    Abstract: No abstract text available
    Text: * SONET OC-12/OC-3 CLOCK SYNTHESIZER SYNERGY SEMICONDUCTOR Clockworks SY89426 DESCRIPTION FEATURES • Single chip source for 622.08MHz and 155.52MHz clocks Synergy's SY89426 M ulti-O utput Phase Locked Loop PLL is a SONET com pliant clock generator providing


    OCR Scan     		PDF OC-12/OC-3 SY89426 08MHz 52MHz SY89426 C-12/STS-12 76MHz.

    Untitled

    Abstract: No abstract text available
    Text: * SONET OC-12/OC-3 CLOCK SYNTHESIZER SYNERGY SEMICONDUCTOR Clockworks SY89426 DESCRIPTION FEATURES • Single chip source for 622.08MHz and 155.52MHz clocks ■ 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/CMOS compatible inputs and reference output


    OCR Scan     		PDF OC-12/OC-3 SY89426 08MHz 52MHz SY89426

    SY89426

    Abstract: No abstract text available
    Text: * SONET OC-12/OC-3 CLOCK SYNTHESIZER SYNERG Y SEMICONDUCTOR Clockworks SY89426 DESCRIPTION FEATURES • Single chip source for 622.08MHz and 155.52MHz clocks ■ 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/CMOS compatible inputs and reference output


    OCR Scan     		PDF OC-12/OC-3 SY89426 08MHz 52MHz 395mW 28-pin SY89426 08MHz,

    Untitled

    Abstract: No abstract text available
    Text: * S O NET OC-12/OC-3 CLO C K SYNTHESIZER SYNERGY SEMICONDUCTOR Clockworks SY89426 DESCRIPTION FEATURES • Single chip source for 622.08MHz and 155.52MHz clocks ■ 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/CMOS compatible inputs and reference output


    OCR Scan     		PDF OC-12/OC-3 SY89426 08MHz 52MHz 395mW 28-pin SY89426 08MHz,

    Untitled

    Abstract: No abstract text available
    Text: * Clockworks PRELIMINARY SY89426 SONET OC-12/OC-3 CLOCK SYNTHESIZER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • Single-chip source for 622.08 and 155.52MHz clocks ■ 622 output Is differential PECL, 155 output Is single-ended PECL ■ TTL/CMOS-compatible Inputs and reference output


    OCR Scan     		PDF OC-12/OC-3 SY89426 SY89426 -12/S CK622P, CK622N 08MHz CK155 52MHz