ST*10f269-q3
Abstract: syscon sw 301 st10 Bootstrap ST10F269-T3 dp3121
Text: ST10F269-T3 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM March 2003 FAIL-SAFE PROTECTION – PROGRAMMABLE WATCHDOG TIMER – OSCILLATOR WATCHDOG • ■ ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION – ON-CHIP PLL – DIRECT OR PRESCALED CLOCK INPUT
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ST10F269-T3
16-BIT
32MHz
40-BIT
F269-T3
ST10F269DIETR
ST10F269
ST*10f269-q3
syscon sw 301
st10 Bootstrap
ST10F269-T3
dp3121
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ST10F269-Q3
Abstract: GPR circuit schematic diagram full data shed diode BA 159 free ST*10f269-q3 PQFP144 ST10F269 E-ST10F269 st10 Bootstrap ST10F269 03
Text: ST10F269 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA • ■ ■ ■ 16 32 256K Byte FlashMemory 2K Byte Internal RAM 16 CPU-Core andMACUnit Watchdog 16 PEC 10KByte XRAM 16 16 8 16 Interrupt Controller XTAL1 3.3V Port6
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ST10F269
16-BIT
10KByte
F269-Q3
ST10F269-Q3
GPR circuit schematic diagram full
data shed diode BA 159 free
ST*10f269-q3
PQFP144
ST10F269
E-ST10F269
st10 Bootstrap
ST10F269 03
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st10 Bootstrap
Abstract: ST10F269Q
Text: ST10F269Z2Qx 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA August 2002 • ■ IDLE AND POWER DOWN MODES SINGLE VOLTAGE SUPPLY: 5V ±10% EMBEDD ED REGULATOR FOR 3.3 V CORE SUPPLY . TEMPERATURE RANGES: -40 +125°C, -40 to 85°C
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ST10F269Z2Qx
16-BIT
40MHz
40-BIT
F269-Q3
st10 Bootstrap
ST10F269Q
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GPR circuit schematic diagram full
Abstract: DP43 T308 ST10F269-T6 ST*10f269-q3 m29F ST10F269-T3 TQFP144 f082h st10 Bootstrap
Text: ST10F269-T3 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM March 2003 FAIL-SAFE PROTECTION – PROGRAMMABLE WATCHDOG TIMER – OSCILLATOR WATCHDOG • ■ ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION – ON-CHIP PLL – DIRECT OR PRESCALED CLOCK INPUT
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ST10F269-T3
16-BIT
144-PIN
F269-T3
GPR circuit schematic diagram full
DP43
T308
ST10F269-T6
ST*10f269-q3
m29F
ST10F269-T3
TQFP144
f082h
st10 Bootstrap
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GPR circuit schematic diagram full
Abstract: ST10F269Z2q3 PQFP144 ST10 ST10F269 03 T48 regulator st10 Bootstrap
Text: ST10F269Z2Qx 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA August 2002 • ■ 16 32 256K Byte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM PEC Oscillator and PLL CAN1_RXD CAN1_TXD
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ST10F269Z2Qx
16-BIT
F269-Q3
GPR circuit schematic diagram full
ST10F269Z2q3
PQFP144
ST10
ST10F269 03
T48 regulator
st10 Bootstrap
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GPR circuit schematic diagram full
Abstract: ST10F269-Q3 ST10F169 PQFP144 DCMI timing specification st10 Bootstrap gpr schematic diagram EA99
Text: ST10F269-Q3 16-BIT MCU WITH 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA • ■ ■ ■ 16 32 256KByte FlashMemory 2K Byte Internal RAM 16 CPU-Coreand MACUnit Watchdog 16 10KByte XRAM PEC 16 16 8 16 Interrupt Controller XTAL1 Port 6 8 Port5 16
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ST10F269-Q3
16-BIT
256KByte
10KByte
F269-Q3
GPR circuit schematic diagram full
ST10F269-Q3
ST10F169
PQFP144
DCMI timing specification
st10 Bootstrap
gpr schematic diagram
EA99
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ST10F269 03
Abstract: GPR circuit schematic diagram full PQFP144 ST10F269 ST10F269-Q3 st10 Bootstrap FE90
Text: ST10F269 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA • ■ ■ ■ 16 32 256K Byte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM PEC Oscillator and PLL CAN1_RXD CAN1_TXD CAN1 CAN2_RXD
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ST10F269
16-BIT
F269-Q3
ST10F269 03
GPR circuit schematic diagram full
PQFP144
ST10F269
ST10F269-Q3
st10 Bootstrap
FE90
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Untitled
Abstract: No abstract text available
Text: ST10F269 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA September 2013 • ■ ■ ■ 16 32 256K Byte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM PEC Oscillator and PLL CAN1_RXD
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ST10F269
16-BIT
DocID7588
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Untitled
Abstract: No abstract text available
Text: ST10F269-T3 16-BIT MCU WITH MAC UNIT, 256 KBYTE FLASH MEMORY AND 12 KBYTE RAM September 2013 Rev 3 – PROGRAMMABLE WATCHDOG TIMER – OSCILLATOR WATCHDOG • ■ ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION – ON-CHIP PLL – DIRECT OR PRESCALED CLOCK INPUT
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ST10F269-T3
16-BIT
144-PIN
DocID9442
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ST10F269-T3
Abstract: ST10F269-T6 CAN BUS GPR circuit schematic diagram full st10f269t3 ST*10f269-q3 LQFP144 P0151 st10 Bootstrap 5P35
Text: ST10F269-T3 16-BIT MCU WITH MAC UNIT, 256 KBYTE FLASH MEMORY AND 12 KBYTE RAM January 2009 Rev 2 – PROGRAMMABLE WATCHDOG TIMER – OSCILLATOR WATCHDOG • ■ ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION – ON-CHIP PLL – DIRECT OR PRESCALED CLOCK INPUT ■
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ST10F269-T3
16-BIT
144-PIN
ST10F269-T3
ST10F269-T6
CAN BUS
GPR circuit schematic diagram full
st10f269t3
ST*10f269-q3
LQFP144
P0151
st10 Bootstrap
5P35
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st10 Bootstrap
Abstract: ST10f269 ST10F269-DPR ST10F269 03
Text: ST10F269 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA • ■ ■ ■ 16 32 256K Byte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM PEC Oscillator and PLL CAN1_RXD CAN1_TXD CAN1 CAN2_RXD
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ST10F269
16-BIT
40MHz
40-BIT
F269-Q3
ST10F269-DPR
ST10F269D
st10 Bootstrap
ST10f269
ST10F269 03
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Untitled
Abstract: No abstract text available
Text: ST10F269 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA • ■ ■ ■ 16 32 256K Byte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM PEC Oscillator and PLL CAN1_RXD CAN1_TXD CAN1 CAN2_RXD
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ST10F269
16-BIT
F269-Q3
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error multiplexer parity comparator
Abstract: PQFP144 ST10 ST10F269 TQFP144 1221h ST10F269 03 st10 Bootstrap p46a
Text: ST10F269Zx 16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM DATASHEET • ■ 128K or 256KByte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM 16 16 8 16 Interrupt Controller 8 Por t 5 16 BRG BRG
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ST10F269Zx
16-BIT
256KByte
TQFP144
F269-Q3
error multiplexer parity comparator
PQFP144
ST10
ST10F269
TQFP144
1221h
ST10F269 03
st10 Bootstrap
p46a
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diode T35 12H
Abstract: ST10F269Z2Q6 ST10F269Q ST10F269Z2T3 PQFP144 ST10F269 TQFP144 diode t318 BB126 st10 Bootstrap
Text: ST10F269 16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM DATASHEET • ■ 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM CAN1_RXD CAN1_TXD CAN1 CAN2_RXD CAN2_TXD CAN2 PEC Oscillator and PLL 16 Interrupt Controller
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ST10F269
16-BIT
256KByte
TQFP144
F269-Q3
diode T35 12H
ST10F269Z2Q6
ST10F269Q
ST10F269Z2T3
PQFP144
ST10F269
TQFP144
diode t318
BB126
st10 Bootstrap
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Untitled
Abstract: No abstract text available
Text: ST10F269Zx 16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM DATASHEET • ■ 128K or 256KByte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM 16 16 8 16 Interrupt Controller 8 Por t 5 16 BRG BRG
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ST10F269Zx
16-BIT
256KByte
TQFP144
F269-Q3
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C100H
Abstract: PIN DIAGRAM of st10f280 EE30h st10 Bootstrap BUT16
Text: ST10F280 16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM PRODUCT PREVIEW • ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION - ON-CHIP PLL. - DIRECT OR PRESCALED CLOCK INPUT. ■ UP TO 143 GENERAL PURPOSE I/O LINES - INDIVIDUALLY PROGRAMMABLE AS INPUT, OUTPUT OR SPECIAL FUNCTION.
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ST10F280
16-BIT
40MHz
40-BIT
E-ST10F280
ST10F280
E-ST10F280-Q3TR
C100H
PIN DIAGRAM of st10f280
EE30h
st10 Bootstrap
BUT16
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XP91
Abstract: JH17 ST10F280 ST10F280-JT3 st10 Bootstrap f08e BUT16
Text: ST10F280 16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM PRODUCT PREVIEW • ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION - ON-CHIP PLL. - DIRECT OR PRESCALED CLOCK INPUT. ■ UP TO 143 GENERAL PURPOSE I/O LINES - INDIVIDUALLY PROGRAMMABLE AS INPUT, OUTPUT OR SPECIAL FUNCTION.
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ST10F280
16-BIT
40MHz
16KByte
ST10F280
XP91
JH17
ST10F280-JT3
st10 Bootstrap
f08e
BUT16
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PIN DIAGRAM of st10f280
Abstract: CONNEXION ST10F280-JT3 XP1010 XP95 F194 ST10F280 p21015 g4 pc 50 w XP91
Text: ST10F280 16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM PRODUCT PREVIEW • ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION - ON-CHIP PLL. - DIRECT OR PRESCALED CLOCK INPUT. ■ UP TO 143 GENERAL PURPOSE I/O LINES - INDIVIDUALLY PROGRAMMABLE AS INPUT, OUTPUT OR SPECIAL FUNCTION.
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ST10F280
16-BIT
40MHz
ST10F280
PIN DIAGRAM of st10f280
CONNEXION
ST10F280-JT3
XP1010
XP95
F194
p21015
g4 pc 50 w
XP91
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Untitled
Abstract: No abstract text available
Text: ST10F280 16-bit MCU with MAC unit, 512 Kbyte Flash memory and 18 Kbyte RAM Datasheet − production data Features • ■ ■ ■ High performance cpu with dsp functions – 16-bit CPU with 4-stage pipeline. – 50ns Instruction cycle time at 40MHz CPU clock
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ST10F280
16-bit
40MHz
16-bit
40-bit
512KB
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PIN DIAGRAM of st10f280
Abstract: ST10F280 ST10F280-JT3 g4 pc 50 w st10 Bootstrap ptix BUT16 EE00h
Text: ST10F280 16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM PRODUCT PREVIEW • ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION - ON-CHIP PLL. - DIRECT OR PRESCALED CLOCK INPUT. ■ UP TO 143 GENERAL PURPOSE I/O LINES - INDIVIDUALLY PROGRAMMABLE AS INPUT, OUTPUT OR SPECIAL FUNCTION.
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ST10F280
16-BIT
40MHz
ST10F280
PIN DIAGRAM of st10f280
ST10F280-JT3
g4 pc 50 w
st10 Bootstrap
ptix
BUT16
EE00h
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Untitled
Abstract: No abstract text available
Text: ST10F280 16-bit MCU with MAC unit, 512 Kbyte Flash memory and 18 Kbyte RAM Datasheet − production data Features • ■ ■ ■ High performance cpu with dsp functions – 16-bit CPU with 4-stage pipeline. – 50ns Instruction cycle time at 40MHz CPU clock
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ST10F280
16-bit
40MHz
16-bit
40-bit
PBGA208
ST10F280-JT3
2X16-channel
10-bit
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PIN DIAGRAM of st10f280
Abstract: DC2D4 st10 Bootstrap BUT16
Text: ST10F280 16-bit MCU with MAC unit, 512 Kbyte Flash memory and 18 Kbyte RAM Datasheet − production data Features • ■ ■ ■ High performance cpu with dsp functions – 16-bit CPU with 4-stage pipeline. – 50ns Instruction cycle time at 40MHz CPU clock
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ST10F280
16-bit
40MHz
40-bit
512KB
PIN DIAGRAM of st10f280
DC2D4
st10 Bootstrap
BUT16
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motorola t217
Abstract: ATM25 C10535E T322 making RDIP
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98408 6-PORT 25M ATM PHY LSI The µPD98408 is an ATM physical layer LSI IC that complies with ATM25 25.6 Mbps and which supports TC sublayer and PMD sublayer functions. Interfacing with the ATM layer and AAL layer LSI is implemented at UTOPIA
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PD98408
PD98408
ATM25
af-phy-0040
af-phy-0039
bits/40
motorola t217
ATM25
C10535E
T322 making
RDIP
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STG60
Abstract: OPTREX DMC 93IC DMC-60S DMC-50593NFJ-SLY-2
Text: OVIj rot LCD M odule S p e c ific a tio n ^ C h e c X ir i ty O’tS y rt Pftpen'd b]r Typut NO, *•' tn g ln e c rfp g U fV . pTOdU<!.;Qff 0 « . PM C -5 0 5 9 3 N F J - S L Y - 2 EA ble o f C o n t e n ts I. G e n e ra ! ] . S p tf tific a iio fis
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OCR Scan
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DMC-50593NFJ-SLY-2
DMC-60S
STG60
OPTREX DMC
93IC
DMC-50593NFJ-SLY-2
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