CHN 550
Abstract: CHN 545 chn 710 CHN 712 chn 538 CHN 431 CHN 709 CHN 741 chn 738 chn 648 equivalent
Text: R&S ZNC/ZND Vector Network Analyzers User Manual ;xíÇ2 User Manual Test & Measurement 1173.9557.02 ─ 26 This manual describes the following vector network analyzer types: ● R&S®ZNC3 (2 ports, 9 kHz to 3 GHz, N connectors), order no. 1311.6004K12
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6004K12
ZNC-B10
ZN-B14
ZNC-B19
ZNC3-B22
ZNC-K19
VXI-11
CHN 550
CHN 545
chn 710
CHN 712
chn 538
CHN 431
CHN 709
CHN 741
chn 738
chn 648 equivalent
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CHN b42
Abstract: chn 743 pin of chn 743 chn 529 CHN 524 chn 729 CHN 849 CHN 616 CHN 847 RYM 17-18
Text: ADSP-21065L SHARC DSP Technical Reference Revision 2.0, July 2003 Part Number 82-001903-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2003 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent
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ADSP-21065L
I-127
I-128
16-bit
CHN b42
chn 743
pin of chn 743
chn 529
CHN 524
chn 729
CHN 849
CHN 616
CHN 847
RYM 17-18
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processor cross reference
Abstract: DATASHEET OF DMA dma controller ADSP-21065 ADSP-21065L CHN 643 CHN 632 CHN 617 CHN 616 CHN 642
Text: '0$ Figure 6-0. Listing 6-0. Table 6-0. Table 6-0. Direct Memory Access DMA provides a mechanism for transferring an entire block of data. The processor’s on-chip DMA controller relieves the core processor of moving data between internal memory and an external data source or
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ADSP-21065L
ADSP-21065L
processor cross reference
DATASHEET OF DMA
dma controller
ADSP-21065
CHN 643
CHN 632
CHN 617
CHN 616
CHN 642
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CHN 648
Abstract: chn 542 CHN 612 diode CHN 552 CHN 628 CHN 522 CHN 632 chn 637 chn 621 CHN 631
Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO JUNE 2004 REV. P1.1.5 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection
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XRT86L38
XRT86L38
CHN 648
chn 542
CHN 612 diode
CHN 552
CHN 628
CHN 522
CHN 632
chn 637
chn 621
CHN 631
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CHN 612 diode
Abstract: CHN 545 CHN 648 chn 542 CHN 519 ST chn 624 CHN 507 SCR PIN CONFIGURATION CHN 035 CHN 522 CHN 535
Text: áç XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO AUGUST 2004 REV. P1.1.6 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection
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XRT86L38
XRT86L38
CHN 612 diode
CHN 545
CHN 648
chn 542
CHN 519
ST chn 624
CHN 507
SCR PIN CONFIGURATION CHN 035
CHN 522
CHN 535
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chn 924
Abstract: chn 648 equivalent
Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO JUNE 2004 REV. P1.1.3 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection
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XRT86L38
XRT86L38
TR54016,
G-703,
chn 924
chn 648 equivalent
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chn 924
Abstract: CHN 643 144T1 CHN G4 120 chn 648 equivalent 1/CHN 545
Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO MAY 2004 REV. P1.1.1 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection
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XRT86L38
XRT86L38
TR54016,
G-703,
chn 924
CHN 643
144T1
CHN G4 120
chn 648 equivalent
1/CHN 545
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PJ 956
Abstract: CHN 844 chn 729 chn 627 569T kk 729 CHN 552
Text: 420+*~0+*- <>.7585-=>;1 <538-6 ;16-A 2EBOPMEN y 9@ jn`kZ_`e^ ZXgXY`c`kp y 5 Efid B Zfe]`^liXk`fe y QkXe[Xi[ NBA cXpflk y UXj_ k`^_k Xe[ ]clo giff]\[ kpg\j XmX`cXYc\ y Dem`ifed\ekXc ]i`\e[cp gif[lZk .PfGQ Zfdgc`Xek/ y Mlkc`e\ C`d\ej`fej> .592; o 5524 o 5624/ dd
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894dUw
644dU
B374TCB
74TCB
549MNQ
PJ 956
CHN 844
chn 729
chn 627
569T
kk 729
CHN 552
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CHN G4 141
Abstract: No abstract text available
Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO APRIL 2004 REV. P1.1.0 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection
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XRT86L38
XRT86L38
CHN G4 141
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chn 427
Abstract: chn 627 CHN 628 CHN 829 569T 2895B 5DE 98 I0 chn 729 CHN 552 chn+627
Text: 753-+*3-+0 ?A1:8;80@A>4 ?86;09 >490D 5HERSPHQ { 9@ jn`kZ_`e^ ZXgXY`c`kp { 5 Efid B Zfe]`^liXk`fe { QkXe[Xi[ NBA cXpflk { UXj_ k`^_k Xe[ ]clo giff]\[ kpg\j XmX`cXYc\ { Dem`ifed\ekXc ]i`\e[cp gif[lZk .PfGQ Zfdgc`Xek/ { Mlkc`e\ C`d\ej`fej> .592; o 5524 o 5624/ dd
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894dUy
644dU
B374TCB
74TCB
549MNQ
chn 427
chn 627
CHN 628
CHN 829
569T
2895B
5DE 98 I0
chn 729
CHN 552
chn+627
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CHN 844
Abstract: gi 9214 chn 627 chn 729 CHN 829 D5778 EZ 729 4GKA 569T chn 714
Text: 0.,{yx,{y~ 8:*3141~9:7- 81/4~2 7-2~= .A>KLIAJ T 9@ jn`kZ_`e^ ZXgXY`c`kp T 5 Efid B Zfe]`^liXk`fe T QkXe[Xi[ NBA cXpflk T NcXjk`Z j\Xc\[ Xe[ ]clo giff]\[ kpg\j XmX`cXYc\ E`c\ Lf2>D5778<5 T Dem`ifed\ekXc ]i`\e[cp gif[lZk .PfGQ Zfdgc`Xek/ T Mlkc`e\ C`d\ej`fej> .592; o 5524 o 5624/ dd
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BOB5444648
894dU?
644dU
B374TCB
74TCB
549MNQ
CHN 844
gi 9214
chn 627
chn 729
CHN 829
D5778
EZ 729
4GKA
569T
chn 714
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CHN G4 309
Abstract: 40 serice free DMO 565 R CHN 932
Text: xr XRT86L38 PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO JANUARY 2005 REV. P1.1.7 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .
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XRT86L38
XRT86L38
CHN G4 309
40 serice free
DMO 565 R
CHN 932
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EZ 729
Abstract: CHN 628 CHN 549 sj 68 gi CHN 552
Text: 0.,{yx,{y~ 8:*3141~9:7- 81/4~2 7-2~= .A>KLIAJ T 9@ jn`kZ_`e^ ZXgXY`c`kp T 5 Efid B Zfe]`^liXk`fe T QkXe[Xi[ NBA cXpflk T NcXjk`Z j\Xc\[ Xe[ ]clo giff]\[ kpg\j XmX`cXYc\ E`c\ Lf2>D5778<5 T SJ `ejlcXk`fe jpjk\d> BcXjj E XmX`cXYc\ T Dem`ifed\ekXc ]i`\e[cp gif[lZk .PfGQ Zfdgc`Xek/
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BOB5444648
GEC85
B374TCB
74TCB
549MNQ
894dU?
644dU
EZ 729
CHN 628
CHN 549
sj 68 gi
CHN 552
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DMO 565 R
Abstract: chn 648 equivalent CHN 507 CHN 618 CHN 552 TS13 SCR PIN CONFIGURATION CHN 035 dmo 265 chn 605 nB00
Text: XRT86VL32 PRELIMINARY PRELIMINARY DUAL T1/E1/J1 FRAMER/LIU COMBO APRIL 2004 REV. P1.0.0 GENERAL DESCRIPTION The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86VL32 provides protection
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XRT86VL32
XRT86VL32
DMO 565 R
chn 648 equivalent
CHN 507
CHN 618
CHN 552
TS13
SCR PIN CONFIGURATION CHN 035
dmo 265
chn 605
nB00
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DMO 565 R
Abstract: CHN 652 CHN 933 chn 539 W0104 CHN 628 CHN 523 chn 648 equivalent 3667 ict XRT86L34IB
Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO MAY 2004 REV. P1.1.1 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection
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XRT86L34
XRT86L34
DMO 565 R
CHN 652
CHN 933
chn 539
W0104
CHN 628
CHN 523
chn 648 equivalent
3667 ict
XRT86L34IB
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DMO 565 R
Abstract: chn 656 chn 637 chn 547 CHN 549 dmo 265 CHN 922 equivalent CHN 632 CHN 645 chn 648 equivalent
Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO JUNE 2004 REV. P1.1.3 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection
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XRT86L34
XRT86L34
DMO 565 R
chn 656
chn 637
chn 547
CHN 549
dmo 265
CHN 922 equivalent
CHN 632
CHN 645
chn 648 equivalent
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SDH 209
Abstract: DMO 565 R SCR PIN CONFIGURATION CHN 035 CHN G4 309 telephone schemes sa8316 dmo 265 CHN G4 329
Text: xr XRT86VL38 PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO MARCH 2005 REV. P1.0.6 GENERAL DESCRIPTION The XRT86VL38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .
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XRT86VL38
XRT86VL38
SDH 209
DMO 565 R
SCR PIN CONFIGURATION CHN 035
CHN G4 309
telephone schemes
sa8316
dmo 265
CHN G4 329
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dmo 565 r
Abstract: CHN 522 chn 542 chn 621 CHN 616 CHN 507 chn 638 chn 537 chn 543 CHN 618
Text: xr XRT86VL32 PRELIMINARY PRELIMINARY DUAL T1/E1/J1 FRAMER/LIU COMBO SEPTEMBER 2004 REV. P1.0.1 GENERAL DESCRIPTION The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86VL32 provides protection
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XRT86VL32
XRT86VL32
dmo 565 r
CHN 522
chn 542
chn 621
CHN 616
CHN 507
chn 638
chn 537
chn 543
CHN 618
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rx1a 1244
Abstract: CHN 616 ice 8040 ADSP-21065L h 945 p 4000 CMOS texas instruments 0x200014 F15-F8 PM48 multi timer Chn 835
Text: ADSP-21065L SHARC DSP User’s Manual Revision 2.0, July 2003 Part Number 82-001833-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2003 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent
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ADSP-21065L
I-127
I-128
16-bit
rx1a 1244
CHN 616
ice 8040
h 945 p
4000 CMOS texas instruments
0x200014
F15-F8
PM48 multi timer
Chn 835
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mdd 2605
Abstract: HCPL 1458 8 pin opto KS0108 128X64 graphical LCD mdd 2601 transistor chn 952 hitachi INVC 618 Data Vision P135 H4 led smd headlight bulb transistor CHN 64 946 transistor chn 943
Text: 755 Technical portal and online community for Design Engineers - www.element-14.com Optoelectronics, Solid State Illumination & Displays Page Alphanumeric LCD Modules . . . . . . . . . . . . . . . . . 903 Alphanumeric LED Displays . . . . . . . . . . . . . . . . . 900
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element-14
element14
mdd 2605
HCPL 1458 8 pin opto
KS0108 128X64 graphical LCD
mdd 2601
transistor chn 952
hitachi INVC 618
Data Vision P135
H4 led smd headlight bulb
transistor CHN 64 946
transistor chn 943
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USS-302
Abstract: No abstract text available
Text: Advance Data Sheet, Rev. 5 February 1999 group Lucent Technologies Bell Labs Innovations U 'M u m a UNIVERSAL SERIAL BUS USS-302 Two-Port PCI-to-USB OpenHCI Host Controller Features Description • 32-bit, 33 MHz PCI interface compliant with PCI Local Bus Specification Revision 2.1s
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USS-302
USS302
32-bit
DS98-177CM
PR-05
DS98-177CMPR-04)
|
USS302
Abstract: No abstract text available
Text: Advance Data Sheet, Rev. 3 September 1998 Ie r o e E * c t r o n ic s g r o u p Lucent Technologies S e ll L a b s in n o v a tio n s u n iv e r s a l s e r i a l b u s USS-302 Two-Port PCI-to-USB OpenHCI Host Controller Features Description • 32-bit, 33 MHz PCI interface compliant with PCI
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USS-302
USS302
32-bit
DS98-177C
PR-03
DS98-177CM
PR-02)
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AN696 servo motor
Abstract: 24v dc servomotor transistor 3bw AN885 BLDC 24v 5 amp smps ST AN887 mc1h an843, pic18 TC442X transistors ai 757
Text: S E I M s i c e i r ü ? d ^ c .f r h i p a . e a s M * X \ Q l- o lH ^ . il ste p p e r S E j , brushed DC ^ s- fiE j, AC in d u c tio n £ N , switched reluctance S N a - A |^ a j 2 |£ # £ = J3W H EL ^ 7 j|S 0 | S i£ ^ fc H c K * j7 l| ft, S A |^ a j
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16HIM
PIC16F684
PIC16F716
PIC16F7X7
dsPIC30F5015
TC141X
TC442X
TC446X
-MCP606,
MCP616
AN696 servo motor
24v dc servomotor
transistor 3bw
AN885 BLDC
24v 5 amp smps
ST AN887
mc1h
an843, pic18
transistors ai 757
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CHN 517
Abstract: 6823a MICRON diode 2u
Text: FAST CMOS 1 8 -BIT REGI STER IDT54/74FCT1 6823AT/BT/CT/ET IDT54/74FCT162823AT/BT/CT/ET FEATURES: DESCRIPTION: • C o m m o n features: The F C T 16823A T/BT/C T/ET and FC T162823AT/B T/C T/ ET 18-bit bus interface registers are built using advanced, dual metal CM O S technology. These high-speed, low-power
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IDT54/74FCT1
6823AT/BT/CT/ET
IDT54/74FCT162823AT/BT/CT/ET
6823A
T162823AT/B
18-bit
T16823A
62823AT/B
CHN 517
MICRON diode 2u
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