processor cross reference
Abstract: DATASHEET OF DMA dma controller ADSP-21065 ADSP-21065L CHN 643 CHN 632 CHN 617 CHN 616 CHN 642
Text: '0$ Figure 6-0. Listing 6-0. Table 6-0. Table 6-0. Direct Memory Access DMA provides a mechanism for transferring an entire block of data. The processor’s on-chip DMA controller relieves the core processor of moving data between internal memory and an external data source or
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ADSP-21065L
ADSP-21065L
processor cross reference
DATASHEET OF DMA
dma controller
ADSP-21065
CHN 643
CHN 632
CHN 617
CHN 616
CHN 642
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uPD424210AL
Abstract: ADV601 ADV601LC CCIR-656 H261 Philips SAA7111 CCTV DISTRIBUTION NETWORK diagram CCTV wireless functional diagram hm514265cj-60 ef97
Text: a Ultralow Cost Video Codec ADV601LC GENERAL DESCRIPTION FEATURES 100% Bitstream Compatible with the ADV601 Precise Compressed Bit Rate Control Field Independent Compression 8-Bit Video Interface Supports CCIR-656 and Multiplexed Philips Formats General Purpose 16- or 32-Bit Host Interface With
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ADV601LC
ADV601
CCIR-656
32-Bit
CCIR-601
ADV60160
ADV601LCJST
120-Lead
ST-120
uPD424210AL
ADV601
ADV601LC
H261
Philips SAA7111
CCTV DISTRIBUTION NETWORK diagram
CCTV wireless functional diagram
hm514265cj-60
ef97
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CHN b42
Abstract: chn 743 pin of chn 743 chn 529 CHN 524 chn 729 CHN 849 CHN 616 CHN 847 RYM 17-18
Text: ADSP-21065L SHARC DSP Technical Reference Revision 2.0, July 2003 Part Number 82-001903-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2003 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent
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ADSP-21065L
I-127
I-128
16-bit
CHN b42
chn 743
pin of chn 743
chn 529
CHN 524
chn 729
CHN 849
CHN 616
CHN 847
RYM 17-18
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chn 656
Abstract: TV toshiba dramatic CHN 524 chn 238 chn 720 TV toshiba dramatic vision chn 622 ST chn 624 chn 621
Text: BACK a Ultralow Cost Video Codec ADV601LC GENERAL DESCRIPTION FEATURES 100% Bitstream Compatible with the ADV601 Precise Compressed Bit Rate Control Field Independent Compression 8-Bit Video Interface Supports CCIR-656 and Multiplexed Philips Formats General Purpose 16- or 32-Bit Host Interface With
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ADV601
CCIR-656
32-Bit
CCIR-601
ADV601LC
ADV601LC
ADV601LCJST
ST-120
120-Lead
chn 656
TV toshiba dramatic
CHN 524
chn 238
chn 720
TV toshiba dramatic vision
chn 622
ST chn 624
chn 621
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CHN 550
Abstract: CHN 545 chn 710 CHN 712 chn 538 CHN 431 CHN 709 CHN 741 chn 738 chn 648 equivalent
Text: R&S ZNC/ZND Vector Network Analyzers User Manual ;xíÇ2 User Manual Test & Measurement 1173.9557.02 ─ 26 This manual describes the following vector network analyzer types: ● R&S®ZNC3 (2 ports, 9 kHz to 3 GHz, N connectors), order no. 1311.6004K12
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6004K12
ZNC-B10
ZN-B14
ZNC-B19
ZNC3-B22
ZNC-K19
VXI-11
CHN 550
CHN 545
chn 710
CHN 712
chn 538
CHN 431
CHN 709
CHN 741
chn 738
chn 648 equivalent
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CHN 648
Abstract: chn 542 CHN 612 diode CHN 552 CHN 628 CHN 522 CHN 632 chn 637 chn 621 CHN 631
Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO JUNE 2004 REV. P1.1.5 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection
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XRT86L38
XRT86L38
CHN 648
chn 542
CHN 612 diode
CHN 552
CHN 628
CHN 522
CHN 632
chn 637
chn 621
CHN 631
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CHN 612 diode
Abstract: CHN 545 CHN 648 chn 542 CHN 519 ST chn 624 CHN 507 SCR PIN CONFIGURATION CHN 035 CHN 522 CHN 535
Text: áç XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO AUGUST 2004 REV. P1.1.6 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection
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XRT86L38
XRT86L38
CHN 612 diode
CHN 545
CHN 648
chn 542
CHN 519
ST chn 624
CHN 507
SCR PIN CONFIGURATION CHN 035
CHN 522
CHN 535
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chn 924
Abstract: chn 648 equivalent
Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO JUNE 2004 REV. P1.1.3 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection
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XRT86L38
XRT86L38
TR54016,
G-703,
chn 924
chn 648 equivalent
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chn 924
Abstract: CHN 643 144T1 CHN G4 120 chn 648 equivalent 1/CHN 545
Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO MAY 2004 REV. P1.1.1 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection
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XRT86L38
XRT86L38
TR54016,
G-703,
chn 924
CHN 643
144T1
CHN G4 120
chn 648 equivalent
1/CHN 545
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CHN G4 141
Abstract: No abstract text available
Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO APRIL 2004 REV. P1.1.0 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L38 provides protection
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XRT86L38
XRT86L38
CHN G4 141
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DMO 565 R
Abstract: chn 648 equivalent CHN 507 CHN 618 CHN 552 TS13 SCR PIN CONFIGURATION CHN 035 dmo 265 chn 605 nB00
Text: XRT86VL32 PRELIMINARY PRELIMINARY DUAL T1/E1/J1 FRAMER/LIU COMBO APRIL 2004 REV. P1.0.0 GENERAL DESCRIPTION The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86VL32 provides protection
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XRT86VL32
XRT86VL32
DMO 565 R
chn 648 equivalent
CHN 507
CHN 618
CHN 552
TS13
SCR PIN CONFIGURATION CHN 035
dmo 265
chn 605
nB00
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CHN 932
Abstract: No abstract text available
Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO APRIL 2004 REV. P1.1.0 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection
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XRT86L34
XRT86L34
CHN 932
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DMO 565 R
Abstract: CHN 652 CHN 933 chn 539 W0104 CHN 628 CHN 523 chn 648 equivalent 3667 ict XRT86L34IB
Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO MAY 2004 REV. P1.1.1 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection
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XRT86L34
XRT86L34
DMO 565 R
CHN 652
CHN 933
chn 539
W0104
CHN 628
CHN 523
chn 648 equivalent
3667 ict
XRT86L34IB
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DMO 565 R
Abstract: chn 656 chn 637 chn 547 CHN 549 dmo 265 CHN 922 equivalent CHN 632 CHN 645 chn 648 equivalent
Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO JUNE 2004 REV. P1.1.3 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection
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XRT86L34
XRT86L34
DMO 565 R
chn 656
chn 637
chn 547
CHN 549
dmo 265
CHN 922 equivalent
CHN 632
CHN 645
chn 648 equivalent
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CHN G4 309
Abstract: 40 serice free DMO 565 R CHN 932
Text: xr XRT86L38 PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO JANUARY 2005 REV. P1.1.7 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .
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XRT86L38
XRT86L38
CHN G4 309
40 serice free
DMO 565 R
CHN 932
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CHN G4 033
Abstract: CHN 623 diode laser doppler velocity sensor CHN 523 diode
Text: LM96511 LM96511 Ultrasound Receive Analog Front End AFE Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not
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LM96511
LM96511
SNAS476H
SNAS476H
CHN G4 033
CHN 623 diode
laser doppler velocity sensor
CHN 523 diode
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CHN G4 033
Abstract: LM388
Text: LM96511 LM96511 Ultrasound Receive Analog Front End AFE Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not
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LM96511
LM96511
SNAS476H
CHN G4 033
LM388
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chn 622
Abstract: SC3622 71V424S15 71V424S10 71v424s12
Text: 1 dt 3.3V CMOS STATIC RAM 4 MEG 512K x 8-BIT) ADVANCE 'NF° d V4° 4 Integrated De vice Technology, Inc. FEATURES: DESCRIPTION: • 512K x 8 advanced high-speed CMOS Static RAM • JEDEC Center Power / GND pinout for reduced noise • Equal access and cycle times
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10/12/15ns
36-pin,
44-pin,
IDT71V424
304-bit
71V424
36-pin
44-pin
chn 622
SC3622
71V424S15
71V424S10
71v424s12
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pin optical fiber lucent
Abstract: No abstract text available
Text: Datasheet January 1999 microelectronics group Lucent Technologies Bell Labs Innovations 1340-Type Lightwave Receiver • Operation at 1.3 pm or 1.55 pm wavelengths ■ Operating case temperature range of -4 0 °C to +85 °C Applications ■ Telecommunications
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1340-Type
20-pin,
DS99-072LWP
DS98-357LWP)
pin optical fiber lucent
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Untitled
Abstract: No abstract text available
Text: T R I Q U I N T S E M I C O N D U C T O R , I N C T O » The TQ 8103 is a m o n o lith ic clo c k and data recovery CDR IC th a t receives TQ8103 NRZ data, extracts the high-speed clock, and presents the separated data and clo ck as its o u tp u ts. T his device is designed sp e cifica lly fo r SONET
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TQ8103
622Mb/s
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Untitled
Abstract: No abstract text available
Text: D atash eet January 1999 m icroelectronics group Lucent Technologies Bell Labs Innovations 1345-Type Receiver with Clock Recovery and Data Retiming Applications • Telecommunications — Inter- and intraoffice SONET/ITU-T SDH — Subscriber loop — Metropolitan area networks
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1345-Type
20-pin,
20-pin
DS99-071LWP
DS98-358LWP)
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Untitled
Abstract: No abstract text available
Text: Data Sheet January 1999 group Lucent Technologies Bell Labs Innovations 1345-Type Receiver with Clock Recovery and Data Retiming Applications • Telecommunications — Inter- and intraoffice SONET/ITU-T SDH — Subscriber loop — Metropolitan area networks
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1345-Type
OC-12
GR-253-CORE
DS99-071LWP
DS98-358LWP)
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pin optical fiber lucent
Abstract: No abstract text available
Text: g r o up Data Sheet January 1999 Lucent Technologies Bell Labs Innovations 1241/1243/1245-Type Uncooled Laser Transmitter Features • Backward compatible with 1227/1229/1238-Type Laser Transmitters ■ Space-saving, self-contained, 20-pin DIP ■ Uses field-proven, reliable InGaAsP MQW laser
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1241/1243/1245-Type
1227/1229/1238-Type
20-pin
/1243-Type
20-pin,
DS99-073LWP
DS98-356LWP)
pin optical fiber lucent
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Untitled
Abstract: No abstract text available
Text: group Data Sheet January 1999 Lucent Technologies Bell Labs Innovations NetLight 1417G5 and 1417H5-Type ATM/SONET/SDH Transceivers with Clock Recovery Uncooled 1300 nm laser transmitter with automatic output power control Transmitter disable input Wide dynamic range receiver with InGaAs PIN
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1417G5
1417H5-Type
1417H5
DS99-076LWP
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